1 /******************************************************************************
2 ** File Name: rtc_reg_v3.h *
3 ** Author: mingwei.zhang *
5 ** Copyright: 2010 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 06/11/2010 mingwei.zhang Create. *
13 ******************************************************************************/
14 #ifndef _RTC_REG_V3_H_
15 #define _RTC_REG_V3_H_
16 /*----------------------------------------------------------------------------*
18 **------------------------------------------------------------------------- */
20 /**---------------------------------------------------------------------------*
22 **--------------------------------------------------------------------------*/
27 /**---------------------------------------------------------------------------*
29 **---------------------------------------------------------------------------*/
32 /*----------Real Timer Counter Register----------*/
37 #define RTC_BASE SPRD_ANA_RTC_PHYS
38 #define ANA_RTC_SEC_CNT (RTC_BASE + 0x00)
39 #define ANA_RTC_MIN_CNT (RTC_BASE + 0x04)
40 #define ANA_RTC_HOUR_CNT (RTC_BASE + 0x08)
41 #define ANA_RTC_DAY_CNT (RTC_BASE + 0x0C)
42 #define ANA_RTC_SEC_UPDATE (RTC_BASE + 0x10)
43 #define ANA_RTC_MIN_UPDATE (RTC_BASE + 0x14)
44 #define ANA_RTC_HOUR_UPDATE (RTC_BASE + 0x18)
45 #define ANA_RTC_DAY_UPDATE (RTC_BASE + 0x1C)
46 #define ANA_RTC_SEC_ALM (RTC_BASE + 0x20)
47 #define ANA_RTC_MIN_ALM (RTC_BASE + 0x24)
48 #define ANA_RTC_HOUR_ALM (RTC_BASE + 0x28)
49 #define ANA_RTC_DAY_ALM (RTC_BASE + 0x2C)
50 #define ANA_RTC_INT_EN (RTC_BASE + 0x30)
51 #define ANA_RTC_INT_RSTS (RTC_BASE + 0x34)
52 #define ANA_RTC_INT_CLR (RTC_BASE + 0x38)
53 #define ANA_RTC_INT_MSK (RTC_BASE + 0x3C)
55 #define ANA_RTC_SPG_VALUE (RTC_BASE + 0x50)
56 #define ANA_RTC_SPG_UPD (RTC_BASE + 0x54)
58 //The corresponding bit of RTC_CTL register.
59 #define RTC_SEC_BIT BIT_0 //Sec int enable
60 #define RTC_MIN_BIT BIT_1 //Min int enable
61 #define RTC_HOUR_BIT BIT_2 //Hour int enable
62 #define RTC_DAY_BIT BIT_3 //Day int enable
63 #define RTC_ALARM_BIT BIT_4 //Alarm int enable
64 #define RTCCTL_HOUR_FMT_SEL BIT_5 //Hour format select
65 //#define RTCCTL_EN BIT_6 //Rtc module enable
67 #define RTC_SEC_ACK_BIT BIT_8 // Sec ack int enable
68 #define RTC_MIN_ACK_BIT BIT_9 //Min ack int enable
69 #define RTC_HOUR_ACK_BIT BIT_10 //Hour ack int enable
70 #define RTC_DAY_ACK_BIT BIT_11 //Day ack int enable
71 #define RTC_SEC_ALM_ACK_BIT BIT_12 //Sec alm ack int enable
72 #define RTC_MIN_ALM_ACK_BIT BIT_13 //Min alm ack int enable
73 #define RTC_HOUR_ALM_ACK_BIT BIT_14 //Hour alm ack int enable
74 #define RTC_DAY_ALM_ACK_BIT BIT_15 //Day alm ack int enable
76 #define RTC_UPD_TIME_MASK (RTC_SEC_ACK_BIT | RTC_MIN_ACK_BIT | RTC_HOUR_ACK_BIT | RTC_DAY_ACK_BIT)
77 #define RTC_INT_ALL_MSK (0xFFFF&(~(BIT_5|BIT_6|BIT_7)))
79 #define RTC_SEC_MASK 0x3F
80 #define RTC_MIN_MASK 0x3F
81 #define RTC_HOUR_MASK 0x1F
82 #define RTC_DAY_MASK 0xFFFF
84 /**----------------------------------------------------------------------------*
86 **----------------------------------------------------------------------------*/
91 /**---------------------------------------------------------------------------*/
92 #endif //_RTC_REG_V3_H_