1 /******************************************************************************
2 ** File Name: adi_reg_v3.h *
5 ** Copyright: 2005 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 03/03/2010 Tim.Luo Create. *
13 ******************************************************************************/
15 #ifndef _ADI_REG_V3_H_
16 #define _ADI_REG_V3_H_
18 #include <asm/arch/bits.h>
19 #include <asm/arch/sprd_reg.h>
23 #define SPRD_ADI_BASE SPRD_MISC_PHYS
25 #define ADI_CTL_REG (SPRD_ADI_BASE + 0x4 )
26 #define ADI_CHANNEL_PRI (SPRD_ADI_BASE + 0x8 )
27 #define ADI_INT_EN (SPRD_ADI_BASE + 0xC )
28 #define ADI_INT_RAW_STS (SPRD_ADI_BASE + 0x10)
29 #define ADI_INT_MASK_STS (SPRD_ADI_BASE + 0x14)
30 #define ADI_INT_CLR (SPRD_ADI_BASE + 0x18)
31 #define ADI_GSSI_CTL0 (SPRD_ADI_BASE + 0x1C)
32 #define ADI_GSSI_CTL1 (SPRD_ADI_BASE + 0x20)
33 #define ADI_ARM_RD_CMD (SPRD_ADI_BASE + 0x24)
34 #define ADI_RD_DATA (SPRD_ADI_BASE + 0x28)
35 #define ADI_FIFO_STS (SPRD_ADI_BASE + 0x2C)
36 #define ADI_STS (SPRD_ADI_BASE + 0x30)
37 #define ADI_REQ_STS (SPRD_ADI_BASE + 0x34)
40 #define ADI_EIC_DATA (SPRD_ANA_EIC_PHYS + 0x00)
41 #define ADI_EIC_MASK (SPRD_ANA_EIC_PHYS + 0x04)
44 #define ANA_INT_STEAL_EN BIT_0
45 #define ARM_SERCLK_EN BIT_1
46 #define DSP_SERCLK_EN BIT_2
49 #define ADI_FIFO_EMPTY BIT_10
50 #define ADI_FIFO_FULL BIT_11
52 #endif //_ADI_REG_V3_H_