2 * Copyright (C) 2014-2015 Spreadtrum Communications Inc.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
11 #ifndef __REGS_PUB_APB_H__
12 #define __REGS_PUB_APB_H__
16 /* registers definitions for controller REGS_PUB_APB */
17 #define REG_PUB_APB_DMC_PORT_REMAP_EN SCI_ADDR(REGS_PUB_APB_BASE, 0x0000)
18 #define REG_PUB_APB_DMC_PORTS_MPU_EN SCI_ADDR(REGS_PUB_APB_BASE, 0x0004)
19 #define REG_PUB_APB_DMC_PORT0_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x0008)
20 #define REG_PUB_APB_DMC_PORT1_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x000C)
21 #define REG_PUB_APB_DMC_PORT2_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x0010)
22 #define REG_PUB_APB_DMC_PORT3_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x0014)
23 #define REG_PUB_APB_DMC_PORT4_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x0018)
24 #define REG_PUB_APB_DMC_PORT5_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x001C)
25 #define REG_PUB_APB_DMC_PORT6_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x0020)
26 #define REG_PUB_APB_DMC_PORT7_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x0024)
27 #define REG_PUB_APB_DMC_PORT8_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x0028)
28 #define REG_PUB_APB_DMC_PORT9_ADDR_REMAP SCI_ADDR(REGS_PUB_APB_BASE, 0x002C)
29 #define REG_PUB_APB_DMC_PORT0_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0030)
30 #define REG_PUB_APB_DMC_PORT1_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0034)
31 #define REG_PUB_APB_DMC_PORT2_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0038)
32 #define REG_PUB_APB_DMC_PORT3_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x003C)
33 #define REG_PUB_APB_DMC_PORT4_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0040)
34 #define REG_PUB_APB_DMC_PORT5_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0044)
35 #define REG_PUB_APB_DMC_PORT6_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0048)
36 #define REG_PUB_APB_DMC_PORT7_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0050)
37 #define REG_PUB_APB_DMC_PORT8_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0054)
38 #define REG_PUB_APB_DMC_PORT9_MPU_RANGE SCI_ADDR(REGS_PUB_APB_BASE, 0x0058)
39 #define REG_PUB_APB_DMC_PORT0_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x005C)
40 #define REG_PUB_APB_DMC_PORT1_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x0060)
41 #define REG_PUB_APB_DMC_PORT2_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x0064)
42 #define REG_PUB_APB_DMC_PORT3_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x0068)
43 #define REG_PUB_APB_DMC_PORT4_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x006C)
44 #define REG_PUB_APB_DMC_PORT5_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x0070)
45 #define REG_PUB_APB_DMC_PORT6_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x0074)
46 #define REG_PUB_APB_DMC_PORT7_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x0078)
47 #define REG_PUB_APB_DMC_PORT8_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x007C)
48 #define REG_PUB_APB_DMC_PORT9_DUMP_ADDR SCI_ADDR(REGS_PUB_APB_BASE, 0x0080)
49 #define REG_PUB_APB_BUSMON_CNT_START SCI_ADDR(REGS_PUB_APB_BASE, 0x008C)
50 #define REG_PUB_APB_BUSMON_CFG SCI_ADDR(REGS_PUB_APB_BASE, 0x0090)
51 #define REG_PUB_APB_DDR_EB SCI_ADDR(REGS_PUB_APB_BASE, 0x0094)
52 #define REG_PUB_APB_DDR_SOFT_RST SCI_ADDR(REGS_PUB_APB_BASE, 0x0098)
53 #define REG_PUB_APB_DDR_QOS_CFG1 SCI_ADDR(REGS_PUB_APB_BASE, 0x009C)
54 #define REG_PUB_APB_DDR_QOS_CFG2 SCI_ADDR(REGS_PUB_APB_BASE, 0x00A0)
55 #define REG_PUB_APB_DDR_QOS_CFG3 SCI_ADDR(REGS_PUB_APB_BASE, 0x00A4)
56 #define REG_PUB_APB_DDR_MRR_STATUS SCI_ADDR(REGS_PUB_APB_BASE, 0x00A8)
58 /* bits definitions for register REG_PUB_APB_DMC_PORT_REMAP_EN */
59 #define BITS_DMC_PORTS_REMAP_EN(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)) )
61 /* bits definitions for register REG_PUB_APB_DMC_PORTS_MPU_EN */
62 #define BITS_DMC_PORTS_MPU_EN(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)) )
64 /* bits definitions for register REG_PUB_APB_DMC_PORT0_ADDR_REMAP */
65 #define BITS_DMC_PORT0_ADDR_REMAP(_x_) ( (_x_) << 0 )
67 /* bits definitions for register REG_PUB_APB_DMC_PORT1_ADDR_REMAP */
68 #define BITS_DMC_PORT1_ADDR_REMAP(_x_) ( (_x_) << 0 )
70 /* bits definitions for register REG_PUB_APB_DMC_PORT2_ADDR_REMAP */
71 #define BITS_DMC_PORT2_ADDR_REMAP(_x_) ( (_x_) << 0 )
73 /* bits definitions for register REG_PUB_APB_DMC_PORT3_ADDR_REMAP */
74 #define BITS_DMC_PORT3_ADDR_REMAP(_x_) ( (_x_) << 0 )
76 /* bits definitions for register REG_PUB_APB_DMC_PORT4_ADDR_REMAP */
77 #define BITS_DMC_PORT4_ADDR_REMAP(_x_) ( (_x_) << 0 )
79 /* bits definitions for register REG_PUB_APB_DMC_PORT5_ADDR_REMAP */
80 #define BITS_DMC_PORT5_ADDR_REMAP(_x_) ( (_x_) << 0 )
82 /* bits definitions for register REG_PUB_APB_DMC_PORT6_ADDR_REMAP */
83 #define BITS_DMC_PORT6_ADDR_REMAP(_x_) ( (_x_) << 0 )
85 /* bits definitions for register REG_PUB_APB_DMC_PORT7_ADDR_REMAP */
86 #define BITS_DMC_PORT7_ADDR_REMAP(_x_) ( (_x_) << 0 )
88 /* bits definitions for register REG_PUB_APB_DMC_PORT8_ADDR_REMAP */
89 #define BITS_DMC_PORT8_ADDR_REMAP(_x_) ( (_x_) << 0 )
91 /* bits definitions for register REG_PUB_APB_DMC_PORT9_ADDR_REMAP */
92 #define BITS_DMC_PORT9_ADDR_REMAP(_x_) ( (_x_) << 0 )
94 /* bits definitions for register REG_PUB_APB_DMC_PORT0_MPU_RANGE */
95 #define BITS_DMC_PORT0_MPU_RANGE(_x_) ( (_x_) << 0 )
97 /* bits definitions for register REG_PUB_APB_DMC_PORT1_MPU_RANGE */
98 #define BITS_DMC_PORT1_MPU_RANGE(_x_) ( (_x_) << 0 )
100 /* bits definitions for register REG_PUB_APB_DMC_PORT2_MPU_RANGE */
101 #define BITS_DMC_PORT2_MPU_RANGE(_x_) ( (_x_) << 0 )
103 /* bits definitions for register REG_PUB_APB_DMC_PORT3_MPU_RANGE */
104 #define BITS_DMC_PORT3_MPU_RANGE(_x_) ( (_x_) << 0 )
106 /* bits definitions for register REG_PUB_APB_DMC_PORT4_MPU_RANGE */
107 #define BITS_DMC_PORT4_MPU_RANGE(_x_) ( (_x_) << 0 )
109 /* bits definitions for register REG_PUB_APB_DMC_PORT5_MPU_RANGE */
110 #define BITS_DMC_PORT5_MPU_RANGE(_x_) ( (_x_) << 0 )
112 /* bits definitions for register REG_PUB_APB_DMC_PORT6_MPU_RANGE */
113 #define BITS_DMC_PORT6_MPU_RANGE(_x_) ( (_x_) << 0 )
115 /* bits definitions for register REG_PUB_APB_DMC_PORT7_MPU_RANGE */
116 #define BITS_DMC_PORT7_MPU_RANGE(_x_) ( (_x_) << 0 )
118 /* bits definitions for register REG_PUB_APB_DMC_PORT8_MPU_RANGE */
119 #define BITS_DMC_PORT8_MPU_RANGE(_x_) ( (_x_) << 0 )
121 /* bits definitions for register REG_PUB_APB_DMC_PORT9_MPU_RANGE */
122 #define BITS_DMC_PORT9_MPU_RANGE(_x_) ( (_x_) << 0 )
124 /* bits definitions for register REG_PUB_APB_DMC_PORT0_DUMP_ADDR */
125 #define BITS_DMC_PORT0_DUMP_ADDR(_x_) ( (_x_) << 0 )
127 /* bits definitions for register REG_PUB_APB_DMC_PORT1_DUMP_ADDR */
128 #define BITS_DMC_PORT1_DUMP_ADDR(_x_) ( (_x_) << 0 )
130 /* bits definitions for register REG_PUB_APB_DMC_PORT2_DUMP_ADDR */
131 #define BITS_DMC_PORT2_DUMP_ADDR(_x_) ( (_x_) << 0 )
133 /* bits definitions for register REG_PUB_APB_DMC_PORT3_DUMP_ADDR */
134 #define BITS_DMC_PORT3_DUMP_ADDR(_x_) ( (_x_) << 0 )
136 /* bits definitions for register REG_PUB_APB_DMC_PORT4_DUMP_ADDR */
137 #define BITS_DMC_PORT4_DUMP_ADDR(_x_) ( (_x_) << 0 )
139 /* bits definitions for register REG_PUB_APB_DMC_PORT5_DUMP_ADDR */
140 #define BITS_DMC_PORT5_DUMP_ADDR(_x_) ( (_x_) << 0 )
142 /* bits definitions for register REG_PUB_APB_DMC_PORT6_DUMP_ADDR */
143 #define BITS_DMC_PORT6_DUMP_ADDR(_x_) ( (_x_) << 0 )
145 /* bits definitions for register REG_PUB_APB_DMC_PORT7_DUMP_ADDR */
146 #define BITS_DMC_PORT7_DUMP_ADDR(_x_) ( (_x_) << 0 )
148 /* bits definitions for register REG_PUB_APB_DMC_PORT8_DUMP_ADDR */
149 #define BITS_DMC_PORT8_DUMP_ADDR(_x_) ( (_x_) << 0 )
151 /* bits definitions for register REG_PUB_APB_DMC_PORT9_DUMP_ADDR */
152 #define BITS_DMC_PORT9_DUMP_ADDR(_x_) ( (_x_) << 0 )
154 /* bits definitions for register REG_PUB_APB_BUSMON_CNT_START */
155 #define BIT_PUB_BUSMON_CNT_START ( BIT(0) )
157 /* bits definitions for register REG_PUB_APB_BUSMON_CFG */
158 #define BIT_PUB_BUSMON9_EB ( BIT(25) )
159 #define BIT_PUB_BUSMON8_EB ( BIT(24) )
160 #define BIT_PUB_BUSMON7_EB ( BIT(23) )
161 #define BIT_PUB_BUSMON6_EB ( BIT(22) )
162 #define BIT_PUB_BUSMON5_EB ( BIT(21) )
163 #define BIT_PUB_BUSMON4_EB ( BIT(20) )
164 #define BIT_PUB_BUSMON3_EB ( BIT(19) )
165 #define BIT_PUB_BUSMON2_EB ( BIT(18) )
166 #define BIT_PUB_BUSMON1_EB ( BIT(17) )
167 #define BIT_PUB_BUSMON0_EB ( BIT(16) )
168 #define BIT_PUB_BUSMON9_SOFT_RST ( BIT(9) )
169 #define BIT_PUB_BUSMON8_SOFT_RST ( BIT(8) )
170 #define BIT_PUB_BUSMON7_SOFT_RST ( BIT(7) )
171 #define BIT_PUB_BUSMON6_SOFT_RST ( BIT(6) )
172 #define BIT_PUB_BUSMON5_SOFT_RST ( BIT(5) )
173 #define BIT_PUB_BUSMON4_SOFT_RST ( BIT(4) )
174 #define BIT_PUB_BUSMON3_SOFT_RST ( BIT(3) )
175 #define BIT_PUB_BUSMON2_SOFT_RST ( BIT(2) )
176 #define BIT_PUB_BUSMON1_SOFT_RST ( BIT(1) )
177 #define BIT_PUB_BUSMON0_SOFT_RST ( BIT(0) )
179 /* bits definitions for register REG_PUB_APB_DDR_EB */
181 /* bits definitions for register REG_PUB_APB_DDR_SOFT_RST */
183 /* bits definitions for register REG_PUB_APB_DDR_QOS_CFG1 */
184 #define BITS_DMC_ARQOS_3(_x_) ( (_x_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
185 #define BITS_DMC_AWQOS_3(_x_) ( (_x_) << 24 & (BIT(24)|BIT(25)|BIT(26)|BIT(27)) )
186 #define BITS_DMC_ARQOS_2(_x_) ( (_x_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
187 #define BITS_DMC_AWQOS_2(_x_) ( (_x_) << 16 & (BIT(16)|BIT(17)|BIT(18)|BIT(19)) )
188 #define BITS_DMC_ARQOS_1(_x_) ( (_x_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
189 #define BITS_DMC_AWQOS_1(_x_) ( (_x_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
190 #define BITS_DMC_ARQOS_0(_x_) ( (_x_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
191 #define BITS_DMC_AWQOS_0(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
193 /* bits definitions for register REG_PUB_APB_DDR_QOS_CFG2 */
194 #define BITS_DMC_ARQOS_7(_x_) ( (_x_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
195 #define BITS_DMC_AWQOS_7(_x_) ( (_x_) << 24 & (BIT(24)|BIT(25)|BIT(26)|BIT(27)) )
196 #define BITS_DMC_ARQOS_6(_x_) ( (_x_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
197 #define BITS_DMC_AWQOS_6(_x_) ( (_x_) << 16 & (BIT(16)|BIT(17)|BIT(18)|BIT(19)) )
198 #define BITS_DMC_ARQOS_5(_x_) ( (_x_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
199 #define BITS_DMC_AWQOS_5(_x_) ( (_x_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
200 #define BITS_DMC_ARQOS_4(_x_) ( (_x_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
201 #define BITS_DMC_AWQOS_4(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
203 /* bits definitions for register REG_PUB_APB_DDR_QOS_CFG3 */
204 #define BITS_DMC_ARQOS_9(_x_) ( (_x_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
205 #define BITS_DMC_AWQOS_9(_x_) ( (_x_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
206 #define BITS_DMC_ARQOS_8(_x_) ( (_x_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
207 #define BITS_DMC_AWQOS_8(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
209 /* bits definitions for register REG_PUB_APB_DDR_MRR_STATUS */
210 #define BIT_DDRC_CO_RD_MRR_DATA_VALID ( BIT(8) )
211 #define BITS_DDRC_CO_RD_MRR_DATA(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
213 /* vars definitions for controller REGS_PUB_APB */
215 #endif //__REGS_PUB_APB_H__