1 /******************************************************************************
2 ** File Name: dispc_v3_reg.h *
5 ** Copyright: 2012 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
13 ******************************************************************************/
19 #include <asm/arch/sc8810_reg_base.h>
22 /* DISPC regs offset */
23 #define DISPC_CTRL (0x0000)
24 #define DISPC_SIZE_XY (0x0004)
25 #define DISPC_RSTN (0x0008)
27 #define DISPC_STS (0x0010)
29 #define DISPC_IMG_CTRL (0x0020)
30 #define DISPC_IMG_Y_BASE_ADDR (0x0024)
31 #define DISPC_IMG_UV_BASE_ADDR (0x0028)
32 #define DISPC_IMG_V_BASE_ADDR (0x002c)
33 #define DISPC_IMG_SIZE_XY (0x0030)
34 #define DISPC_IMG_PITCH (0x0034)
35 #define DISPC_IMG_DISP_XY (0x0038)
36 #define DISPC_BG_COLOR (0x003c)
38 #define DISPC_OSD_CTRL (0x0040)
39 #define DISPC_OSD_BASE_ADDR (0x0044)
40 #define DISPC_OSD_SIZE_XY (0x0048)
41 #define DISPC_OSD_PITCH (0x004c)
42 #define DISPC_OSD_DISP_XY (0x0050)
43 #define DISPC_OSD_ALPHA (0x0054)
44 #define DISPC_OSD_CK (0x0058)
46 #define DISPC_Y2R_CTRL (0x0060)
47 #define DISPC_Y2R_CONTRAST (0x0064)
48 #define DISPC_Y2R_SATURATION (0x0068)
49 #define DISPC_Y2R_BRIGHTNESS (0x006c)
51 #define DISPC_INT_EN (0x0070)
52 #define DISPC_INT_CLR (0x0074)
53 #define DISPC_INT_STATUS (0x0078)
54 #define DISPC_INT_RAW (0x007c)
56 #define DISPC_DPI_CTRL (0x0080)
57 #define DISPC_DPI_H_TIMING (0x0084)
58 #define DISPC_DPI_V_TIMING (0x0088)
59 #define DISPC_DPI_STS0 (0x008c)
60 #define DISPC_DPI_STS1 (0x0090)
62 #define DISPC_DBI_CTRL (0x00a0)
63 #define DISPC_DBI_TIMING0 (0x00a4)
64 #define DISPC_DBI_TIMING1 (0x00a8)
65 #define DISPC_DBI_RDATA (0x00ac)
66 #define DISPC_DBI_CMD (0x00b0)
67 #define DISPC_DBI_DATA (0x00b4)
68 #define DISPC_DBI_QUEUE (0x00b8)
70 #define DISPC_TE_SYNC_DELAY (0x00bc)
72 static inline uint32_t dispc_read(uint32_t reg)
74 return __raw_readl(DISPC_CTL_BEGIN + reg);
77 static inline void dispc_write(uint32_t value, uint32_t reg)
79 __raw_writel(value, (DISPC_CTL_BEGIN + reg));
82 static inline void dispc_set_bits(uint32_t bits, uint32_t reg)
84 dispc_write(dispc_read(reg) | bits, reg);
87 static inline void dispc_clear_bits(uint32_t bits, uint32_t reg)
89 dispc_write(dispc_read(reg) & ~bits, reg);