1 /******************************************************************************
2 ** File Name: sc8810_reg_ahb.h *
3 ** Author: Daniel.Ding *
5 ** Copyright: 2005 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 11/13/2005 Daniel.Ding Create. *
13 ** 05/07/2010 Mingwei.zhang Modify it for SC8800G. *
14 ******************************************************************************/
15 #ifndef _SC8810_REG_AHB_H_
16 #define _SC8810_REG_AHB_H_
17 /*----------------------------------------------------------------------------*
19 **-------------------------------------------------------------------------- */
21 /**---------------------------------------------------------------------------*
23 **---------------------------------------------------------------------------*/
28 /**----------------------------------------------------------------------------*
30 **----------------------------------------------------------------------------*/
31 #define AHB_REG_BASE 0x20900200
32 #define CHIP_TYPE 0x209003FC
34 #define AHB_CTL0 (AHB_REG_BASE + 0x00)
35 #define AHB_CTL1 (AHB_REG_BASE + 0x04)
36 #define AHB_CTL2 (AHB_REG_BASE + 0x08)
37 #define AHB_CTL3 (AHB_REG_BASE + 0x0C)
38 #define AHB_SOFT_RST (AHB_REG_BASE + 0x10)
39 #define AHB_PAUSE (AHB_REG_BASE + 0x14)
40 #define AHB_REMAP (AHB_REG_BASE + 0x18)
41 #define AHB_ARM_CLK (AHB_REG_BASE + 0x24)
42 #define AHB_SDIO_CTL (AHB_REG_BASE + 0x28)
43 #define AHB_CTL4 (AHB_REG_BASE + 0x2C)
44 #define AHB_ENDIAN_SEL (AHB_REG_BASE + 0x30)
45 #define AHB_STS (AHB_REG_BASE + 0x34)
46 #define CA5_CFG (AHB_REG_BASE + 0x38)
48 #define DSP_BOOT_EN (AHB_REG_BASE + 0x84)
49 #define DSP_BOOT_VEC (AHB_REG_BASE + 0x88)
50 #define DSP_RST (AHB_REG_BASE + 0x8C)
51 #define AHB_ENDIAN_EN (AHB_REG_BASE + 0x90)
52 #define USB_PHY_CTRL (AHB_REG_BASE + 0xA0)
54 #ifdef CONFIG_SC7710G2
55 #define AHB_SOFT2_RST (AHB_REG_BASE + 0x1C)
56 #define AHB_CTL6 (AHB_REG_BASE + 0x3C)
60 #define CHIP_ID (AHB_REG_BASE + 0x1FC)
62 #define AHB_DSP_BOOT_EN (AHB_REG_BASE + 0x84)
63 #define AHB_DSP_BOOT_VECTOR (AHB_REG_BASE + 0x88)
64 #define AHB_DSP_RESET (AHB_REG_BASE + 0x8C)
65 #define AHB_BIGEND_PROT_REG (AHB_REG_BASE + 0x90)
67 #define AHB_CTL0_DCAM_EN BIT_1
68 #define AHB_CTL0_CCIR_EN BIT_2
69 #define AHB_CTL0_LCDC_EN BIT_3
70 #define AHB_CTL0_SDIO_EN BIT_4
71 #define AHB_CTL0_USBD_EN BIT_5
72 #define AHB_CTL0_DMA_EN BIT_6
73 #define AHB_CTL0_BM0_EN (BIT_7)
74 #define AHB_CTL0_NFC_EN BIT_8
75 #define AHB_CTL0_BM1_EN (BIT_11)
76 #define AHB_CTL0_VSP_EN BIT_13
77 #define AHB_CTL0_ROT_EN BIT_14
78 #define AHB_CTL0_DRM_EN BIT_18
79 #define AHB_CTL0_AHB_ARCH_EB BIT_15
80 #define AHB_CTL0_EMC_EN BIT_28
82 #define AHB_BIGENDIAN_DMA BIT_0
83 #define AHB_BIGENDIAN_NFC BIT_1
84 #define AHB_BIGENDIAN_LCDC BIT_2
85 #define AHB_BIGENDIAN_SDIO BIT_3
86 #define AHB_BIGENDIAN_DCAM BIT_4
87 #define AHB_BIGENDIAN_VSP BIT_5
88 #define AHB_BIGENDIAN_ROT BIT_6
89 #define AHB_BIGENDIAN_BM0 BIT_7
90 #define AHB_BIGENDIAN_BM1 BIT_8
91 #define AHB_BIGENDIAN_SHARM BIT_9
93 #define AHB_ENDIAN_OPEN 0xC3D4
94 // Bit define AHB_CTRL1
95 #define AHB_CTRL1_EMC_AUTO_GATE_EN BIT_8
96 #define AHB_CTRL1_EMC_CH_AUTO_GATE_EN BIT_9
97 #define AHB_CTRL1_ARM_AUTO_GATE_EN BIT_11
98 #define AHB_CTRL1_AHB_AUTO_GATE_EN BIT_12
99 #define AHB_CTRL1_MCU_AUTO_GATE_EN BIT_13
100 #define AHB_CTRL1_MSTMTX_AUTO_GATE_EN BIT_14
101 #define AHB_CTRL1_ARMMTX_AUTO_GATE_EN BIT_15
102 #define AHB_CTRL1_ARM_DAHB_SLEEP_EN BIT_16
105 #define USB_DM_PULLUP_BIT BIT_19
106 #define USB_DP_PULLDOWN_BIT BIT_20
107 #define USB_DM_PULLDOWN_BIT BIT_21
109 #define AHB_SDIO_SOFT_RST BIT_12
111 #define AHB_SDIO_CTRL_SLOT0 0
112 #define AHB_SDIO_CTRL_SLOT1 1
113 #define AHB_SDIO_CTRL_SLAVE 2
115 #define CHIP_ID_VER_0 (0x88100000UL)
116 #define CHIP_ID_VER_1 (0x88100001UL) /* SMIC CHIP */
117 #define CHIP_ID_VER_MF (0x88100040UL)
118 #define CHIP_ID_7710_VER_0 (0x7710DA00UL)
120 /**----------------------------------------------------------------------------*
122 **----------------------------------------------------------------------------*/
123 #ifdef CHIP_ENDIAN_LITTLE
124 typedef union _ahb_ctl0_reg_tag
126 struct _ahb_ctl0_reg_map
128 volatile unsigned int reserved :1; ////apb_eb :1;
129 volatile unsigned int dcam_eb :1; //BIT_1
130 volatile unsigned int ccir_eb :1; //BIT_2
131 volatile unsigned int lcdc_eb :1; //BIT_3
132 volatile unsigned int sdio_eb :1; //BIT_4
133 volatile unsigned int usbd_eb :1; //BIT_5
134 volatile unsigned int dma_eb :1; //BIT_6
135 volatile unsigned int bm0_eb :1; //BIT_7
136 volatile unsigned int nfc_eb :1; //BIT_8
137 volatile unsigned int reserved0 :2; //BIT_9-10
138 volatile unsigned int bm1_eb :1; //BIT_11
139 volatile unsigned int reserved1 :1; //BIT_12
140 volatile unsigned int vsp_eb :1; //BIT_13
141 volatile unsigned int rot_eb :1; //BIT_14
142 volatile unsigned int reserved2 :3; //BIT_15-17
143 volatile unsigned int drm_eb :1; //BIT_18
144 volatile unsigned int reserved3 :8; //BIT_19-26
145 volatile unsigned int ahb_arch_en :1; //BIT_27
146 volatile unsigned int emc_en :1; //BIT_28
147 volatile unsigned int reserved4 :3; //BIT_29-31
149 volatile unsigned int dwValue ;
152 typedef union _ahb_ctl1_reg_tag
154 struct _ahb_ctl1_reg_map
156 volatile unsigned int dcam_buf_sw :1; //BIT_0
157 volatile unsigned int dcam_buf_status :1; //BIT_1
158 volatile unsigned int reserved0 :6; //BIT_2-7
159 volatile unsigned int emc_auto_gate_en :1; //BIT_8
160 volatile unsigned int emc_ch_auto_gate_en :1; //BIT_9
161 volatile unsigned int reserved1 :1; //BIT_10
162 volatile unsigned int arm_auto_gate_en :1; //BIT_11
163 volatile unsigned int ahb_auto_gate_en :1; //BIT_12
164 volatile unsigned int mcu_auto_gate_en :1; //BIT_13
165 volatile unsigned int mstmtx_auto_gate_en :1; //BIT_14
166 volatile unsigned int armmtx_auto_gate_en :1; //BIT_15
167 volatile unsigned int arm_dahb_sleep_en :1; //BIT_16
168 volatile unsigned int reserved2 :15; //BIT_17-31
170 volatile unsigned int dwValue ;
173 typedef union _ahb_ctl2_reg_tag
175 struct _ahb_ctl2_reg_map
177 volatile unsigned int Reserved0 :3; //BIT_0-2
178 volatile unsigned int mcu_shm_ctrl :2; //BIT_3-4
179 volatile unsigned int reserved1 :27; //BIT_5-31
181 volatile unsigned int dwValue ;
184 typedef union _ahb_ctl3_reg_tag
186 struct _ahb_ctl3_reg_map
188 volatile unsigned int clk_usb_ref_sel :1; //BIT_0
189 volatile unsigned int usb_s_hbigendian :1; //BIT_1
190 volatile unsigned int usb_m_hbigendian :1; //BIT_2
191 volatile unsigned int reserved0 :1; //BIT_3
192 volatile unsigned int busmon_sel0 :1; //BIT_4
193 volatile unsigned int busmon_sel1 :1; //BIT_5
194 volatile unsigned int clk_usb_ref_en :1; //BIT_6
195 volatile unsigned int clk_utmifs_en :1; //BIT_7
196 volatile unsigned int utmifs_tx_en_inv :1; //BIT_8
197 volatile unsigned int utmi_suspend_inv :1; //BIT_9
198 volatile unsigned int clk_ulpi_en :1; //BIT_10
199 volatile unsigned int reserved1 :21; //BIT_11-31
201 volatile unsigned int dwValue ;
205 typedef union _ahb_soft_rst_reg_tag
207 struct _ahb_soft_rst_reg_map
209 volatile unsigned int dma_rst :1; //BIT_0
210 volatile unsigned int dcam_rst :1; //BIT_1
211 volatile unsigned int ccir_rst :1;//BIT_2
212 volatile unsigned int lcdc_rst :1;//BIT_3
213 volatile unsigned int reserved0 :1;//Reserved
214 volatile unsigned int nfc_rst :1;//BIT_5
215 volatile unsigned int usbd_utmi_rst :1;//BIT_6
216 volatile unsigned int usbphy_rst :1;//BIT_7
217 volatile unsigned int reserved1 :2;//Reserved
218 volatile unsigned int rot_rst :1;//BIT_10
219 volatile unsigned int emc_rst :1;//BIT_11
220 volatile unsigned int sd_rst :1;//BIT_12
221 volatile unsigned int drm_rst :1;//BIT_13
222 volatile unsigned int adc_rst :1;//BIT_14
223 volatile unsigned int vsp_rst :1;//BIT_15
224 volatile unsigned int reserved2 :16;//Reserved
226 volatile unsigned int dwValue;
229 typedef union _ahb_ctl0_reg_tag
231 struct _ahb_ctl0_reg_map
233 volatile unsigned int reserved4 :3; //BIT_29-31
234 volatile unsigned int emc_en :1; //BIT_28
235 volatile unsigned int ahb_arch_en :1; //BIT_27
236 volatile unsigned int reserved3 :8; //BIT_19-26
237 volatile unsigned int drm_eb :1; //BIT_18
238 volatile unsigned int reserved2 :3; //BIT_15-17
239 volatile unsigned int rot_eb :1; //BIT_14
240 volatile unsigned int vsp_eb :1; //BIT_13
241 volatile unsigned int reserved1 :1; //BIT_12
242 volatile unsigned int bm1_eb :1; //BIT_11
243 volatile unsigned int reserved0 :2; //BIT_9-10
244 volatile unsigned int nfc_eb :1; //BIT_8
245 volatile unsigned int bm0_eb :1; //BIT_7
246 volatile unsigned int dma_eb :1; //BIT_6
247 volatile unsigned int usbd_eb :1; //BIT_5
248 volatile unsigned int sdio_eb :1; //BIT_4
249 volatile unsigned int lcdc_eb :1; //BIT_3
250 volatile unsigned int ccir_eb :1; //BIT_2
251 volatile unsigned int dcam_eb :1; //BIT_1
252 volatile unsigned int reserved :1; ////apb_eb :1;
254 volatile unsigned int dwValue ;
257 typedef union _ahb_ctl1_reg_tag
259 struct _ahb_ctl1_reg_map
261 volatile unsigned int reserved2 :15; //BIT_17-31
262 volatile unsigned int arm_dahb_sleep_en :1; //BIT_16
263 volatile unsigned int armmtx_auto_gate_en :1; //BIT_15
264 volatile unsigned int mstmtx_auto_gate_en :1; //BIT_14
265 volatile unsigned int mcu_auto_gate_en :1; //BIT_13
266 volatile unsigned int ahb_auto_gate_en :1; //BIT_12
267 volatile unsigned int arm_auto_gate_en :1; //BIT_11
268 volatile unsigned int reserved1 :1; //BIT_10
269 volatile unsigned int emc_ch_auto_gate_en :1; //BIT_9
270 volatile unsigned int emc_auto_gate_en :1; //BIT_8
271 volatile unsigned int reserved0 :6; //BIT_2-7
272 volatile unsigned int dcam_buf_status :1; //BIT_1
273 volatile unsigned int dcam_buf_sw :1; //BIT_0
275 volatile unsigned int dwValue ;
278 typedef union _ahb_ctl2_reg_tag
280 struct _ahb_ctl2_reg_map
282 volatile unsigned int reserved1 :27; //BIT_5-31
283 volatile unsigned int mcu_shm_ctrl :2; //BIT_3-4
284 volatile unsigned int Reserved0 :3; //BIT_0-2
286 volatile unsigned int dwValue ;
289 typedef union _ahb_ctl3_reg_tag
291 struct _ahb_ctl3_reg_map
293 volatile unsigned int reserved1 :21; //BIT_11-31
294 volatile unsigned int clk_ulpi_en :1; //BIT_10
295 volatile unsigned int utmi_suspend_inv :1; //BIT_9
296 volatile unsigned int utmifs_tx_en_inv :1; //BIT_8
297 volatile unsigned int clk_utmifs_en :1; //BIT_7
298 volatile unsigned int clk_usb_ref_en :1; //BIT_6
299 volatile unsigned int busmon_sel1 :1; //BIT_5
300 volatile unsigned int busmon_sel0 :1; //BIT_4
301 volatile unsigned int reserved0 :1; //BIT_3
302 volatile unsigned int usb_m_hbigendian :1; //BIT_2
303 volatile unsigned int usb_s_hbigendian :1; //BIT_1
304 volatile unsigned int clk_usb_ref_sel :1; //BIT_0
306 volatile unsigned int dwValue ;
310 typedef union _ahb_soft_rst_reg_tag
312 struct _ahb_soft_rst_reg_map
314 volatile unsigned int reserved2 :16;//Reserved
315 volatile unsigned int vsp_rst :1;//BIT_15
316 volatile unsigned int adc_rst :1;//BIT_14
317 volatile unsigned int drm_rst :1;//BIT_13
318 volatile unsigned int sd_rst :1;//BIT_12
319 volatile unsigned int emc_rst :1;//BIT_11
320 volatile unsigned int rot_rst :1;//BIT_10
321 volatile unsigned int reserved1 :2;//Reserved
322 volatile unsigned int usbphy_rst :1;//BIT_7
323 volatile unsigned int usbd_utmi_rst :1;//BIT_6
324 volatile unsigned int nfc_rst :1;//BIT_5
325 volatile unsigned int reserved0 :1;//Reserved
326 volatile unsigned int lcdc_rst :1;//BIT_3
327 volatile unsigned int ccir_rst :1;//BIT_2
328 volatile unsigned int dcam_rst :1; //BIT_1
329 volatile unsigned int dma_rst :1; //BIT_0
331 volatile unsigned int dwValue;
335 /**----------------------------------------------------------------------------*
336 ** Local Function Prototype **
337 **----------------------------------------------------------------------------*/
339 /**----------------------------------------------------------------------------*
340 ** Function Prototype **
341 **----------------------------------------------------------------------------*/
344 /**----------------------------------------------------------------------------*
346 **----------------------------------------------------------------------------*/
350 /**---------------------------------------------------------------------------*/