1 /******************************************************************************
2 ** File Name: chip_drv_common_io.h *
3 ** Author: Steve.Zhan *
5 ** Copyright: 2010 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 06/05/2010 Steve.Zhan Create. *
13 ******************************************************************************/
14 #ifndef _CHIP_DRV_COMMON_IO_H_
15 #define _CHIP_DRV_COMMON_IO_H_
16 /*----------------------------------------------------------------------------*
18 **------------------------------------------------------------------------- */
20 /**---------------------------------------------------------------------------*
22 **--------------------------------------------------------------------------*/
27 /**---------------------------------------------------------------------------*
29 **---------------------------------------------------------------------------*/
31 #include "sci_types.h"
33 typedef uint32 DRV_WORD;
34 typedef uint8 DRV_BYTE;
35 typedef uint16 DRV_WORD16;
36 typedef uint32 DRV_WORD32;
37 typedef uint64 DRV_WORD64;
38 typedef uint32 DRV_ADDRWORD;
39 #define drv_count32 long
44 #define BIT_0 0x00000001
45 #define BIT_1 0x00000002
46 #define BIT_2 0x00000004
47 #define BIT_3 0x00000008
48 #define BIT_4 0x00000010
49 #define BIT_5 0x00000020
50 #define BIT_6 0x00000040
51 #define BIT_7 0x00000080
52 #define BIT_8 0x00000100
53 #define BIT_9 0x00000200
54 #define BIT_10 0x00000400
55 #define BIT_11 0x00000800
56 #define BIT_12 0x00001000
57 #define BIT_13 0x00002000
58 #define BIT_14 0x00004000
59 #define BIT_15 0x00008000
60 #define BIT_16 0x00010000
61 #define BIT_17 0x00020000
62 #define BIT_18 0x00040000
63 #define BIT_19 0x00080000
64 #define BIT_20 0x00100000
65 #define BIT_21 0x00200000
66 #define BIT_22 0x00400000
67 #define BIT_23 0x00800000
68 #define BIT_24 0x01000000
69 #define BIT_25 0x02000000
70 #define BIT_26 0x04000000
71 #define BIT_27 0x08000000
72 #define BIT_28 0x10000000
73 #define BIT_29 0x20000000
74 #define BIT_30 0x40000000
75 #define BIT_31 0x80000000
77 #define BIT_(__n) (1<<(__n))
78 #define MASK_(__n,__w) (((1<<(__w))-1)<<(__n))
79 #define VALUE_(__n,__v) ((__v)<<(__n))
82 typedef uint32 ChipRegT;
83 //#define REG32(ChipReg) ( *((volatile ChipRegT*) (ChipReg)))
84 #define REG32(x) (*((volatile uint32 *)(x)))
86 typedef uint16 ChipRegT16;
87 #define REG16(ChipReg) ( *((volatile ChipRegT16*) (ChipReg)))
89 #define REG8(ChipReg) ( *((volatile uint8*) (ChipReg)))
90 #define CHIP_REG_OR(reg_addr, value) (*(volatile uint32 *)(reg_addr) |= (uint32)(value))
91 #define CHIP_REG_AND(reg_addr, value) (*(volatile uint32 *)(reg_addr) &= (uint32)(value))
92 #define CHIP_REG_GET(reg_addr) (*(volatile uint32 *)(reg_addr))
93 #define CHIP_REG_SET(reg_addr, value) (*(volatile uint32 *)(reg_addr) = (uint32)(value))
94 #define SET_BIT(reg,bit) ((reg) |= (1<<(bit)))
95 #define CLR_BIT(reg,bit) ((reg) &= ~(1<<(bit)))
96 #define TST_BIT(a,b) (((a)>>(b))&1)
97 #define XOR_BIT(a,b) ((a) ^= (1<<(b)))
100 #define ARR_SIZE(x) (sizeof(x) / sizeof(x[0]) )
103 #define MIN(x,y) (((x) < (y)) ? (x): (y))
105 #define MAX(x,y) (((x) > (y)) ? (x): (y))
108 #define ABS(x) (((x) < (0)) ? (-x):(x))
110 #define SWAP16(X) ( ((X & 0xFF00) >> 8) | ((X & 0x00FF) << 8) )
111 #define SWAP32(X) (((n) << 24) | (((n) & 0xff00) << 8) | (((n) >> 8) & 0xff00) | ((n) >> 24))
112 #define SWAP_AB(type,a,b) { type tmp; tmp=a; a=b; b=tmp; }
116 //Debug info Function and MacroS.
119 #define CHIP_DRV_ASSERT SCI_ASSERT
120 #define CHIP_DRV_PASSERT SCI_PASSERT
122 #define CHIP_DRV_ASSERT NULL
123 #define CHIP_DRV_PASSERT NULL
127 #define DRV_LSBFIRST 1234
128 #define DRV_MSBFIRST 4321
129 #define DRV_BYTEORDER DRV_MSBFIRST // Big endian
132 #define DRV_MACRO_START do {
133 #define DRV_MACRO_END } while (0)
135 #define DRV_EMPTY_STATEMENT DRV_MACRO_START DRV_MACRO_END
137 #define DRV_UNUSED_PARAM( _type_, _name_ ) DRV_MACRO_START \
138 _type_ __tmp1 = (_name_); \
139 _type_ __tmp2 = __tmp1; \
145 #ifndef HAL_IO_MACROS_DEFINED
147 //-----------------------------------------------------------------------------
148 // BYTE Register access.
149 // Individual and vectorized access to 8 bit registers.
151 // Little-endian version or big-endian version that doesn't need address munging
152 #if (DRV_BYTEORDER == DRV_LSBFIRST) || defined(HAL_IO_MACROS_NO_ADDRESS_MUNGING)
154 #define HAL_READ_UINT8( _register_, _value_ ) \
155 ((_value_) = *((volatile DRV_BYTE *)(_register_)))
157 #define HAL_WRITE_UINT8( _register_, _value_ ) \
158 (*((volatile DRV_BYTE *)(_register_)) = (_value_))
160 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
162 drv_count32 _i_,_j_; \
163 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
164 (_buf_)[_i_] = ((volatile DRV_BYTE *)(_register_))[_j_]; \
167 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
169 drv_count32 _i_,_j_; \
170 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
171 ((volatile DRV_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
174 #define HAL_READ_UINT8_STRING( _register_, _buf_, _count_ ) \
177 for( _i_ = 0; _i_ < (_count_); _i_++) \
178 (_buf_)[_i_] = ((volatile DRV_BYTE *)(_register_))[_i_]; \
181 #define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_ ) \
184 for( _i_ = 0; _i_ < (_count_); _i_++) \
185 ((volatile DRV_BYTE *)(_register_)) = (_buf_)[_i_]; \
188 #else // Big-endian version
190 #define HAL_READ_UINT8( _register_, _value_ ) \
191 ((_value_) = *((volatile DRV_BYTE *)((DRV_ADDRWORD)(_register_)^3)))
193 #define HAL_WRITE_UINT8( _register_, _value_ ) \
194 (*((volatile DRV_BYTE *)((DRV_ADDRWORD)(_register_)^3)) = (_value_))
196 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
198 drv_count32 _i_,_j_; \
199 volatile DRV_BYTE* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
200 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
201 (_buf_)[_i_] = _r_[_j_]; \
204 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
206 drv_count32 _i_,_j_; \
207 volatile DRV_BYTE* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
208 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
209 _r_[_j_] = (_buf_)[_i_]; \
212 #define HAL_READ_UINT8_STRING( _register_, _buf_, _count_ ) \
215 volatile DRV_BYTE* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
216 for( _i_ = 0; _i_ < (_count_); _i_++; \
217 (_buf_)[_i_] = _r_[_i_]; \
220 #define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_ ) \
223 volatile DRV_BYTE* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
224 for( _i_ = 0; _i_ < (_count_); _i_++) \
225 _r_[_i_] = (_buf_)[_i_]; \
230 //-----------------------------------------------------------------------------
232 // Individual and vectorized access to 16 bit registers.
234 // Little-endian version or big-endian version that doesn't need address munging
235 #if (DRV_BYTEORDER == DRV_LSBFIRST) || defined(HAL_IO_MACROS_NO_ADDRESS_MUNGING)
237 #define HAL_READ_UINT16( _register_, _value_ ) \
238 ((_value_) = *((volatile DRV_WORD16 *)(_register_)))
240 #define HAL_WRITE_UINT16( _register_, _value_ ) \
241 (*((volatile DRV_WORD16 *)(_register_)) = (_value_))
243 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
245 drv_count32 _i_,_j_; \
246 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
247 (_buf_)[_i_] = ((volatile DRV_WORD16 *)(_register_))[_j_]; \
250 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
252 drv_count32 _i_,_j_; \
253 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
254 ((volatile DRV_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
257 #define HAL_READ_UINT16_STRING( _register_, _buf_, _count_) \
260 for( _i_ = 0; _i_ < (_count_); _i_++) \
261 (_buf_)[_i_] = ((volatile DRV_WORD16 *)(_register_))[_i_]; \
264 #define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_) \
267 for( _i_ = 0; _i_ < (_count_); _i_++) \
268 ((volatile DRV_WORD16 *)(_register_))[_i_] = (_buf_)[_i_]; \
272 #else // Big-endian version
274 #define HAL_READ_UINT16( _register_, _value_ ) \
275 ((_value_) = *((volatile DRV_WORD16 *)((DRV_ADDRWORD)(_register_)^3)))
277 #define HAL_WRITE_UINT16( _register_, _value_ ) \
278 (*((volatile DRV_WORD16 *)((DRV_ADDRWORD)(_register_)^3)) = (_value_))
280 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
282 drv_count32 _i_,_j_; \
283 volatile DRV_WORD16* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
284 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
285 (_buf_)[_i_] = _r_[_j_]; \
288 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
290 drv_count32 _i_,_j_; \
291 volatile DRV_WORD16* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
292 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
293 _r_[_j_] = (_buf_)[_i_]; \
296 #define HAL_READ_UINT16_STRING( _register_, _buf_, _count_) \
299 volatile DRV_WORD16* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
300 for( _i_ = 0 = 0; _i_ < (_count_); _i_++) \
301 (_buf_)[_i_] = _r_[_i_]; \
304 #define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_) \
307 volatile DRV_WORD16* _r_ = ((DRV_ADDRWORD)(_register_)^3); \
308 for( _i_ = 0 = 0; _i_ < (_count_); _i_++) \
309 _r_[_i_] = (_buf_)[_i_]; \
315 //-----------------------------------------------------------------------------
317 // Individual and vectorized access to 32 bit registers.
319 // Note: same macros for little- and big-endian systems.
321 #define HAL_READ_UINT32( _register_, _value_ ) \
322 ((_value_) = *((volatile DRV_WORD32 *)(_register_)))
324 #define HAL_WRITE_UINT32( _register_, _value_ ) \
325 (*((volatile DRV_WORD32 *)(_register_)) = (_value_))
327 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
329 drv_count32 _i_,_j_; \
330 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
331 (_buf_)[_i_] = ((volatile DRV_WORD32 *)(_register_))[_j_]; \
334 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
336 drv_count32 _i_,_j_; \
337 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
338 ((volatile DRV_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
341 #define HAL_READ_UINT32_STRING( _register_, _buf_, _count_) \
344 for( _i_ = 0; _i_ < (_count_); _i_++) \
345 (_buf_)[_i_] = ((volatile DRV_WORD32 *)(_register_))[_i_]; \
348 #define HAL_WRITE_UINT32_STRING( _register_, _buf_, _count_) \
351 for( _i_ = 0; _i_ < (_count_); _i_++) \
352 ((volatile DRV_WORD32 *)(_register_))[_i_] = (_buf_)[_i_]; \
356 #define HAL_IO_MACROS_DEFINED
358 #endif // !HAL_IO_MACROS_DEFINED
361 /**----------------------------------------------------------------------------*
362 ** Local Function Prototype **
363 **----------------------------------------------------------------------------*/
365 /**----------------------------------------------------------------------------*
366 ** Function Prototype **
367 **----------------------------------------------------------------------------*/
370 /**----------------------------------------------------------------------------*
372 **----------------------------------------------------------------------------*/
376 /**---------------------------------------------------------------------------*/