3 * Samsung Electronics, <www.samsung.com/sec>
4 * Heungjun Kim <riverful.kim@samsung.com>
5 * Minkyu Kang <mk7.kang@samsung.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #ifndef __ASM_ARM_ARCH_MEM_H_
25 #define __ASM_ARM_ARCH_MEM_H_
27 /* DRAM Memory Controller */
28 #define CONCONTROL_OFFSET 0x00
29 #define MEMCONTROL_OFFSET 0x04
30 #define MEMCONFIG0_OFFSET 0x08
31 #define MEMCONFIG1_OFFSET 0x0c
32 #define DIRECTCMD_OFFSET 0x10
33 #define PRECHCONFIG_OFFSET 0x14
34 #define PHYCONTROL0_OFFSET 0x18
35 #define PHYCONTROL1_OFFSET 0x1c
36 #define PHYCONTROL2_OFFSET 0x20
37 #define PWRDNCONFIG_OFFSET 0x28
38 #define TIMINGAREF_OFFSET 0x30
39 #define TIMINGROW_OFFSET 0x34
40 #define TIMINGDATA_OFFSET 0x38
41 #define TIMINGPOWER_OFFSET 0x3c
42 #define PHYSTATUS0_OFFSET 0x40
43 #define PHYSTATUS1_OFFSET 0x44
44 #define CHIP0STATUS_OFFSET 0x48
45 #define CHIP1STATUS_OFFSET 0x4c
46 #define AREFSTATUS_OFFSET 0x50
47 #define MRSTATUS_OFFSET 0x54
48 #define PHYTEST0_OFFSET 0x58
49 #define PHYTEST1_OFFSET 0x5c