1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2016 Google, Inc
4 * (C) Copyright 2008-2014 Rockchip Electronics
7 #ifndef _ASM_ARCH_PWM_H
8 #define _ASM_ARCH_PWM_H
10 struct rockchip_pwm_regs {
17 #define PWM_CTRL_TIMER_EN (1 << 0)
18 #define PWM_CTRL_OUTPUT_EN (1 << 3)
20 #define RK_PWM_DISABLE (0 << 0)
21 #define RK_PWM_ENABLE (1 << 0)
23 #define PWM_ONE_SHOT (0 << 1)
24 #define PWM_CONTINUOUS (1 << 1)
25 #define RK_PWM_CAPTURE (1 << 2)
27 #define PWM_DUTY_POSTIVE (1 << 3)
28 #define PWM_DUTY_NEGATIVE (0 << 3)
29 #define PWM_DUTY_MASK (1 << 3)
31 #define PWM_INACTIVE_POSTIVE (1 << 4)
32 #define PWM_INACTIVE_NEGATIVE (0 << 4)
33 #define PWM_INACTIVE_MASK (1 << 4)
35 #define PWM_OUTPUT_LEFT (0 << 5)
36 #define PWM_OUTPUT_CENTER (1 << 5)
38 #define PWM_LOCK (1 << 6)
39 #define PWM_UNLOCK (0 << 6)
41 #define PWM_LP_ENABLE (1 << 8)
42 #define PWM_LP_DISABLE (0 << 8)
44 #define PWM_SEL_SCALE_CLK (1 << 9)
45 #define PWM_SEL_SRC_CLK (0 << 9)