1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
10 #include <linux/bitops.h>
13 #define GX_FIRMWARE_MEM_SIZE 0x1000000
15 #define GX_AOBUS_BASE 0xc8100000
16 #define GX_PERIPHS_BASE 0xc8834400
17 #define GX_HIU_BASE 0xc883c000
18 #define GX_ETH_BASE 0xc9410000
20 /* Always-On Peripherals registers */
21 #define GX_AO_ADDR(off) (GX_AOBUS_BASE + ((off) << 2))
23 #define GX_AO_SEC_GP_CFG0 GX_AO_ADDR(0x90)
24 #define GX_AO_SEC_GP_CFG3 GX_AO_ADDR(0x93)
25 #define GX_AO_SEC_GP_CFG4 GX_AO_ADDR(0x94)
26 #define GX_AO_SEC_GP_CFG5 GX_AO_ADDR(0x95)
28 #define GX_AO_BOOT_DEVICE 0xF
29 #define GX_AO_MEM_SIZE_MASK 0xFFFF0000
30 #define GX_AO_MEM_SIZE_SHIFT 16
31 #define GX_AO_BL31_RSVMEM_SIZE_MASK 0xFFFF0000
32 #define GX_AO_BL31_RSVMEM_SIZE_SHIFT 16
33 #define GX_AO_BL32_RSVMEM_SIZE_MASK 0xFFFF
35 /* Peripherals registers */
36 #define GX_PERIPHS_ADDR(off) (GX_PERIPHS_BASE + ((off) << 2))
38 /* GPIO registers 0 to 6 */
39 #define _GX_GPIO_OFF(n) ((n) == 6 ? 0x08 : 0x0c + 3 * (n))
40 #define GX_GPIO_EN(n) GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 0)
41 #define GX_GPIO_IN(n) GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 1)
42 #define GX_GPIO_OUT(n) GX_PERIPHS_ADDR(_GX_GPIO_OFF(n) + 2)
44 #define GX_ETH_REG_0 GX_PERIPHS_ADDR(0x50)
45 #define GX_ETH_REG_1 GX_PERIPHS_ADDR(0x51)
46 #define GX_ETH_REG_2 GX_PERIPHS_ADDR(0x56)
47 #define GX_ETH_REG_3 GX_PERIPHS_ADDR(0x57)
49 #define GX_ETH_REG_0_PHY_INTF BIT(0)
50 #define GX_ETH_REG_0_TX_PHASE(x) (((x) & 3) << 5)
51 #define GX_ETH_REG_0_TX_RATIO(x) (((x) & 7) << 7)
52 #define GX_ETH_REG_0_PHY_CLK_EN BIT(10)
53 #define GX_ETH_REG_0_INVERT_RMII_CLK BIT(11)
54 #define GX_ETH_REG_0_CLK_EN BIT(12)
57 #define GX_HIU_ADDR(off) (GX_HIU_BASE + ((off) << 2))
59 #define GX_MEM_PD_REG_0 GX_HIU_ADDR(0x40)
61 /* Ethernet memory power domain */
62 #define GX_MEM_PD_REG_0_ETH_MASK (BIT(2) | BIT(3))