1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Common definitions for LPC32XX board configurations
5 * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
8 #ifndef _LPC32XX_CONFIG_H
9 #define _LPC32XX_CONFIG_H
12 /* Basic CPU architecture */
13 #define CONFIG_ARCH_CPU_INIT
15 /* UART configuration */
16 #if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
17 (CONFIG_SYS_LPC32XX_UART == 7)
18 #if !defined(CONFIG_LPC32XX_HSUART)
19 #define CONFIG_LPC32XX_HSUART
23 #if !defined(CONFIG_SYS_NS16550_CLK)
24 #define CONFIG_SYS_NS16550_CLK 13000000
27 #define CONFIG_SYS_BAUDRATE_TABLE \
28 { 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
31 #define LPC32XX_ETH_BASE ETHERNET_BASE
34 #if defined(CONFIG_NAND_LPC32XX_SLC)
35 #define NAND_LARGE_BLOCK_PAGE_SIZE 0x800
36 #define NAND_SMALL_BLOCK_PAGE_SIZE 0x200
38 #if !defined(CONFIG_SYS_NAND_PAGE_SIZE)
39 #define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
42 #if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
43 #define CONFIG_SYS_NAND_OOBSIZE 64
44 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
45 48, 49, 50, 51, 52, 53, 54, 55, \
46 56, 57, 58, 59, 60, 61, 62, 63, }
47 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
48 #elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE)
49 #define CONFIG_SYS_NAND_OOBSIZE 16
50 #define CONFIG_SYS_NAND_ECCPOS { 10, 11, 12, 13, 14, 15, }
51 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
53 #error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value"
56 #define CONFIG_SYS_NAND_ECCSIZE 0x100
57 #define CONFIG_SYS_NAND_ECCBYTES 3
58 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
59 CONFIG_SYS_NAND_PAGE_SIZE)
60 #endif /* CONFIG_NAND_LPC32XX_SLC */
63 #if defined(CONFIG_SYS_FLASH_CFI)
64 #define CONFIG_FLASH_CFI_DRIVER
65 #define CONFIG_SYS_FLASH_PROTECTION
69 #if defined(CONFIG_USB_OHCI_LPC32XX)
70 #define CONFIG_USB_OHCI_NEW
71 #define CONFIG_SYS_USB_OHCI_CPU_INIT
72 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
73 #define CONFIG_SYS_USB_OHCI_REGS_BASE USB_BASE
74 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "lpc32xx-ohci"
77 #endif /* _LPC32XX_CONFIG_H */