3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
6 * Derived from drivers/spi/mpc8xxx_spi.c
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
30 /* SPI Registers on kirkwood SOC */
31 struct kwspi_registers {
32 u32 ctrl; /* 0x10600 */
33 u32 cfg; /* 0x10604 */
34 u32 dout; /* 0x10608 */
35 u32 din; /* 0x1060c */
36 u32 irq_cause; /* 0x10610 */
37 u32 irq_mask; /* 0x10614 */
40 /* They are used to define CONFIG_SYS_KW_SPI_MPP
41 * each of the below #defines selects which mpp is
42 * configured for each SPI signal in spi_claim_bus
43 * bit 0: selects pin for MOSI (MPP1 if 0, MPP6 if 1)
44 * bit 1: selects pin for SCK (MPP2 if 0, MPP10 if 1)
45 * bit 2: selects pin for MISO (MPP3 if 0, MPP11 if 1)
47 #define MOSI_MPP6 (1 << 0)
48 #define SCK_MPP10 (1 << 1)
49 #define MISO_MPP11 (1 << 2)
51 #define KWSPI_CLKPRESCL_MASK 0x1f
52 #define KWSPI_CSN_ACT 1 /* Activates serial memory interface */
53 #define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */
54 #define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */
55 #define KWSPI_IRQMASK 0 /* mask SPI interrupt */
56 #define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */
57 #define KWSPI_XFERLEN_1BYTE 0
58 #define KWSPI_XFERLEN_2BYTE (1 << 5)
59 #define KWSPI_XFERLEN_MASK (1 << 5)
60 #define KWSPI_ADRLEN_1BYTE 0
61 #define KWSPI_ADRLEN_2BYTE 1 << 8
62 #define KWSPI_ADRLEN_3BYTE 2 << 8
63 #define KWSPI_ADRLEN_4BYTE 3 << 8
64 #define KWSPI_ADRLEN_MASK 3 << 8
65 #define KWSPI_TIMEOUT 10000
67 #endif /* __KW_SPI_H__ */