2 * (C) Copyright 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 #ifndef __ASM_ARCH_GPIO_H
22 #define __ASM_ARCH_GPIO_H
25 struct s5p_gpio_bank {
31 unsigned int pdn_pull;
32 unsigned char res1[8];
35 struct exynos4_gpio_part1 {
36 struct s5p_gpio_bank a0;
37 struct s5p_gpio_bank a1;
38 struct s5p_gpio_bank b;
39 struct s5p_gpio_bank c0;
40 struct s5p_gpio_bank c1;
41 struct s5p_gpio_bank d0;
42 struct s5p_gpio_bank d1;
43 #if defined(CONFIG_EXYNOS4210)
44 struct s5p_gpio_bank e0;
45 struct s5p_gpio_bank e1;
46 struct s5p_gpio_bank e2;
47 struct s5p_gpio_bank e3;
48 struct s5p_gpio_bank e4;
50 struct s5p_gpio_bank res0[5];
52 struct s5p_gpio_bank f0;
53 struct s5p_gpio_bank f1;
54 struct s5p_gpio_bank f2;
55 struct s5p_gpio_bank f3;
56 #if !defined(CONFIG_EXYNOS4210)
57 struct s5p_gpio_bank res1[2];
58 struct s5p_gpio_bank j0;
59 struct s5p_gpio_bank j1;
63 struct exynos4_gpio_part2 {
64 #if defined(CONFIG_EXYNOS4210)
65 struct s5p_gpio_bank j0;
66 struct s5p_gpio_bank j1;
68 struct s5p_gpio_bank res0[2];
70 struct s5p_gpio_bank k0;
71 struct s5p_gpio_bank k1;
72 struct s5p_gpio_bank k2;
73 struct s5p_gpio_bank k3;
74 struct s5p_gpio_bank l0;
75 struct s5p_gpio_bank l1;
76 struct s5p_gpio_bank l2;
77 struct s5p_gpio_bank y0;
78 struct s5p_gpio_bank y1;
79 struct s5p_gpio_bank y2;
80 struct s5p_gpio_bank y3;
81 struct s5p_gpio_bank y4;
82 struct s5p_gpio_bank y5;
83 struct s5p_gpio_bank y6;
84 #if defined(CONFIG_EXYNOS4210)
85 struct s5p_gpio_bank res1[80];
87 struct s5p_gpio_bank res1[3];
88 struct s5p_gpio_bank m0;
89 struct s5p_gpio_bank m1;
90 struct s5p_gpio_bank m2;
91 struct s5p_gpio_bank m3;
92 struct s5p_gpio_bank m4;
93 struct s5p_gpio_bank res2[72];
95 struct s5p_gpio_bank x0;
96 struct s5p_gpio_bank x1;
97 struct s5p_gpio_bank x2;
98 struct s5p_gpio_bank x3;
101 struct exynos4_gpio_part3 {
102 struct s5p_gpio_bank z;
106 void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
107 void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
108 void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
109 void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
110 unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
111 void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
112 void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
113 void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
116 /* Pin configurations */
117 #define GPIO_INPUT 0x0
118 #define GPIO_OUTPUT 0x1
120 #define GPIO_FUNC(x) (x)
123 #define GPIO_PULL_NONE 0x0
124 #define GPIO_PULL_DOWN 0x1
125 #define GPIO_PULL_UP 0x3
127 /* Drive Strength level */
128 #define GPIO_DRV_1X 0x0
129 #define GPIO_DRV_3X 0x1
130 #define GPIO_DRV_2X 0x2
131 #define GPIO_DRV_4X 0x3
132 #define GPIO_DRV_FAST 0x0
133 #define GPIO_DRV_SLOW 0x1