2 * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd. All rights reserved.
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Sanghee Kim <sh0130.kim@samsung.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 #ifndef __ASM_ARCH_CPU_H
23 #define __ASM_ARCH_CPU_H
25 #define EXYNOS4_ADDR_BASE 0x10000000
28 #define EXYNOS4_GPIO_PART3_BASE 0x03860000
29 #define EXYNOS4_PRO_ID 0x10000000
30 #define EXYNOS4_SYSREG_BASE 0x10010000
31 #define EXYNOS4_POWER_BASE 0x10020000
32 #define EXYNOS4_INFORM_BASE 0x10020800
33 #define EXYNOS4_CLOCK_BASE 0x10030000
34 #define EXYNOS4_MCT_BASE 0x10050000
35 #define EXYNOS4_WDT_BASE 0x10060000
36 #define EXYNOS4_SECKEY_BASE 0x10100000
37 #if defined(CONFIG_EXYNOS4210)
38 #define EXYNOS4_DMC0_BASE 0x10400000
39 #define EXYNOS4_DMC1_BASE 0x10410000
41 #define EXYNOS4_DMC0_BASE 0x10600000
42 #define EXYNOS4_DMC1_BASE 0x10610000
44 #define EXYNOS4_GPIO_PART2_BASE 0x11000000
45 #define EXYNOS4_GPIO_PART1_BASE 0x11400000
46 #define EXYNOS4_FIMD_BASE 0x11C00000
47 #define EXYNOS4_MIPI_DSIM_BASE 0x11C80000
48 #define EXYNOS4_USBOTG_BASE 0x12480000
49 #define EXYNOS4_MMC_BASE 0x12510000
50 #define EXYNOS4_SROMC_BASE 0x12570000
51 #define EXYNOS4_USBPHY_BASE 0x125B0000
52 #define EXYNOS4_UART_BASE 0x13800000
53 #if defined(CONFIG_EXYNOS4210)
54 #define EXYNOS4_ADC_BASE 0x13910000
56 #define EXYNOS4_ADC_BASE 0x12150000
58 #define EXYNOS4_PWMTIMER_BASE 0x139D0000
64 #define EXYNOS4_LCDBLK_CFG (EXYNOS4_SYSREG_BASE + 0x0210)
70 #define EXYNOS4_SWRESET (EXYNOS4_POWER_BASE + 0x400)
71 #define EXYNOS4_RST_STAT (EXYNOS4_POWER_BASE + 0x404)
73 #define S5P_PRO_ID EXYNOS4_PRO_ID
74 #define S5P_SWRESET EXYNOS4_SWRESET
75 #define S5P_RST_STAT EXYNOS4_RST_STAT
80 /* CPU detection macros */
81 extern unsigned int s5p_cpu_id;
82 extern unsigned int s5p_cpu_rev;
84 static inline int s5p_get_cpu_rev(void)
89 static inline void s5p_set_cpu_rev(unsigned int rev)
94 static inline void s5p_set_cpu_id(void)
97 * PRO_ID[31:16] = Product ID
98 * 0x4320: EXYNOS4210 EVT0
99 * 0x4321: EXYNOS4210 EVT1
103 s5p_cpu_id = readl(EXYNOS4_PRO_ID) >> 16;
105 switch (s5p_cpu_id) {
116 /* PRO_ID[7:0] = MainRev + SubRev */
117 s5p_set_cpu_rev(readl(EXYNOS4_PRO_ID) & 0xff);
121 static inline int cpu_is_exynos4(void)
123 switch (s5p_cpu_id) {
133 #define IS_SAMSUNG_TYPE(type, id) \
134 static inline int cpu_is_##type(void) \
136 return s5p_cpu_id == id ? 1 : 0; \
139 IS_SAMSUNG_TYPE(exynos4210, 0x4321)
140 IS_SAMSUNG_TYPE(exynos4212, 0x4322)
141 IS_SAMSUNG_TYPE(exynos4412, 0xE441)
143 #define SAMSUNG_BASE(device, base) \
144 static inline unsigned int samsung_get_base_##device(void) \
146 if (cpu_is_exynos4()) \
147 return EXYNOS4_##base; \
152 SAMSUNG_BASE(power, POWER_BASE)
153 SAMSUNG_BASE(adc, ADC_BASE)
154 SAMSUNG_BASE(clock, CLOCK_BASE)
155 SAMSUNG_BASE(fimd, FIMD_BASE)
156 SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE)
157 SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
158 SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
159 SAMSUNG_BASE(gpio_part3, GPIO_PART3_BASE)
160 SAMSUNG_BASE(pro_id, PRO_ID)
161 SAMSUNG_BASE(mmc, MMC_BASE)
162 SAMSUNG_BASE(sromc, SROMC_BASE)
163 SAMSUNG_BASE(swreset, SWRESET)
164 SAMSUNG_BASE(timer, PWMTIMER_BASE)
165 SAMSUNG_BASE(uart, UART_BASE)
166 SAMSUNG_BASE(usb_phy, USBPHY_BASE)
167 SAMSUNG_BASE(usb_otg, USBOTG_BASE)
168 SAMSUNG_BASE(systimer, MCT_BASE)
169 SAMSUNG_BASE(watchdog, WDT_BASE)
170 SAMSUNG_BASE(dmc, DMC0_BASE)
173 #endif /* __ASM_ARCH_CPU_H */