2 * (C) Copyright 2012 Stephen Warren
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef _BCM2835_MBOX_H
8 #define _BCM2835_MBOX_H
10 #include <linux/compiler.h>
13 * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
14 * and the ARM CPU. The ARM CPU is often thought of as the main CPU.
15 * However, the VideoCore actually controls the initial SoC boot, and hides
16 * much of the hardware behind a protocol. This protocol is transported
17 * using the SoC's mailbox hardware module.
19 * The mailbox hardware supports passing 32-bit values back and forth.
20 * Presumably by software convention of the firmware, the bottom 4 bits of the
21 * value are used to indicate a logical channel, and the upper 28 bits are the
22 * actual payload. Various channels exist using these simple raw messages. See
23 * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
24 * example, the messages on the power management channel are a bitmask of
25 * devices whose power should be enabled.
27 * The property mailbox channel passes messages that contain the (16-byte
28 * aligned) ARM physical address of a memory buffer. This buffer is passed to
29 * the VC for processing, is modified in-place by the VC, and the address then
30 * passed back to the ARM CPU as the response mailbox message to indicate
31 * request completion. The buffers have a generic and extensible format; each
32 * buffer contains a standard header, a list of "tags", and a terminating zero
33 * entry. Each tag contains an ID indicating its type, and length fields for
34 * generic parsing. With some limitations, an arbitrary set of tags may be
35 * combined together into a single message buffer. This file defines structs
36 * representing the header and many individual tag layouts and IDs.
41 #define BCM2835_MBOX_PHYSADDR 0x2000b880
43 struct bcm2835_mbox_regs {
51 #define BCM2835_MBOX_STATUS_WR_FULL 0x80000000
52 #define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000
54 /* Lower 4-bits are channel ID */
55 #define BCM2835_CHAN_MASK 0xf
56 #define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \
57 (chan & BCM2835_CHAN_MASK))
58 #define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK)
59 #define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK))
61 /* Property mailbox buffer structures */
63 #define BCM2835_MBOX_PROP_CHAN 8
65 /* All message buffers must start with this header */
66 struct bcm2835_mbox_hdr {
71 #define BCM2835_MBOX_REQ_CODE 0
72 #define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000
74 #define BCM2835_MBOX_INIT_HDR(_m_) { \
75 memset((_m_), 0, sizeof(*(_m_))); \
76 (_m_)->hdr.buf_size = sizeof(*(_m_)); \
77 (_m_)->hdr.code = 0; \
82 * A message buffer contains a list of tags. Each tag must also start with
83 * a standardized header.
85 struct bcm2835_mbox_tag_hdr {
91 #define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
92 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
93 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
94 (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
97 #define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
98 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
99 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
100 (_t_)->tag_hdr.val_len = 0; \
103 /* When responding, the VC sets this bit in val_len to indicate a response */
104 #define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000
107 * Below we define the ID and struct for many possible tags. This header only
108 * defines individual tag structs, not entire message structs, since in
109 * general an arbitrary set of tags may be combined into a single message.
110 * Clients of the mbox API are expected to define their own overall message
111 * structures by combining the header, a set of tags, and a terminating
112 * entry. For example,
115 * struct bcm2835_mbox_hdr hdr;
116 * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
117 * ... perhaps other tags here ...
122 #define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003
124 struct bcm2835_mbox_tag_get_mac_address {
125 struct bcm2835_mbox_tag_hdr tag_hdr;
136 #define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005
138 struct bcm2835_mbox_tag_get_arm_mem {
139 struct bcm2835_mbox_tag_hdr tag_hdr;
150 #define BCM2835_MBOX_POWER_DEVID_SDHCI 0
151 #define BCM2835_MBOX_POWER_DEVID_UART0 1
152 #define BCM2835_MBOX_POWER_DEVID_UART1 2
153 #define BCM2835_MBOX_POWER_DEVID_USB_HCD 3
154 #define BCM2835_MBOX_POWER_DEVID_I2C0 4
155 #define BCM2835_MBOX_POWER_DEVID_I2C1 5
156 #define BCM2835_MBOX_POWER_DEVID_I2C2 6
157 #define BCM2835_MBOX_POWER_DEVID_SPI 7
158 #define BCM2835_MBOX_POWER_DEVID_CCP2TX 8
160 #define BCM2835_MBOX_POWER_STATE_RESP_ON (1 << 0)
161 /* Device doesn't exist */
162 #define BCM2835_MBOX_POWER_STATE_RESP_NODEV (1 << 1)
164 #define BCM2835_MBOX_TAG_GET_POWER_STATE 0x00020001
166 struct bcm2835_mbox_tag_get_power_state {
167 struct bcm2835_mbox_tag_hdr tag_hdr;
179 #define BCM2835_MBOX_TAG_SET_POWER_STATE 0x00028001
181 #define BCM2835_MBOX_SET_POWER_STATE_REQ_ON (1 << 0)
182 #define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT (1 << 1)
184 struct bcm2835_mbox_tag_set_power_state {
185 struct bcm2835_mbox_tag_hdr tag_hdr;
198 #define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002
200 #define BCM2835_MBOX_CLOCK_ID_EMMC 1
201 #define BCM2835_MBOX_CLOCK_ID_UART 2
202 #define BCM2835_MBOX_CLOCK_ID_ARM 3
203 #define BCM2835_MBOX_CLOCK_ID_CORE 4
204 #define BCM2835_MBOX_CLOCK_ID_V3D 5
205 #define BCM2835_MBOX_CLOCK_ID_H264 6
206 #define BCM2835_MBOX_CLOCK_ID_ISP 7
207 #define BCM2835_MBOX_CLOCK_ID_SDRAM 8
208 #define BCM2835_MBOX_CLOCK_ID_PIXEL 9
209 #define BCM2835_MBOX_CLOCK_ID_PWM 10
211 struct bcm2835_mbox_tag_get_clock_rate {
212 struct bcm2835_mbox_tag_hdr tag_hdr;
224 #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001
226 struct bcm2835_mbox_tag_allocate_buffer {
227 struct bcm2835_mbox_tag_hdr tag_hdr;
239 #define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001
241 struct bcm2835_mbox_tag_release_buffer {
242 struct bcm2835_mbox_tag_hdr tag_hdr;
251 #define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002
253 struct bcm2835_mbox_tag_blank_screen {
254 struct bcm2835_mbox_tag_hdr tag_hdr;
257 /* bit 0 means on, other bots reserved */
266 /* Physical means output signal */
267 #define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003
268 #define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003
269 #define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003
271 struct bcm2835_mbox_tag_physical_w_h {
272 struct bcm2835_mbox_tag_hdr tag_hdr;
274 /* req not used for get */
286 /* Virtual means display buffer */
287 #define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004
288 #define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004
289 #define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004
291 struct bcm2835_mbox_tag_virtual_w_h {
292 struct bcm2835_mbox_tag_hdr tag_hdr;
294 /* req not used for get */
306 #define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005
307 #define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005
308 #define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005
310 struct bcm2835_mbox_tag_depth {
311 struct bcm2835_mbox_tag_hdr tag_hdr;
313 /* req not used for get */
323 #define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006
324 #define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005
325 #define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006
327 #define BCM2835_MBOX_PIXEL_ORDER_BGR 0
328 #define BCM2835_MBOX_PIXEL_ORDER_RGB 1
330 struct bcm2835_mbox_tag_pixel_order {
331 struct bcm2835_mbox_tag_hdr tag_hdr;
333 /* req not used for get */
343 #define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007
344 #define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007
345 #define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007
347 #define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0
348 #define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1
349 #define BCM2835_MBOX_ALPHA_MODE_IGNORED 2
351 struct bcm2835_mbox_tag_alpha_mode {
352 struct bcm2835_mbox_tag_hdr tag_hdr;
354 /* req not used for get */
364 #define BCM2835_MBOX_TAG_GET_PITCH 0x00040008
366 struct bcm2835_mbox_tag_pitch {
367 struct bcm2835_mbox_tag_hdr tag_hdr;
377 /* Offset of display window within buffer */
378 #define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009
379 #define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009
380 #define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009
382 struct bcm2835_mbox_tag_virtual_offset {
383 struct bcm2835_mbox_tag_hdr tag_hdr;
385 /* req not used for get */
397 #define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a
398 #define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a
399 #define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a
401 struct bcm2835_mbox_tag_overscan {
402 struct bcm2835_mbox_tag_hdr tag_hdr;
404 /* req not used for get */
420 #define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b
422 struct bcm2835_mbox_tag_get_palette {
423 struct bcm2835_mbox_tag_hdr tag_hdr;
433 #define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b
435 struct bcm2835_mbox_tag_test_palette {
436 struct bcm2835_mbox_tag_hdr tag_hdr;
449 #define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b
451 struct bcm2835_mbox_tag_set_palette {
452 struct bcm2835_mbox_tag_hdr tag_hdr;
466 * Pass a raw u32 message to the VC, and receive a raw u32 back.
468 * Returns 0 for success, any other value for error.
470 int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);
473 * Pass a complete property-style buffer to the VC, and wait until it has
476 * This function expects a pointer to the mbox_hdr structure in an attempt
477 * to ensure some degree of type safety. However, some number of tags and
478 * a termination value are expected to immediately follow the header in
479 * memory, as required by the property protocol.
481 * Returns 0 for success, any other value for error.
483 int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);