2 * dts file for Xilinx ZynqMP
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 compatible = "xlnx,zynqmp";
20 compatible = "arm,cortex-a53", "arm,armv8";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53", "arm,armv8";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53", "arm,armv8";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53", "arm,armv8";
43 enable-method = "psci";
49 compatible = "arm,dcc";
55 compatible = "xlnx,zynqmp-genpd";
58 #power-domain-cells = <0x0>;
63 #power-domain-cells = <0x0>;
68 #power-domain-cells = <0x0>;
73 #power-domain-cells = <0x0>;
78 #power-domain-cells = <0x0>;
83 #power-domain-cells = <0x0>;
88 #power-domain-cells = <0x0>;
93 #power-domain-cells = <0x0>;
98 #power-domain-cells = <0x0>;
103 #power-domain-cells = <0x0>;
108 #power-domain-cells = <0x0>;
113 #power-domain-cells = <0x0>;
118 #power-domain-cells = <0x0>;
123 /* fixme: what to attach to */
124 #power-domain-cells = <0x0>;
129 #power-domain-cells = <0x0>;
134 #power-domain-cells = <0x0>;
139 #power-domain-cells = <0x0>;
144 #power-domain-cells = <0x0>;
149 #power-domain-cells = <0x0>;
154 #power-domain-cells = <0x0>;
159 #power-domain-cells = <0x0>;
164 #power-domain-cells = <0x0>;
169 #power-domain-cells = <0x0>;
174 #power-domain-cells = <0x0>;
179 #power-domain-cells = <0x0>;
184 #power-domain-cells = <0x0>;
189 #power-domain-cells = <0x0>;
195 compatible = "arm,armv8-pmuv3";
196 interrupt-parent = <&gic>;
197 interrupts = <0 143 4>,
204 compatible = "arm,psci-0.2";
209 compatible = "xlnx,zynqmp-pm";
214 compatible = "arm,armv8-timer";
215 interrupt-parent = <&gic>;
216 interrupts = <1 13 0xf01>,
222 amba_apu: amba_apu@0 {
223 compatible = "simple-bus";
224 #address-cells = <2>;
226 ranges = <0 0 0 0 0xffffffff>;
228 gic: interrupt-controller@f9010000 {
229 compatible = "arm,gic-400", "arm,cortex-a15-gic";
230 #interrupt-cells = <3>;
231 reg = <0x0 0xf9010000 0x10000>,
232 <0x0 0xf9020000 0x20000>,
233 <0x0 0xf9040000 0x20000>,
234 <0x0 0xf9060000 0x20000>;
235 interrupt-controller;
236 interrupt-parent = <&gic>;
237 interrupts = <1 9 0xf04>;
242 compatible = "simple-bus";
244 #address-cells = <2>;
246 ranges = <0 0 0 0 0xffffffff>;
249 compatible = "xlnx,zynq-can-1.0";
251 clock-names = "can_clk", "pclk";
252 reg = <0x0 0xff060000 0x1000>;
253 interrupts = <0 23 4>;
254 interrupt-parent = <&gic>;
255 tx-fifo-depth = <0x40>;
256 rx-fifo-depth = <0x40>;
257 power-domains = <&pd_can0>;
261 compatible = "xlnx,zynq-can-1.0";
263 clock-names = "can_clk", "pclk";
264 reg = <0x0 0xff070000 0x1000>;
265 interrupts = <0 24 4>;
266 interrupt-parent = <&gic>;
267 tx-fifo-depth = <0x40>;
268 rx-fifo-depth = <0x40>;
269 power-domains = <&pd_can1>;
273 compatible = "arm,cci-400";
274 reg = <0x0 0xfd6e0000 0x9000>;
275 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
276 #address-cells = <1>;
280 compatible = "arm,cci-400-pmu,r1";
281 reg = <0x9000 0x5000>;
282 interrupt-parent = <&gic>;
283 interrupts = <0 123 4>,
292 fpd_dma_chan1: dma@fd500000 {
294 compatible = "xlnx,zynqmp-dma-1.0";
295 reg = <0x0 0xfd500000 0x1000>;
296 interrupt-parent = <&gic>;
297 interrupts = <0 124 4>;
298 clock-names = "clk_main", "clk_apb";
300 xlnx,bus-width = <128>;
301 power-domains = <&pd_gdma>;
304 fpd_dma_chan2: dma@fd510000 {
306 compatible = "xlnx,zynqmp-dma-1.0";
307 reg = <0x0 0xfd510000 0x1000>;
308 interrupt-parent = <&gic>;
309 interrupts = <0 125 4>;
310 clock-names = "clk_main", "clk_apb";
312 xlnx,bus-width = <128>;
313 power-domains = <&pd_gdma>;
316 fpd_dma_chan3: dma@fd520000 {
318 compatible = "xlnx,zynqmp-dma-1.0";
319 reg = <0x0 0xfd520000 0x1000>;
320 interrupt-parent = <&gic>;
321 interrupts = <0 126 4>;
322 clock-names = "clk_main", "clk_apb";
324 xlnx,bus-width = <128>;
325 power-domains = <&pd_gdma>;
328 fpd_dma_chan4: dma@fd530000 {
330 compatible = "xlnx,zynqmp-dma-1.0";
331 reg = <0x0 0xfd530000 0x1000>;
332 interrupt-parent = <&gic>;
333 interrupts = <0 127 4>;
334 clock-names = "clk_main", "clk_apb";
336 xlnx,bus-width = <128>;
337 power-domains = <&pd_gdma>;
340 fpd_dma_chan5: dma@fd540000 {
342 compatible = "xlnx,zynqmp-dma-1.0";
343 reg = <0x0 0xfd540000 0x1000>;
344 interrupt-parent = <&gic>;
345 interrupts = <0 128 4>;
346 clock-names = "clk_main", "clk_apb";
348 xlnx,bus-width = <128>;
349 power-domains = <&pd_gdma>;
352 fpd_dma_chan6: dma@fd550000 {
354 compatible = "xlnx,zynqmp-dma-1.0";
355 reg = <0x0 0xfd550000 0x1000>;
356 interrupt-parent = <&gic>;
357 interrupts = <0 129 4>;
358 clock-names = "clk_main", "clk_apb";
360 xlnx,bus-width = <128>;
361 power-domains = <&pd_gdma>;
364 fpd_dma_chan7: dma@fd560000 {
366 compatible = "xlnx,zynqmp-dma-1.0";
367 reg = <0x0 0xfd560000 0x1000>;
368 interrupt-parent = <&gic>;
369 interrupts = <0 130 4>;
370 clock-names = "clk_main", "clk_apb";
372 xlnx,bus-width = <128>;
373 power-domains = <&pd_gdma>;
376 fpd_dma_chan8: dma@fd570000 {
378 compatible = "xlnx,zynqmp-dma-1.0";
379 reg = <0x0 0xfd570000 0x1000>;
380 interrupt-parent = <&gic>;
381 interrupts = <0 131 4>;
382 clock-names = "clk_main", "clk_apb";
384 xlnx,bus-width = <128>;
385 power-domains = <&pd_gdma>;
390 compatible = "arm,mali-400", "arm,mali-utgard";
391 reg = <0x0 0xfd4b0000 0x30000>;
392 interrupt-parent = <&gic>;
393 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
394 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
398 lpd_dma_chan1: dma@ffa80000 {
400 compatible = "xlnx,zynqmp-dma-1.0";
401 reg = <0x0 0xffa80000 0x1000>;
402 interrupt-parent = <&gic>;
403 interrupts = <0 77 4>;
405 xlnx,bus-width = <64>;
406 power-domains = <&pd_adma>;
409 lpd_dma_chan2: dma@ffa90000 {
411 compatible = "xlnx,zynqmp-dma-1.0";
412 reg = <0x0 0xffa90000 0x1000>;
413 interrupt-parent = <&gic>;
414 interrupts = <0 78 4>;
416 xlnx,bus-width = <64>;
417 power-domains = <&pd_adma>;
420 lpd_dma_chan3: dma@ffaa0000 {
422 compatible = "xlnx,zynqmp-dma-1.0";
423 reg = <0x0 0xffaa0000 0x1000>;
424 interrupt-parent = <&gic>;
425 interrupts = <0 79 4>;
427 xlnx,bus-width = <64>;
428 power-domains = <&pd_adma>;
431 lpd_dma_chan4: dma@ffab0000 {
433 compatible = "xlnx,zynqmp-dma-1.0";
434 reg = <0x0 0xffab0000 0x1000>;
435 interrupt-parent = <&gic>;
436 interrupts = <0 80 4>;
438 xlnx,bus-width = <64>;
439 power-domains = <&pd_adma>;
442 lpd_dma_chan5: dma@ffac0000 {
444 compatible = "xlnx,zynqmp-dma-1.0";
445 reg = <0x0 0xffac0000 0x1000>;
446 interrupt-parent = <&gic>;
447 interrupts = <0 81 4>;
449 xlnx,bus-width = <64>;
450 power-domains = <&pd_adma>;
453 lpd_dma_chan6: dma@ffad0000 {
455 compatible = "xlnx,zynqmp-dma-1.0";
456 reg = <0x0 0xffad0000 0x1000>;
457 interrupt-parent = <&gic>;
458 interrupts = <0 82 4>;
460 xlnx,bus-width = <64>;
461 power-domains = <&pd_adma>;
464 lpd_dma_chan7: dma@ffae0000 {
466 compatible = "xlnx,zynqmp-dma-1.0";
467 reg = <0x0 0xffae0000 0x1000>;
468 interrupt-parent = <&gic>;
469 interrupts = <0 83 4>;
471 xlnx,bus-width = <64>;
472 power-domains = <&pd_adma>;
475 lpd_dma_chan8: dma@ffaf0000 {
477 compatible = "xlnx,zynqmp-dma-1.0";
478 reg = <0x0 0xffaf0000 0x1000>;
479 interrupt-parent = <&gic>;
480 interrupts = <0 84 4>;
482 xlnx,bus-width = <64>;
483 power-domains = <&pd_adma>;
486 mc: memory-controller@fd070000 {
487 compatible = "xlnx,zynqmp-ddrc-2.40a";
488 reg = <0x0 0xfd070000 0x30000>;
489 interrupt-parent = <&gic>;
490 interrupts = <0 112 4>;
493 nand0: nand@ff100000 {
494 compatible = "arasan,nfc-v3p10";
496 reg = <0x0 0xff100000 0x1000>;
497 clock-names = "clk_sys", "clk_flash";
498 interrupt-parent = <&gic>;
499 interrupts = <0 14 4>;
500 #address-cells = <2>;
502 power-domains = <&pd_nand>;
505 gem0: ethernet@ff0b0000 {
506 compatible = "cdns,zynqmp-gem";
508 interrupt-parent = <&gic>;
509 interrupts = <0 57 4>, <0 57 4>;
510 reg = <0x0 0xff0b0000 0x1000>;
511 clock-names = "pclk", "hclk", "tx_clk";
512 #address-cells = <1>;
514 #stream-id-cells = <1>;
515 power-domains = <&pd_eth0>;
518 gem1: ethernet@ff0c0000 {
519 compatible = "cdns,zynqmp-gem";
521 interrupt-parent = <&gic>;
522 interrupts = <0 59 4>, <0 59 4>;
523 reg = <0x0 0xff0c0000 0x1000>;
524 clock-names = "pclk", "hclk", "tx_clk";
525 #address-cells = <1>;
527 #stream-id-cells = <1>;
528 power-domains = <&pd_eth1>;
531 gem2: ethernet@ff0d0000 {
532 compatible = "cdns,zynqmp-gem";
534 interrupt-parent = <&gic>;
535 interrupts = <0 61 4>, <0 61 4>;
536 reg = <0x0 0xff0d0000 0x1000>;
537 clock-names = "pclk", "hclk", "tx_clk";
538 #address-cells = <1>;
540 #stream-id-cells = <1>;
541 power-domains = <&pd_eth2>;
544 gem3: ethernet@ff0e0000 {
545 compatible = "cdns,zynqmp-gem";
547 interrupt-parent = <&gic>;
548 interrupts = <0 63 4>, <0 63 4>;
549 reg = <0x0 0xff0e0000 0x1000>;
550 clock-names = "pclk", "hclk", "tx_clk";
551 #address-cells = <1>;
553 #stream-id-cells = <1>;
554 power-domains = <&pd_eth3>;
557 gpio: gpio@ff0a0000 {
558 compatible = "xlnx,zynqmp-gpio-1.0";
561 #interrupt-cells = <2>;
562 interrupt-controller;
563 interrupt-parent = <&gic>;
564 interrupts = <0 16 4>;
565 reg = <0x0 0xff0a0000 0x1000>;
566 power-domains = <&pd_gpio>;
570 compatible = "cdns,i2c-r1p10";
572 interrupt-parent = <&gic>;
573 interrupts = <0 17 4>;
574 reg = <0x0 0xff020000 0x1000>;
575 #address-cells = <1>;
577 power-domains = <&pd_i2c0>;
581 compatible = "cdns,i2c-r1p10";
583 interrupt-parent = <&gic>;
584 interrupts = <0 18 4>;
585 reg = <0x0 0xff030000 0x1000>;
586 #address-cells = <1>;
588 power-domains = <&pd_i2c1>;
591 pcie: pcie@fd0e0000 {
592 compatible = "xlnx,nwl-pcie-2.11";
594 #address-cells = <3>;
596 #interrupt-cells = <1>;
598 interrupt-parent = <&gic>;
599 interrupts = <0 118 4>,
601 <0 115 4>, /* MSI_1 [63...32] */
602 <0 114 4>; /* MSI_0 [31...0] */
603 interrupt-names = "misc", "intx", "msi_1", "msi_0";
604 reg = <0x0 0xfd0e0000 0x1000>,
605 <0x0 0xfd480000 0x1000>,
606 <0x0 0xe0000000 0x1000000>;
607 reg-names = "breg", "pcireg", "cfg";
608 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
609 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
610 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
611 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
612 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
613 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
614 pcie_intc: legacy-interrupt-controller {
615 interrupt-controller;
616 #address-cells = <0>;
617 #interrupt-cells = <1>;
622 compatible = "xlnx,zynqmp-qspi-1.0";
624 clock-names = "ref_clk", "pclk";
625 interrupts = <0 15 4>;
626 interrupt-parent = <&gic>;
628 reg = <0x0 0xff0f0000 0x1000>,
629 <0x0 0xc0000000 0x8000000>;
630 #address-cells = <1>;
632 power-domains = <&pd_qspi>;
636 compatible = "xlnx,zynqmp-rtc";
638 reg = <0x0 0xffa60000 0x100>;
639 interrupt-parent = <&gic>;
640 interrupts = <0 26 4>, <0 27 4>;
641 interrupt-names = "alarm", "sec";
644 sata: ahci@fd0c0000 {
645 compatible = "ceva,ahci-1v84";
647 reg = <0x0 0xfd0c0000 0x2000>;
648 interrupt-parent = <&gic>;
649 interrupts = <0 133 4>;
650 power-domains = <&pd_sata>;
653 sdhci0: sdhci@ff160000 {
655 compatible = "arasan,sdhci-8.9a";
657 interrupt-parent = <&gic>;
658 interrupts = <0 48 4>;
659 reg = <0x0 0xff160000 0x1000>;
660 clock-names = "clk_xin", "clk_ahb";
662 power-domains = <&pd_sd0>;
665 sdhci1: sdhci@ff170000 {
667 compatible = "arasan,sdhci-8.9a";
669 interrupt-parent = <&gic>;
670 interrupts = <0 49 4>;
671 reg = <0x0 0xff170000 0x1000>;
672 clock-names = "clk_xin", "clk_ahb";
674 power-domains = <&pd_sd1>;
677 smmu: smmu@fd800000 {
678 compatible = "arm,mmu-500";
679 reg = <0x0 0xfd800000 0x20000>;
680 #global-interrupts = <1>;
681 interrupt-parent = <&gic>;
682 interrupts = <0 155 4>,
683 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
684 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
685 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
686 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
687 mmu-masters = < &gem0 0x874
694 compatible = "cdns,spi-r1p6";
696 interrupt-parent = <&gic>;
697 interrupts = <0 19 4>;
698 reg = <0x0 0xff040000 0x1000>;
699 clock-names = "ref_clk", "pclk";
700 #address-cells = <1>;
702 power-domains = <&pd_spi0>;
706 compatible = "cdns,spi-r1p6";
708 interrupt-parent = <&gic>;
709 interrupts = <0 20 4>;
710 reg = <0x0 0xff050000 0x1000>;
711 clock-names = "ref_clk", "pclk";
712 #address-cells = <1>;
714 power-domains = <&pd_spi1>;
717 ttc0: timer@ff110000 {
718 compatible = "cdns,ttc";
720 interrupt-parent = <&gic>;
721 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
722 reg = <0x0 0xff110000 0x1000>;
724 power-domains = <&pd_ttc0>;
727 ttc1: timer@ff120000 {
728 compatible = "cdns,ttc";
730 interrupt-parent = <&gic>;
731 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
732 reg = <0x0 0xff120000 0x1000>;
734 power-domains = <&pd_ttc1>;
737 ttc2: timer@ff130000 {
738 compatible = "cdns,ttc";
740 interrupt-parent = <&gic>;
741 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
742 reg = <0x0 0xff130000 0x1000>;
744 power-domains = <&pd_ttc2>;
747 ttc3: timer@ff140000 {
748 compatible = "cdns,ttc";
750 interrupt-parent = <&gic>;
751 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
752 reg = <0x0 0xff140000 0x1000>;
754 power-domains = <&pd_ttc3>;
757 uart0: serial@ff000000 {
759 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
761 interrupt-parent = <&gic>;
762 interrupts = <0 21 4>;
763 reg = <0x0 0xff000000 0x1000>;
764 clock-names = "uart_clk", "pclk";
765 power-domains = <&pd_uart0>;
768 uart1: serial@ff010000 {
770 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
772 interrupt-parent = <&gic>;
773 interrupts = <0 22 4>;
774 reg = <0x0 0xff010000 0x1000>;
775 clock-names = "uart_clk", "pclk";
776 power-domains = <&pd_uart1>;
780 #address-cells = <2>;
783 compatible = "xlnx,zynqmp-dwc3";
784 clock-names = "bus_clk", "ref_clk";
785 clocks = <&clk125>, <&clk125>;
786 power-domains = <&pd_usb0>;
789 dwc3_0: dwc3@fe200000 {
790 compatible = "snps,dwc3";
792 reg = <0x0 0xfe200000 0x40000>;
793 interrupt-parent = <&gic>;
794 interrupts = <0 65 4>;
795 /* snps,quirk-frame-length-adjustment = <0x20>; */
801 #address-cells = <2>;
804 compatible = "xlnx,zynqmp-dwc3";
805 clock-names = "bus_clk", "ref_clk";
806 clocks = <&clk125>, <&clk125>;
807 power-domains = <&pd_usb1>;
810 dwc3_1: dwc3@fe300000 {
811 compatible = "snps,dwc3";
813 reg = <0x0 0xfe300000 0x40000>;
814 interrupt-parent = <&gic>;
815 interrupts = <0 70 4>;
816 /* snps,quirk-frame-length-adjustment = <0x20>; */
821 watchdog0: watchdog@fd4d0000 {
822 compatible = "cdns,wdt-r1p2";
824 interrupt-parent = <&gic>;
825 interrupts = <0 113 1>;
826 reg = <0x0 0xfd4d0000 0x1000>;
830 xilinx_drm: xilinx_drm {
831 compatible = "xlnx,drm";
833 xlnx,encoder-slave = <&xlnx_dp>;
834 xlnx,connector-type = "DisplayPort";
835 xlnx,dp-sub = <&xlnx_dp_sub>;
837 xlnx,pixel-format = "rgb565";
839 dmas = <&xlnx_dpdma 3>;
843 dmas = <&xlnx_dpdma 0>;
849 xlnx_dp: dp@fd4a0000 {
850 compatible = "xlnx,v-dp";
852 reg = <0x0 0xfd4a0000 0x1000>,
853 <0x0 0xfd400000 0x20000>;
854 interrupts = <0 119 4>;
855 interrupt-parent = <&gic>;
856 clock-names = "aclk", "aud_clk";
857 xlnx,dp-version = "v1.2";
858 xlnx,max-lanes = <2>;
859 xlnx,max-link-rate = <540000>;
862 xlnx,colormetry = "rgb";
864 xlnx,audio-chan = <2>;
865 xlnx,dp-sub = <&xlnx_dp_sub>;
866 xlnx,max-pclock-frequency = <300000>;
869 xlnx_dp_snd_card: dp_snd_card {
870 compatible = "xlnx,dp-snd-card";
872 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
873 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
876 xlnx_dp_snd_codec0: dp_snd_codec0 {
877 compatible = "xlnx,dp-snd-codec";
879 clock-names = "aud_clk";
882 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
883 compatible = "xlnx,dp-snd-pcm";
885 dmas = <&xlnx_dpdma 4>;
889 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
890 compatible = "xlnx,dp-snd-pcm";
892 dmas = <&xlnx_dpdma 5>;
896 xlnx_dp_sub: dp_sub@fd4aa000 {
897 compatible = "xlnx,dp-sub";
899 reg = <0x0 0xfd4aa000 0x1000>,
900 <0x0 0xfd4ab000 0x1000>,
901 <0x0 0xfd4ac000 0x1000>;
902 reg-names = "blend", "av_buf", "aud";
903 xlnx,output-fmt = "rgb";
904 xlnx,vid-fmt = "yuyv";
905 xlnx,gfx-fmt = "rgb565";
908 xlnx_dpdma: dma@fd4c0000 {
909 compatible = "xlnx,dpdma";
911 reg = <0x0 0xfd4c0000 0x1000>;
912 interrupts = <0 122 4>;
913 interrupt-parent = <&gic>;
914 clock-names = "axi_clk";
918 compatible = "xlnx,video0";
921 compatible = "xlnx,video1";
924 compatible = "xlnx,video2";
926 dma-graphicschannel {
927 compatible = "xlnx,graphics";
930 compatible = "xlnx,audio0";
933 compatible = "xlnx,audio1";