arch/arm/dts/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 / {
  11         compatible = "xlnx,zynqmp";
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "arm,cortex-a53", "arm,armv8";
  21                         device_type = "cpu";
  22                         enable-method = "psci";
  23                         reg = <0x0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         enable-method = "psci";
  30                         reg = <0x1>;
  31                 };
  32
  33                 cpu@2 {
  34                         compatible = "arm,cortex-a53", "arm,armv8";
  35                         device_type = "cpu";
  36                         enable-method = "psci";
  37                         reg = <0x2>;
  38                 };
  39
  40                 cpu@3 {
  41                         compatible = "arm,cortex-a53", "arm,armv8";
  42                         device_type = "cpu";
  43                         enable-method = "psci";
  44                         reg = <0x3>;
  45                 };
  46         };
  47
  48         dcc: dcc {
  49                 compatible = "arm,dcc";
  50                 status = "disabled";
  51                 u-boot,dm-pre-reloc;
  52         };
  53
  54         power-domains {
  55                 compatible = "xlnx,zynqmp-genpd";
  56
  57                 pd_usb0: pd-usb0 {
  58                         #power-domain-cells = <0x0>;
  59                         pd-id = <0x16>;
  60                 };
  61
  62                 pd_usb1: pd-usb1 {
  63                         #power-domain-cells = <0x0>;
  64                         pd-id = <0x17>;
  65                 };
  66
  67                 pd_sata: pd-sata {
  68                         #power-domain-cells = <0x0>;
  69                         pd-id = <0x1c>;
  70                 };
  71
  72                 pd_spi0: pd-spi0 {
  73                         #power-domain-cells = <0x0>;
  74                         pd-id = <0x23>;
  75                 };
  76
  77                 pd_spi1: pd-spi1 {
  78                         #power-domain-cells = <0x0>;
  79                         pd-id = <0x24>;
  80                 };
  81
  82                 pd_uart0: pd-uart0 {
  83                         #power-domain-cells = <0x0>;
  84                         pd-id = <0x21>;
  85                 };
  86
  87                 pd_uart1: pd-uart1 {
  88                         #power-domain-cells = <0x0>;
  89                         pd-id = <0x22>;
  90                 };
  91
  92                 pd_eth0: pd-eth0 {
  93                         #power-domain-cells = <0x0>;
  94                         pd-id = <0x1d>;
  95                 };
  96
  97                 pd_eth1: pd-eth1 {
  98                         #power-domain-cells = <0x0>;
  99                         pd-id = <0x1e>;
 100                 };
 101
 102                 pd_eth2: pd-eth2 {
 103                         #power-domain-cells = <0x0>;
 104                         pd-id = <0x1f>;
 105                 };
 106
 107                 pd_eth3: pd-eth3 {
 108                         #power-domain-cells = <0x0>;
 109                         pd-id = <0x20>;
 110                 };
 111
 112                 pd_i2c0: pd-i2c0 {
 113                         #power-domain-cells = <0x0>;
 114                         pd-id = <0x25>;
 115                 };
 116
 117                 pd_i2c1: pd-i2c1 {
 118                         #power-domain-cells = <0x0>;
 119                         pd-id = <0x26>;
 120                 };
 121
 122                 pd_dp: pd-dp {
 123                         /* fixme: what to attach to */
 124                         #power-domain-cells = <0x0>;
 125                         pd-id = <0x29>;
 126                 };
 127
 128                 pd_gdma: pd-gdma {
 129                         #power-domain-cells = <0x0>;
 130                         pd-id = <0x2a>;
 131                 };
 132
 133                 pd_adma: pd-adma {
 134                         #power-domain-cells = <0x0>;
 135                         pd-id = <0x2b>;
 136                 };
 137
 138                 pd_ttc0: pd-ttc0 {
 139                         #power-domain-cells = <0x0>;
 140                         pd-id = <0x18>;
 141                 };
 142
 143                 pd_ttc1: pd-ttc1 {
 144                         #power-domain-cells = <0x0>;
 145                         pd-id = <0x19>;
 146                 };
 147
 148                 pd_ttc2: pd-ttc2 {
 149                         #power-domain-cells = <0x0>;
 150                         pd-id = <0x1a>;
 151                 };
 152
 153                 pd_ttc3: pd-ttc3 {
 154                         #power-domain-cells = <0x0>;
 155                         pd-id = <0x1b>;
 156                 };
 157
 158                 pd_sd0: pd-sd0 {
 159                         #power-domain-cells = <0x0>;
 160                         pd-id = <0x27>;
 161                 };
 162
 163                 pd_sd1: pd-sd1 {
 164                         #power-domain-cells = <0x0>;
 165                         pd-id = <0x28>;
 166                 };
 167
 168                 pd_nand: pd-nand {
 169                         #power-domain-cells = <0x0>;
 170                         pd-id = <0x2c>;
 171                 };
 172
 173                 pd_qspi: pd-qspi {
 174                         #power-domain-cells = <0x0>;
 175                         pd-id = <0x2d>;
 176                 };
 177
 178                 pd_gpio: pd-gpio {
 179                         #power-domain-cells = <0x0>;
 180                         pd-id = <0x2e>;
 181                 };
 182
 183                 pd_can0: pd-can0 {
 184                         #power-domain-cells = <0x0>;
 185                         pd-id = <0x2f>;
 186                 };
 187
 188                 pd_can1: pd-can1 {
 189                         #power-domain-cells = <0x0>;
 190                         pd-id = <0x30>;
 191                 };
 192
 193                 pd_ddr: pd-ddr {
 194                         #power-domain-cells = <0x0>;
 195                         pd-id = <0x37>;
 196                 };
 197
 198                 pd_apll: pd-apll {
 199                         #power-domain-cells = <0x0>;
 200                         pd-id = <0x32>;
 201                 };
 202
 203                 pd_vpll: pd-vpll {
 204                         #power-domain-cells = <0x0>;
 205                         pd-id = <0x33>;
 206                 };
 207
 208                 pd_dpll: pd-dpll {
 209                         #power-domain-cells = <0x0>;
 210                         pd-id = <0x34>;
 211                 };
 212
 213                 pd_rpll: pd-rpll {
 214                         #power-domain-cells = <0x0>;
 215                         pd-id = <0x35>;
 216                 };
 217
 218                 pd_iopll: pd-iopll {
 219                         #power-domain-cells = <0x0>;
 220                         pd-id = <0x36>;
 221                 };
 222         };
 223
 224         pmu {
 225                 compatible = "arm,armv8-pmuv3";
 226                 interrupt-parent = <&gic>;
 227                 interrupts = <0 143 4>,
 228                              <0 144 4>,
 229                              <0 145 4>,
 230                              <0 146 4>;
 231         };
 232
 233         psci {
 234                 compatible = "arm,psci-0.2";
 235                 method = "smc";
 236         };
 237
 238         firmware {
 239                 compatible = "xlnx,zynqmp-pm";
 240                 method = "smc";
 241         };
 242
 243         timer {
 244                 compatible = "arm,armv8-timer";
 245                 interrupt-parent = <&gic>;
 246                 interrupts = <1 13 0xf01>,
 247                              <1 14 0xf01>,
 248                              <1 11 0xf01>,
 249                              <1 10 0xf01>;
 250         };
 251
 252         amba_apu: amba_apu@0 {
 253                 compatible = "simple-bus";
 254                 #address-cells = <2>;
 255                 #size-cells = <1>;
 256                 ranges = <0 0 0 0 0xffffffff>;
 257
 258                 gic: interrupt-controller@f9010000 {
 259                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 260                         #interrupt-cells = <3>;
 261                         reg = <0x0 0xf9010000 0x10000>,
 262                               <0x0 0xf9020000 0x20000>,
 263                               <0x0 0xf9040000 0x20000>,
 264                               <0x0 0xf9060000 0x20000>;
 265                         interrupt-controller;
 266                         interrupt-parent = <&gic>;
 267                         interrupts = <1 9 0xf04>;
 268                 };
 269         };
 270
 271         amba: amba@0 {
 272                 compatible = "simple-bus";
 273                 u-boot,dm-pre-reloc;
 274                 #address-cells = <2>;
 275                 #size-cells = <1>;
 276                 ranges = <0 0 0 0 0xffffffff>;
 277
 278                 can0: can@ff060000 {
 279                         compatible = "xlnx,zynq-can-1.0";
 280                         status = "disabled";
 281                         clock-names = "can_clk", "pclk";
 282                         reg = <0x0 0xff060000 0x1000>;
 283                         interrupts = <0 23 4>;
 284                         interrupt-parent = <&gic>;
 285                         tx-fifo-depth = <0x40>;
 286                         rx-fifo-depth = <0x40>;
 287                         power-domains = <&pd_can0>;
 288                 };
 289
 290                 can1: can@ff070000 {
 291                         compatible = "xlnx,zynq-can-1.0";
 292                         status = "disabled";
 293                         clock-names = "can_clk", "pclk";
 294                         reg = <0x0 0xff070000 0x1000>;
 295                         interrupts = <0 24 4>;
 296                         interrupt-parent = <&gic>;
 297                         tx-fifo-depth = <0x40>;
 298                         rx-fifo-depth = <0x40>;
 299                         power-domains = <&pd_can1>;
 300                 };
 301
 302                 cci: cci@fd6e0000 {
 303                         compatible = "arm,cci-400";
 304                         reg = <0x0 0xfd6e0000 0x9000>;
 305                         ranges = <0x0 0x0 0xfd6e0000 0x10000>;
 306                         #address-cells = <1>;
 307                         #size-cells = <1>;
 308
 309                         pmu@9000 {
 310                                 compatible = "arm,cci-400-pmu,r1";
 311                                 reg = <0x9000 0x5000>;
 312                                 interrupt-parent = <&gic>;
 313                                 interrupts = <0 123 4>,
 314                                              <0 123 4>,
 315                                              <0 123 4>,
 316                                              <0 123 4>,
 317                                              <0 123 4>;
 318                         };
 319                 };
 320
 321                 /* GDMA */
 322                 fpd_dma_chan1: dma@fd500000 {
 323                         status = "disabled";
 324                         compatible = "xlnx,zynqmp-dma-1.0";
 325                         reg = <0x0 0xfd500000 0x1000>;
 326                         interrupt-parent = <&gic>;
 327                         interrupts = <0 124 4>;
 328                         clock-names = "clk_main", "clk_apb";
 329                         xlnx,id = <0>;
 330                         xlnx,bus-width = <128>;
 331                         power-domains = <&pd_gdma>;
 332                 };
 333
 334                 fpd_dma_chan2: dma@fd510000 {
 335                         status = "disabled";
 336                         compatible = "xlnx,zynqmp-dma-1.0";
 337                         reg = <0x0 0xfd510000 0x1000>;
 338                         interrupt-parent = <&gic>;
 339                         interrupts = <0 125 4>;
 340                         clock-names = "clk_main", "clk_apb";
 341                         xlnx,id = <1>;
 342                         xlnx,bus-width = <128>;
 343                         power-domains = <&pd_gdma>;
 344                 };
 345
 346                 fpd_dma_chan3: dma@fd520000 {
 347                         status = "disabled";
 348                         compatible = "xlnx,zynqmp-dma-1.0";
 349                         reg = <0x0 0xfd520000 0x1000>;
 350                         interrupt-parent = <&gic>;
 351                         interrupts = <0 126 4>;
 352                         clock-names = "clk_main", "clk_apb";
 353                         xlnx,id = <2>;
 354                         xlnx,bus-width = <128>;
 355                         power-domains = <&pd_gdma>;
 356                 };
 357
 358                 fpd_dma_chan4: dma@fd530000 {
 359                         status = "disabled";
 360                         compatible = "xlnx,zynqmp-dma-1.0";
 361                         reg = <0x0 0xfd530000 0x1000>;
 362                         interrupt-parent = <&gic>;
 363                         interrupts = <0 127 4>;
 364                         clock-names = "clk_main", "clk_apb";
 365                         xlnx,id = <3>;
 366                         xlnx,bus-width = <128>;
 367                         power-domains = <&pd_gdma>;
 368                 };
 369
 370                 fpd_dma_chan5: dma@fd540000 {
 371                         status = "disabled";
 372                         compatible = "xlnx,zynqmp-dma-1.0";
 373                         reg = <0x0 0xfd540000 0x1000>;
 374                         interrupt-parent = <&gic>;
 375                         interrupts = <0 128 4>;
 376                         clock-names = "clk_main", "clk_apb";
 377                         xlnx,id = <4>;
 378                         xlnx,bus-width = <128>;
 379                         power-domains = <&pd_gdma>;
 380                 };
 381
 382                 fpd_dma_chan6: dma@fd550000 {
 383                         status = "disabled";
 384                         compatible = "xlnx,zynqmp-dma-1.0";
 385                         reg = <0x0 0xfd550000 0x1000>;
 386                         interrupt-parent = <&gic>;
 387                         interrupts = <0 129 4>;
 388                         clock-names = "clk_main", "clk_apb";
 389                         xlnx,id = <5>;
 390                         xlnx,bus-width = <128>;
 391                         power-domains = <&pd_gdma>;
 392                 };
 393
 394                 fpd_dma_chan7: dma@fd560000 {
 395                         status = "disabled";
 396                         compatible = "xlnx,zynqmp-dma-1.0";
 397                         reg = <0x0 0xfd560000 0x1000>;
 398                         interrupt-parent = <&gic>;
 399                         interrupts = <0 130 4>;
 400                         clock-names = "clk_main", "clk_apb";
 401                         xlnx,id = <6>;
 402                         xlnx,bus-width = <128>;
 403                         power-domains = <&pd_gdma>;
 404                 };
 405
 406                 fpd_dma_chan8: dma@fd570000 {
 407                         status = "disabled";
 408                         compatible = "xlnx,zynqmp-dma-1.0";
 409                         reg = <0x0 0xfd570000 0x1000>;
 410                         interrupt-parent = <&gic>;
 411                         interrupts = <0 131 4>;
 412                         clock-names = "clk_main", "clk_apb";
 413                         xlnx,id = <7>;
 414                         xlnx,bus-width = <128>;
 415                         power-domains = <&pd_gdma>;
 416                 };
 417
 418                 gpu: gpu@fd4b0000 {
 419                         status = "disabled";
 420                         compatible = "arm,mali-400", "arm,mali-utgard";
 421                         reg = <0x0 0xfd4b0000 0x30000>;
 422                         interrupt-parent = <&gic>;
 423                         interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
 424                         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
 425                 };
 426
 427                 /* ADMA */
 428                 lpd_dma_chan1: dma@ffa80000 {
 429                         status = "disabled";
 430                         compatible = "xlnx,zynqmp-dma-1.0";
 431                         reg = <0x0 0xffa80000 0x1000>;
 432                         interrupt-parent = <&gic>;
 433                         interrupts = <0 77 4>;
 434                         xlnx,id = <0>;
 435                         xlnx,bus-width = <64>;
 436                         power-domains = <&pd_adma>;
 437                 };
 438
 439                 lpd_dma_chan2: dma@ffa90000 {
 440                         status = "disabled";
 441                         compatible = "xlnx,zynqmp-dma-1.0";
 442                         reg = <0x0 0xffa90000 0x1000>;
 443                         interrupt-parent = <&gic>;
 444                         interrupts = <0 78 4>;
 445                         xlnx,id = <1>;
 446                         xlnx,bus-width = <64>;
 447                         power-domains = <&pd_adma>;
 448                 };
 449
 450                 lpd_dma_chan3: dma@ffaa0000 {
 451                         status = "disabled";
 452                         compatible = "xlnx,zynqmp-dma-1.0";
 453                         reg = <0x0 0xffaa0000 0x1000>;
 454                         interrupt-parent = <&gic>;
 455                         interrupts = <0 79 4>;
 456                         xlnx,id = <2>;
 457                         xlnx,bus-width = <64>;
 458                         power-domains = <&pd_adma>;
 459                 };
 460
 461                 lpd_dma_chan4: dma@ffab0000 {
 462                         status = "disabled";
 463                         compatible = "xlnx,zynqmp-dma-1.0";
 464                         reg = <0x0 0xffab0000 0x1000>;
 465                         interrupt-parent = <&gic>;
 466                         interrupts = <0 80 4>;
 467                         xlnx,id = <3>;
 468                         xlnx,bus-width = <64>;
 469                         power-domains = <&pd_adma>;
 470                 };
 471
 472                 lpd_dma_chan5: dma@ffac0000 {
 473                         status = "disabled";
 474                         compatible = "xlnx,zynqmp-dma-1.0";
 475                         reg = <0x0 0xffac0000 0x1000>;
 476                         interrupt-parent = <&gic>;
 477                         interrupts = <0 81 4>;
 478                         xlnx,id = <4>;
 479                         xlnx,bus-width = <64>;
 480                         power-domains = <&pd_adma>;
 481                 };
 482
 483                 lpd_dma_chan6: dma@ffad0000 {
 484                         status = "disabled";
 485                         compatible = "xlnx,zynqmp-dma-1.0";
 486                         reg = <0x0 0xffad0000 0x1000>;
 487                         interrupt-parent = <&gic>;
 488                         interrupts = <0 82 4>;
 489                         xlnx,id = <5>;
 490                         xlnx,bus-width = <64>;
 491                         power-domains = <&pd_adma>;
 492                 };
 493
 494                 lpd_dma_chan7: dma@ffae0000 {
 495                         status = "disabled";
 496                         compatible = "xlnx,zynqmp-dma-1.0";
 497                         reg = <0x0 0xffae0000 0x1000>;
 498                         interrupt-parent = <&gic>;
 499                         interrupts = <0 83 4>;
 500                         xlnx,id = <6>;
 501                         xlnx,bus-width = <64>;
 502                         power-domains = <&pd_adma>;
 503                 };
 504
 505                 lpd_dma_chan8: dma@ffaf0000 {
 506                         status = "disabled";
 507                         compatible = "xlnx,zynqmp-dma-1.0";
 508                         reg = <0x0 0xffaf0000 0x1000>;
 509                         interrupt-parent = <&gic>;
 510                         interrupts = <0 84 4>;
 511                         xlnx,id = <7>;
 512                         xlnx,bus-width = <64>;
 513                         power-domains = <&pd_adma>;
 514                 };
 515
 516                 mc: memory-controller@fd070000 {
 517                         compatible = "xlnx,zynqmp-ddrc-2.40a";
 518                         reg = <0x0 0xfd070000 0x30000>;
 519                         interrupt-parent = <&gic>;
 520                         interrupts = <0 112 4>;
 521                 };
 522
 523                 nand0: nand@ff100000 {
 524                         compatible = "arasan,nfc-v3p10";
 525                         status = "disabled";
 526                         reg = <0x0 0xff100000 0x1000>;
 527                         clock-names = "clk_sys", "clk_flash";
 528                         interrupt-parent = <&gic>;
 529                         interrupts = <0 14 4>;
 530                         #address-cells = <2>;
 531                         #size-cells = <1>;
 532                         power-domains = <&pd_nand>;
 533                 };
 534
 535                 gem0: ethernet@ff0b0000 {
 536                         compatible = "cdns,zynqmp-gem";
 537                         status = "disabled";
 538                         interrupt-parent = <&gic>;
 539                         interrupts = <0 57 4>, <0 57 4>;
 540                         reg = <0x0 0xff0b0000 0x1000>;
 541                         clock-names = "pclk", "hclk", "tx_clk";
 542                         #address-cells = <1>;
 543                         #size-cells = <0>;
 544                         #stream-id-cells = <1>;
 545                         power-domains = <&pd_eth0>;
 546                 };
 547
 548                 gem1: ethernet@ff0c0000 {
 549                         compatible = "cdns,zynqmp-gem";
 550                         status = "disabled";
 551                         interrupt-parent = <&gic>;
 552                         interrupts = <0 59 4>, <0 59 4>;
 553                         reg = <0x0 0xff0c0000 0x1000>;
 554                         clock-names = "pclk", "hclk", "tx_clk";
 555                         #address-cells = <1>;
 556                         #size-cells = <0>;
 557                         #stream-id-cells = <1>;
 558                         power-domains = <&pd_eth1>;
 559                 };
 560
 561                 gem2: ethernet@ff0d0000 {
 562                         compatible = "cdns,zynqmp-gem";
 563                         status = "disabled";
 564                         interrupt-parent = <&gic>;
 565                         interrupts = <0 61 4>, <0 61 4>;
 566                         reg = <0x0 0xff0d0000 0x1000>;
 567                         clock-names = "pclk", "hclk", "tx_clk";
 568                         #address-cells = <1>;
 569                         #size-cells = <0>;
 570                         #stream-id-cells = <1>;
 571                         power-domains = <&pd_eth2>;
 572                 };
 573
 574                 gem3: ethernet@ff0e0000 {
 575                         compatible = "cdns,zynqmp-gem";
 576                         status = "disabled";
 577                         interrupt-parent = <&gic>;
 578                         interrupts = <0 63 4>, <0 63 4>;
 579                         reg = <0x0 0xff0e0000 0x1000>;
 580                         clock-names = "pclk", "hclk", "tx_clk";
 581                         #address-cells = <1>;
 582                         #size-cells = <0>;
 583                         #stream-id-cells = <1>;
 584                         power-domains = <&pd_eth3>;
 585                 };
 586
 587                 gpio: gpio@ff0a0000 {
 588                         compatible = "xlnx,zynqmp-gpio-1.0";
 589                         status = "disabled";
 590                         #gpio-cells = <0x2>;
 591                         #interrupt-cells = <2>;
 592                         interrupt-controller;
 593                         interrupt-parent = <&gic>;
 594                         interrupts = <0 16 4>;
 595                         reg = <0x0 0xff0a0000 0x1000>;
 596                         power-domains = <&pd_gpio>;
 597                 };
 598
 599                 i2c0: i2c@ff020000 {
 600                         compatible = "cdns,i2c-r1p10";
 601                         status = "disabled";
 602                         interrupt-parent = <&gic>;
 603                         interrupts = <0 17 4>;
 604                         reg = <0x0 0xff020000 0x1000>;
 605                         #address-cells = <1>;
 606                         #size-cells = <0>;
 607                         power-domains = <&pd_i2c0>;
 608                 };
 609
 610                 i2c1: i2c@ff030000 {
 611                         compatible = "cdns,i2c-r1p10";
 612                         status = "disabled";
 613                         interrupt-parent = <&gic>;
 614                         interrupts = <0 18 4>;
 615                         reg = <0x0 0xff030000 0x1000>;
 616                         #address-cells = <1>;
 617                         #size-cells = <0>;
 618                         power-domains = <&pd_i2c1>;
 619                 };
 620
 621                 pcie: pcie@fd0e0000 {
 622                         compatible = "xlnx,nwl-pcie-2.11";
 623                         status = "disabled";
 624                         #address-cells = <3>;
 625                         #size-cells = <2>;
 626                         #interrupt-cells = <1>;
 627                         device_type = "pci";
 628                         interrupt-parent = <&gic>;
 629                         interrupts = <0 118 4>,
 630                                      <0 116 4>,
 631                                      <0 115 4>, /* MSI_1 [63...32] */
 632                                      <0 114 4>; /* MSI_0 [31...0] */
 633                         interrupt-names = "misc", "intx", "msi_1", "msi_0";
 634                         reg = <0x0 0xfd0e0000 0x1000>,
 635                               <0x0 0xfd480000 0x1000>,
 636                               <0x0 0xe0000000 0x1000000>;
 637                         reg-names = "breg", "pcireg", "cfg";
 638                         ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
 639                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 640                         interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
 641                                         <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
 642                                         <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
 643                                         <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
 644                         pcie_intc: legacy-interrupt-controller {
 645                                 interrupt-controller;
 646                                 #address-cells = <0>;
 647                                 #interrupt-cells = <1>;
 648                         };
 649                 };
 650
 651                 qspi: spi@ff0f0000 {
 652                         compatible = "xlnx,zynqmp-qspi-1.0";
 653                         status = "disabled";
 654                         clock-names = "ref_clk", "pclk";
 655                         interrupts = <0 15 4>;
 656                         interrupt-parent = <&gic>;
 657                         num-cs = <1>;
 658                         reg = <0x0 0xff0f0000 0x1000>,
 659                               <0x0 0xc0000000 0x8000000>;
 660                         #address-cells = <1>;
 661                         #size-cells = <0>;
 662                         power-domains = <&pd_qspi>;
 663                 };
 664
 665                 rtc: rtc@ffa60000 {
 666                         compatible = "xlnx,zynqmp-rtc";
 667                         status = "disabled";
 668                         reg = <0x0 0xffa60000 0x100>;
 669                         interrupt-parent = <&gic>;
 670                         interrupts = <0 26 4>, <0 27 4>;
 671                         interrupt-names = "alarm", "sec";
 672                 };
 673
 674                 sata: ahci@fd0c0000 {
 675                         compatible = "ceva,ahci-1v84";
 676                         status = "disabled";
 677                         reg = <0x0 0xfd0c0000 0x2000>;
 678                         interrupt-parent = <&gic>;
 679                         interrupts = <0 133 4>;
 680                         power-domains = <&pd_sata>;
 681                 };
 682
 683                 sdhci0: sdhci@ff160000 {
 684                         u-boot,dm-pre-reloc;
 685                         compatible = "arasan,sdhci-8.9a";
 686                         status = "disabled";
 687                         interrupt-parent = <&gic>;
 688                         interrupts = <0 48 4>;
 689                         reg = <0x0 0xff160000 0x1000>;
 690                         clock-names = "clk_xin", "clk_ahb";
 691                         broken-tuning;
 692                         power-domains = <&pd_sd0>;
 693                 };
 694
 695                 sdhci1: sdhci@ff170000 {
 696                         u-boot,dm-pre-reloc;
 697                         compatible = "arasan,sdhci-8.9a";
 698                         status = "disabled";
 699                         interrupt-parent = <&gic>;
 700                         interrupts = <0 49 4>;
 701                         reg = <0x0 0xff170000 0x1000>;
 702                         clock-names = "clk_xin", "clk_ahb";
 703                         broken-tuning;
 704                         power-domains = <&pd_sd1>;
 705                 };
 706
 707                 smmu: smmu@fd800000 {
 708                         compatible = "arm,mmu-500";
 709                         reg = <0x0 0xfd800000 0x20000>;
 710                         #global-interrupts = <1>;
 711                         interrupt-parent = <&gic>;
 712                         interrupts = <0 155 4>,
 713                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 714                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 715                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 716                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 717                         mmu-masters = < &gem0 0x874
 718                                         &gem1 0x875
 719                                         &gem2 0x876
 720                                         &gem3 0x877 >;
 721                 };
 722
 723                 spi0: spi@ff040000 {
 724                         compatible = "cdns,spi-r1p6";
 725                         status = "disabled";
 726                         interrupt-parent = <&gic>;
 727                         interrupts = <0 19 4>;
 728                         reg = <0x0 0xff040000 0x1000>;
 729                         clock-names = "ref_clk", "pclk";
 730                         #address-cells = <1>;
 731                         #size-cells = <0>;
 732                         power-domains = <&pd_spi0>;
 733                 };
 734
 735                 spi1: spi@ff050000 {
 736                         compatible = "cdns,spi-r1p6";
 737                         status = "disabled";
 738                         interrupt-parent = <&gic>;
 739                         interrupts = <0 20 4>;
 740                         reg = <0x0 0xff050000 0x1000>;
 741                         clock-names = "ref_clk", "pclk";
 742                         #address-cells = <1>;
 743                         #size-cells = <0>;
 744                         power-domains = <&pd_spi1>;
 745                 };
 746
 747                 ttc0: timer@ff110000 {
 748                         compatible = "cdns,ttc";
 749                         status = "disabled";
 750                         interrupt-parent = <&gic>;
 751                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 752                         reg = <0x0 0xff110000 0x1000>;
 753                         timer-width = <32>;
 754                         power-domains = <&pd_ttc0>;
 755                 };
 756
 757                 ttc1: timer@ff120000 {
 758                         compatible = "cdns,ttc";
 759                         status = "disabled";
 760                         interrupt-parent = <&gic>;
 761                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 762                         reg = <0x0 0xff120000 0x1000>;
 763                         timer-width = <32>;
 764                         power-domains = <&pd_ttc1>;
 765                 };
 766
 767                 ttc2: timer@ff130000 {
 768                         compatible = "cdns,ttc";
 769                         status = "disabled";
 770                         interrupt-parent = <&gic>;
 771                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 772                         reg = <0x0 0xff130000 0x1000>;
 773                         timer-width = <32>;
 774                         power-domains = <&pd_ttc2>;
 775                 };
 776
 777                 ttc3: timer@ff140000 {
 778                         compatible = "cdns,ttc";
 779                         status = "disabled";
 780                         interrupt-parent = <&gic>;
 781                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 782                         reg = <0x0 0xff140000 0x1000>;
 783                         timer-width = <32>;
 784                         power-domains = <&pd_ttc3>;
 785                 };
 786
 787                 uart0: serial@ff000000 {
 788                         u-boot,dm-pre-reloc;
 789                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 790                         status = "disabled";
 791                         interrupt-parent = <&gic>;
 792                         interrupts = <0 21 4>;
 793                         reg = <0x0 0xff000000 0x1000>;
 794                         clock-names = "uart_clk", "pclk";
 795                         power-domains = <&pd_uart0>;
 796                 };
 797
 798                 uart1: serial@ff010000 {
 799                         u-boot,dm-pre-reloc;
 800                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 801                         status = "disabled";
 802                         interrupt-parent = <&gic>;
 803                         interrupts = <0 22 4>;
 804                         reg = <0x0 0xff010000 0x1000>;
 805                         clock-names = "uart_clk", "pclk";
 806                         power-domains = <&pd_uart1>;
 807                 };
 808
 809                 usb0: usb0 {
 810                         #address-cells = <2>;
 811                         #size-cells = <1>;
 812                         status = "disabled";
 813                         compatible = "xlnx,zynqmp-dwc3";
 814                         clock-names = "bus_clk", "ref_clk";
 815                         clocks = <&clk125>, <&clk125>;
 816                         power-domains = <&pd_usb0>;
 817                         ranges;
 818
 819                         dwc3_0: dwc3@fe200000 {
 820                                 compatible = "snps,dwc3";
 821                                 status = "disabled";
 822                                 reg = <0x0 0xfe200000 0x40000>;
 823                                 interrupt-parent = <&gic>;
 824                                 interrupts = <0 65 4>;
 825                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 826                                 snps,refclk_fladj;
 827                         };
 828                 };
 829
 830                 usb1: usb1 {
 831                         #address-cells = <2>;
 832                         #size-cells = <1>;
 833                         status = "disabled";
 834                         compatible = "xlnx,zynqmp-dwc3";
 835                         clock-names = "bus_clk", "ref_clk";
 836                         clocks = <&clk125>, <&clk125>;
 837                         power-domains = <&pd_usb1>;
 838                         ranges;
 839
 840                         dwc3_1: dwc3@fe300000 {
 841                                 compatible = "snps,dwc3";
 842                                 status = "disabled";
 843                                 reg = <0x0 0xfe300000 0x40000>;
 844                                 interrupt-parent = <&gic>;
 845                                 interrupts = <0 70 4>;
 846                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 847                                 snps,refclk_fladj;
 848                         };
 849                 };
 850
 851                 watchdog0: watchdog@fd4d0000 {
 852                         compatible = "cdns,wdt-r1p2";
 853                         status = "disabled";
 854                         interrupt-parent = <&gic>;
 855                         interrupts = <0 113 1>;
 856                         reg = <0x0 0xfd4d0000 0x1000>;
 857                         timeout-sec = <10>;
 858                 };
 859
 860                 xilinx_drm: xilinx_drm {
 861                         compatible = "xlnx,drm";
 862                         status = "disabled";
 863                         xlnx,encoder-slave = <&xlnx_dp>;
 864                         xlnx,connector-type = "DisplayPort";
 865                         xlnx,dp-sub = <&xlnx_dp_sub>;
 866                         planes {
 867                                 xlnx,pixel-format = "rgb565";
 868                                 plane0 {
 869                                         dmas = <&xlnx_dpdma 3>;
 870                                         dma-names = "dma";
 871                                 };
 872                                 plane1 {
 873                                         dmas = <&xlnx_dpdma 0>;
 874                                         dma-names = "dma";
 875                                 };
 876                         };
 877                 };
 878
 879                 xlnx_dp: dp@fd4a0000 {
 880                         compatible = "xlnx,v-dp";
 881                         status = "disabled";
 882                         reg = <0x0 0xfd4a0000 0x1000>,
 883                               <0x0 0xfd400000 0x20000>;
 884                         interrupts = <0 119 4>;
 885                         interrupt-parent = <&gic>;
 886                         clock-names = "aclk", "aud_clk";
 887                         xlnx,dp-version = "v1.2";
 888                         xlnx,max-lanes = <2>;
 889                         xlnx,max-link-rate = <540000>;
 890                         xlnx,max-bpc = <16>;
 891                         xlnx,enable-ycrcb;
 892                         xlnx,colormetry = "rgb";
 893                         xlnx,bpc = <8>;
 894                         xlnx,audio-chan = <2>;
 895                         xlnx,dp-sub = <&xlnx_dp_sub>;
 896                         xlnx,max-pclock-frequency = <300000>;
 897                 };
 898
 899                 xlnx_dp_snd_card: dp_snd_card {
 900                         compatible = "xlnx,dp-snd-card";
 901                         status = "disabled";
 902                         xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
 903                         xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
 904                 };
 905
 906                 xlnx_dp_snd_codec0: dp_snd_codec0 {
 907                         compatible = "xlnx,dp-snd-codec";
 908                         status = "disabled";
 909                         clock-names = "aud_clk";
 910                 };
 911
 912                 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
 913                         compatible = "xlnx,dp-snd-pcm";
 914                         status = "disabled";
 915                         dmas = <&xlnx_dpdma 4>;
 916                         dma-names = "tx";
 917                 };
 918
 919                 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
 920                         compatible = "xlnx,dp-snd-pcm";
 921                         status = "disabled";
 922                         dmas = <&xlnx_dpdma 5>;
 923                         dma-names = "tx";
 924                 };
 925
 926                 xlnx_dp_sub: dp_sub@fd4aa000 {
 927                         compatible = "xlnx,dp-sub";
 928                         status = "disabled";
 929                         reg = <0x0 0xfd4aa000 0x1000>,
 930                               <0x0 0xfd4ab000 0x1000>,
 931                               <0x0 0xfd4ac000 0x1000>;
 932                         reg-names = "blend", "av_buf", "aud";
 933                         xlnx,output-fmt = "rgb";
 934                         xlnx,vid-fmt = "yuyv";
 935                         xlnx,gfx-fmt = "rgb565";
 936                 };
 937
 938                 xlnx_dpdma: dma@fd4c0000 {
 939                         compatible = "xlnx,dpdma";
 940                         status = "disabled";
 941                         reg = <0x0 0xfd4c0000 0x1000>;
 942                         interrupts = <0 122 4>;
 943                         interrupt-parent = <&gic>;
 944                         clock-names = "axi_clk";
 945                         dma-channels = <6>;
 946                         #dma-cells = <1>;
 947                         dma-video0channel {
 948                                 compatible = "xlnx,video0";
 949                         };
 950                         dma-video1channel {
 951                                 compatible = "xlnx,video1";
 952                         };
 953                         dma-video2channel {
 954                                 compatible = "xlnx,video2";
 955                         };
 956                         dma-graphicschannel {
 957                                 compatible = "xlnx,graphics";
 958                         };
 959                         dma-audio0channel {
 960                                 compatible = "xlnx,audio0";
 961                         };
 962                         dma-audio1channel {
 963                                 compatible = "xlnx,audio1";
 964                         };
 965                 };
 966         };
 967 };