2 * dts file for Xilinx ZynqMP
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 compatible = "xlnx,zynqmp";
20 compatible = "arm,cortex-a53", "arm,armv8";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53", "arm,armv8";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53", "arm,armv8";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53", "arm,armv8";
43 enable-method = "psci";
49 compatible = "arm,dcc";
55 compatible = "xlnx,zynqmp-genpd";
58 #power-domain-cells = <0x0>;
63 #power-domain-cells = <0x0>;
68 #power-domain-cells = <0x0>;
73 #power-domain-cells = <0x0>;
78 #power-domain-cells = <0x0>;
83 #power-domain-cells = <0x0>;
88 #power-domain-cells = <0x0>;
93 #power-domain-cells = <0x0>;
98 #power-domain-cells = <0x0>;
103 #power-domain-cells = <0x0>;
108 #power-domain-cells = <0x0>;
113 #power-domain-cells = <0x0>;
118 #power-domain-cells = <0x0>;
123 /* fixme: what to attach to */
124 #power-domain-cells = <0x0>;
129 #power-domain-cells = <0x0>;
134 #power-domain-cells = <0x0>;
139 #power-domain-cells = <0x0>;
144 #power-domain-cells = <0x0>;
149 #power-domain-cells = <0x0>;
154 #power-domain-cells = <0x0>;
159 #power-domain-cells = <0x0>;
164 #power-domain-cells = <0x0>;
169 #power-domain-cells = <0x0>;
174 #power-domain-cells = <0x0>;
179 #power-domain-cells = <0x0>;
184 #power-domain-cells = <0x0>;
189 #power-domain-cells = <0x0>;
194 #power-domain-cells = <0x0>;
199 #power-domain-cells = <0x0>;
204 #power-domain-cells = <0x0>;
209 #power-domain-cells = <0x0>;
214 #power-domain-cells = <0x0>;
219 #power-domain-cells = <0x0>;
225 compatible = "arm,armv8-pmuv3";
226 interrupt-parent = <&gic>;
227 interrupts = <0 143 4>,
234 compatible = "arm,psci-0.2";
239 compatible = "xlnx,zynqmp-pm";
244 compatible = "arm,armv8-timer";
245 interrupt-parent = <&gic>;
246 interrupts = <1 13 0xf01>,
252 amba_apu: amba_apu@0 {
253 compatible = "simple-bus";
254 #address-cells = <2>;
256 ranges = <0 0 0 0 0xffffffff>;
258 gic: interrupt-controller@f9010000 {
259 compatible = "arm,gic-400", "arm,cortex-a15-gic";
260 #interrupt-cells = <3>;
261 reg = <0x0 0xf9010000 0x10000>,
262 <0x0 0xf9020000 0x20000>,
263 <0x0 0xf9040000 0x20000>,
264 <0x0 0xf9060000 0x20000>;
265 interrupt-controller;
266 interrupt-parent = <&gic>;
267 interrupts = <1 9 0xf04>;
272 compatible = "simple-bus";
274 #address-cells = <2>;
276 ranges = <0 0 0 0 0xffffffff>;
279 compatible = "xlnx,zynq-can-1.0";
281 clock-names = "can_clk", "pclk";
282 reg = <0x0 0xff060000 0x1000>;
283 interrupts = <0 23 4>;
284 interrupt-parent = <&gic>;
285 tx-fifo-depth = <0x40>;
286 rx-fifo-depth = <0x40>;
287 power-domains = <&pd_can0>;
291 compatible = "xlnx,zynq-can-1.0";
293 clock-names = "can_clk", "pclk";
294 reg = <0x0 0xff070000 0x1000>;
295 interrupts = <0 24 4>;
296 interrupt-parent = <&gic>;
297 tx-fifo-depth = <0x40>;
298 rx-fifo-depth = <0x40>;
299 power-domains = <&pd_can1>;
303 compatible = "arm,cci-400";
304 reg = <0x0 0xfd6e0000 0x9000>;
305 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
306 #address-cells = <1>;
310 compatible = "arm,cci-400-pmu,r1";
311 reg = <0x9000 0x5000>;
312 interrupt-parent = <&gic>;
313 interrupts = <0 123 4>,
322 fpd_dma_chan1: dma@fd500000 {
324 compatible = "xlnx,zynqmp-dma-1.0";
325 reg = <0x0 0xfd500000 0x1000>;
326 interrupt-parent = <&gic>;
327 interrupts = <0 124 4>;
328 clock-names = "clk_main", "clk_apb";
330 xlnx,bus-width = <128>;
331 power-domains = <&pd_gdma>;
334 fpd_dma_chan2: dma@fd510000 {
336 compatible = "xlnx,zynqmp-dma-1.0";
337 reg = <0x0 0xfd510000 0x1000>;
338 interrupt-parent = <&gic>;
339 interrupts = <0 125 4>;
340 clock-names = "clk_main", "clk_apb";
342 xlnx,bus-width = <128>;
343 power-domains = <&pd_gdma>;
346 fpd_dma_chan3: dma@fd520000 {
348 compatible = "xlnx,zynqmp-dma-1.0";
349 reg = <0x0 0xfd520000 0x1000>;
350 interrupt-parent = <&gic>;
351 interrupts = <0 126 4>;
352 clock-names = "clk_main", "clk_apb";
354 xlnx,bus-width = <128>;
355 power-domains = <&pd_gdma>;
358 fpd_dma_chan4: dma@fd530000 {
360 compatible = "xlnx,zynqmp-dma-1.0";
361 reg = <0x0 0xfd530000 0x1000>;
362 interrupt-parent = <&gic>;
363 interrupts = <0 127 4>;
364 clock-names = "clk_main", "clk_apb";
366 xlnx,bus-width = <128>;
367 power-domains = <&pd_gdma>;
370 fpd_dma_chan5: dma@fd540000 {
372 compatible = "xlnx,zynqmp-dma-1.0";
373 reg = <0x0 0xfd540000 0x1000>;
374 interrupt-parent = <&gic>;
375 interrupts = <0 128 4>;
376 clock-names = "clk_main", "clk_apb";
378 xlnx,bus-width = <128>;
379 power-domains = <&pd_gdma>;
382 fpd_dma_chan6: dma@fd550000 {
384 compatible = "xlnx,zynqmp-dma-1.0";
385 reg = <0x0 0xfd550000 0x1000>;
386 interrupt-parent = <&gic>;
387 interrupts = <0 129 4>;
388 clock-names = "clk_main", "clk_apb";
390 xlnx,bus-width = <128>;
391 power-domains = <&pd_gdma>;
394 fpd_dma_chan7: dma@fd560000 {
396 compatible = "xlnx,zynqmp-dma-1.0";
397 reg = <0x0 0xfd560000 0x1000>;
398 interrupt-parent = <&gic>;
399 interrupts = <0 130 4>;
400 clock-names = "clk_main", "clk_apb";
402 xlnx,bus-width = <128>;
403 power-domains = <&pd_gdma>;
406 fpd_dma_chan8: dma@fd570000 {
408 compatible = "xlnx,zynqmp-dma-1.0";
409 reg = <0x0 0xfd570000 0x1000>;
410 interrupt-parent = <&gic>;
411 interrupts = <0 131 4>;
412 clock-names = "clk_main", "clk_apb";
414 xlnx,bus-width = <128>;
415 power-domains = <&pd_gdma>;
420 compatible = "arm,mali-400", "arm,mali-utgard";
421 reg = <0x0 0xfd4b0000 0x30000>;
422 interrupt-parent = <&gic>;
423 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
424 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
428 lpd_dma_chan1: dma@ffa80000 {
430 compatible = "xlnx,zynqmp-dma-1.0";
431 reg = <0x0 0xffa80000 0x1000>;
432 interrupt-parent = <&gic>;
433 interrupts = <0 77 4>;
435 xlnx,bus-width = <64>;
436 power-domains = <&pd_adma>;
439 lpd_dma_chan2: dma@ffa90000 {
441 compatible = "xlnx,zynqmp-dma-1.0";
442 reg = <0x0 0xffa90000 0x1000>;
443 interrupt-parent = <&gic>;
444 interrupts = <0 78 4>;
446 xlnx,bus-width = <64>;
447 power-domains = <&pd_adma>;
450 lpd_dma_chan3: dma@ffaa0000 {
452 compatible = "xlnx,zynqmp-dma-1.0";
453 reg = <0x0 0xffaa0000 0x1000>;
454 interrupt-parent = <&gic>;
455 interrupts = <0 79 4>;
457 xlnx,bus-width = <64>;
458 power-domains = <&pd_adma>;
461 lpd_dma_chan4: dma@ffab0000 {
463 compatible = "xlnx,zynqmp-dma-1.0";
464 reg = <0x0 0xffab0000 0x1000>;
465 interrupt-parent = <&gic>;
466 interrupts = <0 80 4>;
468 xlnx,bus-width = <64>;
469 power-domains = <&pd_adma>;
472 lpd_dma_chan5: dma@ffac0000 {
474 compatible = "xlnx,zynqmp-dma-1.0";
475 reg = <0x0 0xffac0000 0x1000>;
476 interrupt-parent = <&gic>;
477 interrupts = <0 81 4>;
479 xlnx,bus-width = <64>;
480 power-domains = <&pd_adma>;
483 lpd_dma_chan6: dma@ffad0000 {
485 compatible = "xlnx,zynqmp-dma-1.0";
486 reg = <0x0 0xffad0000 0x1000>;
487 interrupt-parent = <&gic>;
488 interrupts = <0 82 4>;
490 xlnx,bus-width = <64>;
491 power-domains = <&pd_adma>;
494 lpd_dma_chan7: dma@ffae0000 {
496 compatible = "xlnx,zynqmp-dma-1.0";
497 reg = <0x0 0xffae0000 0x1000>;
498 interrupt-parent = <&gic>;
499 interrupts = <0 83 4>;
501 xlnx,bus-width = <64>;
502 power-domains = <&pd_adma>;
505 lpd_dma_chan8: dma@ffaf0000 {
507 compatible = "xlnx,zynqmp-dma-1.0";
508 reg = <0x0 0xffaf0000 0x1000>;
509 interrupt-parent = <&gic>;
510 interrupts = <0 84 4>;
512 xlnx,bus-width = <64>;
513 power-domains = <&pd_adma>;
516 mc: memory-controller@fd070000 {
517 compatible = "xlnx,zynqmp-ddrc-2.40a";
518 reg = <0x0 0xfd070000 0x30000>;
519 interrupt-parent = <&gic>;
520 interrupts = <0 112 4>;
523 nand0: nand@ff100000 {
524 compatible = "arasan,nfc-v3p10";
526 reg = <0x0 0xff100000 0x1000>;
527 clock-names = "clk_sys", "clk_flash";
528 interrupt-parent = <&gic>;
529 interrupts = <0 14 4>;
530 #address-cells = <2>;
532 power-domains = <&pd_nand>;
535 gem0: ethernet@ff0b0000 {
536 compatible = "cdns,zynqmp-gem";
538 interrupt-parent = <&gic>;
539 interrupts = <0 57 4>, <0 57 4>;
540 reg = <0x0 0xff0b0000 0x1000>;
541 clock-names = "pclk", "hclk", "tx_clk";
542 #address-cells = <1>;
544 #stream-id-cells = <1>;
545 power-domains = <&pd_eth0>;
548 gem1: ethernet@ff0c0000 {
549 compatible = "cdns,zynqmp-gem";
551 interrupt-parent = <&gic>;
552 interrupts = <0 59 4>, <0 59 4>;
553 reg = <0x0 0xff0c0000 0x1000>;
554 clock-names = "pclk", "hclk", "tx_clk";
555 #address-cells = <1>;
557 #stream-id-cells = <1>;
558 power-domains = <&pd_eth1>;
561 gem2: ethernet@ff0d0000 {
562 compatible = "cdns,zynqmp-gem";
564 interrupt-parent = <&gic>;
565 interrupts = <0 61 4>, <0 61 4>;
566 reg = <0x0 0xff0d0000 0x1000>;
567 clock-names = "pclk", "hclk", "tx_clk";
568 #address-cells = <1>;
570 #stream-id-cells = <1>;
571 power-domains = <&pd_eth2>;
574 gem3: ethernet@ff0e0000 {
575 compatible = "cdns,zynqmp-gem";
577 interrupt-parent = <&gic>;
578 interrupts = <0 63 4>, <0 63 4>;
579 reg = <0x0 0xff0e0000 0x1000>;
580 clock-names = "pclk", "hclk", "tx_clk";
581 #address-cells = <1>;
583 #stream-id-cells = <1>;
584 power-domains = <&pd_eth3>;
587 gpio: gpio@ff0a0000 {
588 compatible = "xlnx,zynqmp-gpio-1.0";
591 #interrupt-cells = <2>;
592 interrupt-controller;
593 interrupt-parent = <&gic>;
594 interrupts = <0 16 4>;
595 reg = <0x0 0xff0a0000 0x1000>;
596 power-domains = <&pd_gpio>;
600 compatible = "cdns,i2c-r1p10";
602 interrupt-parent = <&gic>;
603 interrupts = <0 17 4>;
604 reg = <0x0 0xff020000 0x1000>;
605 #address-cells = <1>;
607 power-domains = <&pd_i2c0>;
611 compatible = "cdns,i2c-r1p10";
613 interrupt-parent = <&gic>;
614 interrupts = <0 18 4>;
615 reg = <0x0 0xff030000 0x1000>;
616 #address-cells = <1>;
618 power-domains = <&pd_i2c1>;
621 pcie: pcie@fd0e0000 {
622 compatible = "xlnx,nwl-pcie-2.11";
624 #address-cells = <3>;
626 #interrupt-cells = <1>;
628 interrupt-parent = <&gic>;
629 interrupts = <0 118 4>,
631 <0 115 4>, /* MSI_1 [63...32] */
632 <0 114 4>; /* MSI_0 [31...0] */
633 interrupt-names = "misc", "intx", "msi_1", "msi_0";
634 reg = <0x0 0xfd0e0000 0x1000>,
635 <0x0 0xfd480000 0x1000>,
636 <0x0 0xe0000000 0x1000000>;
637 reg-names = "breg", "pcireg", "cfg";
638 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
639 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
640 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
641 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
642 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
643 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
644 pcie_intc: legacy-interrupt-controller {
645 interrupt-controller;
646 #address-cells = <0>;
647 #interrupt-cells = <1>;
652 compatible = "xlnx,zynqmp-qspi-1.0";
654 clock-names = "ref_clk", "pclk";
655 interrupts = <0 15 4>;
656 interrupt-parent = <&gic>;
658 reg = <0x0 0xff0f0000 0x1000>,
659 <0x0 0xc0000000 0x8000000>;
660 #address-cells = <1>;
662 power-domains = <&pd_qspi>;
666 compatible = "xlnx,zynqmp-rtc";
668 reg = <0x0 0xffa60000 0x100>;
669 interrupt-parent = <&gic>;
670 interrupts = <0 26 4>, <0 27 4>;
671 interrupt-names = "alarm", "sec";
674 sata: ahci@fd0c0000 {
675 compatible = "ceva,ahci-1v84";
677 reg = <0x0 0xfd0c0000 0x2000>;
678 interrupt-parent = <&gic>;
679 interrupts = <0 133 4>;
680 power-domains = <&pd_sata>;
683 sdhci0: sdhci@ff160000 {
685 compatible = "arasan,sdhci-8.9a";
687 interrupt-parent = <&gic>;
688 interrupts = <0 48 4>;
689 reg = <0x0 0xff160000 0x1000>;
690 clock-names = "clk_xin", "clk_ahb";
692 power-domains = <&pd_sd0>;
695 sdhci1: sdhci@ff170000 {
697 compatible = "arasan,sdhci-8.9a";
699 interrupt-parent = <&gic>;
700 interrupts = <0 49 4>;
701 reg = <0x0 0xff170000 0x1000>;
702 clock-names = "clk_xin", "clk_ahb";
704 power-domains = <&pd_sd1>;
707 smmu: smmu@fd800000 {
708 compatible = "arm,mmu-500";
709 reg = <0x0 0xfd800000 0x20000>;
710 #global-interrupts = <1>;
711 interrupt-parent = <&gic>;
712 interrupts = <0 155 4>,
713 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
714 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
715 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
716 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
717 mmu-masters = < &gem0 0x874
724 compatible = "cdns,spi-r1p6";
726 interrupt-parent = <&gic>;
727 interrupts = <0 19 4>;
728 reg = <0x0 0xff040000 0x1000>;
729 clock-names = "ref_clk", "pclk";
730 #address-cells = <1>;
732 power-domains = <&pd_spi0>;
736 compatible = "cdns,spi-r1p6";
738 interrupt-parent = <&gic>;
739 interrupts = <0 20 4>;
740 reg = <0x0 0xff050000 0x1000>;
741 clock-names = "ref_clk", "pclk";
742 #address-cells = <1>;
744 power-domains = <&pd_spi1>;
747 ttc0: timer@ff110000 {
748 compatible = "cdns,ttc";
750 interrupt-parent = <&gic>;
751 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
752 reg = <0x0 0xff110000 0x1000>;
754 power-domains = <&pd_ttc0>;
757 ttc1: timer@ff120000 {
758 compatible = "cdns,ttc";
760 interrupt-parent = <&gic>;
761 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
762 reg = <0x0 0xff120000 0x1000>;
764 power-domains = <&pd_ttc1>;
767 ttc2: timer@ff130000 {
768 compatible = "cdns,ttc";
770 interrupt-parent = <&gic>;
771 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
772 reg = <0x0 0xff130000 0x1000>;
774 power-domains = <&pd_ttc2>;
777 ttc3: timer@ff140000 {
778 compatible = "cdns,ttc";
780 interrupt-parent = <&gic>;
781 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
782 reg = <0x0 0xff140000 0x1000>;
784 power-domains = <&pd_ttc3>;
787 uart0: serial@ff000000 {
789 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
791 interrupt-parent = <&gic>;
792 interrupts = <0 21 4>;
793 reg = <0x0 0xff000000 0x1000>;
794 clock-names = "uart_clk", "pclk";
795 power-domains = <&pd_uart0>;
798 uart1: serial@ff010000 {
800 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
802 interrupt-parent = <&gic>;
803 interrupts = <0 22 4>;
804 reg = <0x0 0xff010000 0x1000>;
805 clock-names = "uart_clk", "pclk";
806 power-domains = <&pd_uart1>;
810 #address-cells = <2>;
813 compatible = "xlnx,zynqmp-dwc3";
814 clock-names = "bus_clk", "ref_clk";
815 clocks = <&clk125>, <&clk125>;
816 power-domains = <&pd_usb0>;
819 dwc3_0: dwc3@fe200000 {
820 compatible = "snps,dwc3";
822 reg = <0x0 0xfe200000 0x40000>;
823 interrupt-parent = <&gic>;
824 interrupts = <0 65 4>;
825 /* snps,quirk-frame-length-adjustment = <0x20>; */
831 #address-cells = <2>;
834 compatible = "xlnx,zynqmp-dwc3";
835 clock-names = "bus_clk", "ref_clk";
836 clocks = <&clk125>, <&clk125>;
837 power-domains = <&pd_usb1>;
840 dwc3_1: dwc3@fe300000 {
841 compatible = "snps,dwc3";
843 reg = <0x0 0xfe300000 0x40000>;
844 interrupt-parent = <&gic>;
845 interrupts = <0 70 4>;
846 /* snps,quirk-frame-length-adjustment = <0x20>; */
851 watchdog0: watchdog@fd4d0000 {
852 compatible = "cdns,wdt-r1p2";
854 interrupt-parent = <&gic>;
855 interrupts = <0 113 1>;
856 reg = <0x0 0xfd4d0000 0x1000>;
860 xilinx_drm: xilinx_drm {
861 compatible = "xlnx,drm";
863 xlnx,encoder-slave = <&xlnx_dp>;
864 xlnx,connector-type = "DisplayPort";
865 xlnx,dp-sub = <&xlnx_dp_sub>;
867 xlnx,pixel-format = "rgb565";
869 dmas = <&xlnx_dpdma 3>;
873 dmas = <&xlnx_dpdma 0>;
879 xlnx_dp: dp@fd4a0000 {
880 compatible = "xlnx,v-dp";
882 reg = <0x0 0xfd4a0000 0x1000>,
883 <0x0 0xfd400000 0x20000>;
884 interrupts = <0 119 4>;
885 interrupt-parent = <&gic>;
886 clock-names = "aclk", "aud_clk";
887 xlnx,dp-version = "v1.2";
888 xlnx,max-lanes = <2>;
889 xlnx,max-link-rate = <540000>;
892 xlnx,colormetry = "rgb";
894 xlnx,audio-chan = <2>;
895 xlnx,dp-sub = <&xlnx_dp_sub>;
896 xlnx,max-pclock-frequency = <300000>;
899 xlnx_dp_snd_card: dp_snd_card {
900 compatible = "xlnx,dp-snd-card";
902 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
903 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
906 xlnx_dp_snd_codec0: dp_snd_codec0 {
907 compatible = "xlnx,dp-snd-codec";
909 clock-names = "aud_clk";
912 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
913 compatible = "xlnx,dp-snd-pcm";
915 dmas = <&xlnx_dpdma 4>;
919 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
920 compatible = "xlnx,dp-snd-pcm";
922 dmas = <&xlnx_dpdma 5>;
926 xlnx_dp_sub: dp_sub@fd4aa000 {
927 compatible = "xlnx,dp-sub";
929 reg = <0x0 0xfd4aa000 0x1000>,
930 <0x0 0xfd4ab000 0x1000>,
931 <0x0 0xfd4ac000 0x1000>;
932 reg-names = "blend", "av_buf", "aud";
933 xlnx,output-fmt = "rgb";
934 xlnx,vid-fmt = "yuyv";
935 xlnx,gfx-fmt = "rgb565";
938 xlnx_dpdma: dma@fd4c0000 {
939 compatible = "xlnx,dpdma";
941 reg = <0x0 0xfd4c0000 0x1000>;
942 interrupts = <0 122 4>;
943 interrupt-parent = <&gic>;
944 clock-names = "axi_clk";
948 compatible = "xlnx,video0";
951 compatible = "xlnx,video1";
954 compatible = "xlnx,video2";
956 dma-graphicschannel {
957 compatible = "xlnx,graphics";
960 compatible = "xlnx,audio0";
963 compatible = "xlnx,audio1";