arch/arm/dts/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 / {
  11         compatible = "xlnx,zynqmp";
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "arm,cortex-a53", "arm,armv8";
  21                         device_type = "cpu";
  22                         enable-method = "psci";
  23                         reg = <0x0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         enable-method = "psci";
  30                         reg = <0x1>;
  31                 };
  32
  33                 cpu@2 {
  34                         compatible = "arm,cortex-a53", "arm,armv8";
  35                         device_type = "cpu";
  36                         enable-method = "psci";
  37                         reg = <0x2>;
  38                 };
  39
  40                 cpu@3 {
  41                         compatible = "arm,cortex-a53", "arm,armv8";
  42                         device_type = "cpu";
  43                         enable-method = "psci";
  44                         reg = <0x3>;
  45                 };
  46         };
  47
  48         dcc: dcc {
  49                 compatible = "arm,dcc";
  50                 status = "disabled";
  51                 u-boot,dm-pre-reloc;
  52         };
  53
  54         power-domains {
  55                 compatible = "xlnx,zynqmp-genpd";
  56
  57                 pd_usb0: pd-usb0 {
  58                         #power-domain-cells = <0x0>;
  59                         pd-id = <0x16>;
  60                 };
  61
  62                 pd_usb1: pd-usb1 {
  63                         #power-domain-cells = <0x0>;
  64                         pd-id = <0x17>;
  65                 };
  66
  67                 pd_sata: pd-sata {
  68                         #power-domain-cells = <0x0>;
  69                         pd-id = <0x1c>;
  70                 };
  71
  72                 pd_spi0: pd-spi0 {
  73                         #power-domain-cells = <0x0>;
  74                         pd-id = <0x23>;
  75                 };
  76
  77                 pd_spi1: pd-spi1 {
  78                         #power-domain-cells = <0x0>;
  79                         pd-id = <0x24>;
  80                 };
  81
  82                 pd_uart0: pd-uart0 {
  83                         #power-domain-cells = <0x0>;
  84                         pd-id = <0x21>;
  85                 };
  86
  87                 pd_uart1: pd-uart1 {
  88                         #power-domain-cells = <0x0>;
  89                         pd-id = <0x22>;
  90                 };
  91
  92                 pd_eth0: pd-eth0 {
  93                         #power-domain-cells = <0x0>;
  94                         pd-id = <0x1d>;
  95                 };
  96
  97                 pd_eth1: pd-eth1 {
  98                         #power-domain-cells = <0x0>;
  99                         pd-id = <0x1e>;
 100                 };
 101
 102                 pd_eth2: pd-eth2 {
 103                         #power-domain-cells = <0x0>;
 104                         pd-id = <0x1f>;
 105                 };
 106
 107                 pd_eth3: pd-eth3 {
 108                         #power-domain-cells = <0x0>;
 109                         pd-id = <0x20>;
 110                 };
 111
 112                 pd_i2c0: pd-i2c0 {
 113                         #power-domain-cells = <0x0>;
 114                         pd-id = <0x25>;
 115                 };
 116
 117                 pd_i2c1: pd-i2c1 {
 118                         #power-domain-cells = <0x0>;
 119                         pd-id = <0x26>;
 120                 };
 121
 122                 pd_dp: pd-dp {
 123                         /* fixme: what to attach to */
 124                         #power-domain-cells = <0x0>;
 125                         pd-id = <0x29>;
 126                 };
 127
 128                 pd_gdma: pd-gdma {
 129                         #power-domain-cells = <0x0>;
 130                         pd-id = <0x2a>;
 131                 };
 132
 133                 pd_adma: pd-adma {
 134                         #power-domain-cells = <0x0>;
 135                         pd-id = <0x2b>;
 136                 };
 137
 138                 pd_ttc0: pd-ttc0 {
 139                         #power-domain-cells = <0x0>;
 140                         pd-id = <0x18>;
 141                 };
 142
 143                 pd_ttc1: pd-ttc1 {
 144                         #power-domain-cells = <0x0>;
 145                         pd-id = <0x19>;
 146                 };
 147
 148                 pd_ttc2: pd-ttc2 {
 149                         #power-domain-cells = <0x0>;
 150                         pd-id = <0x1a>;
 151                 };
 152
 153                 pd_ttc3: pd-ttc3 {
 154                         #power-domain-cells = <0x0>;
 155                         pd-id = <0x1b>;
 156                 };
 157
 158                 pd_sd0: pd-sd0 {
 159                         #power-domain-cells = <0x0>;
 160                         pd-id = <0x27>;
 161                 };
 162
 163                 pd_sd1: pd-sd1 {
 164                         #power-domain-cells = <0x0>;
 165                         pd-id = <0x28>;
 166                 };
 167
 168                 pd_nand: pd-nand {
 169                         #power-domain-cells = <0x0>;
 170                         pd-id = <0x2c>;
 171                 };
 172
 173                 pd_qspi: pd-qspi {
 174                         #power-domain-cells = <0x0>;
 175                         pd-id = <0x2d>;
 176                 };
 177
 178                 pd_gpio: pd-gpio {
 179                         #power-domain-cells = <0x0>;
 180                         pd-id = <0x2e>;
 181                 };
 182
 183                 pd_can0: pd-can0 {
 184                         #power-domain-cells = <0x0>;
 185                         pd-id = <0x2f>;
 186                 };
 187
 188                 pd_can1: pd-can1 {
 189                         #power-domain-cells = <0x0>;
 190                         pd-id = <0x30>;
 191                 };
 192
 193                 pd_pcie: pd-pcie {
 194                         #power-domain-cells = <0x0>;
 195                         pd-id = <0x3b>;
 196                 };
 197
 198                 pd_gpu: pd-gpu {
 199                         #power-domain-cells = <0x0>;
 200                         pd-id = <0x3a 0x14 0x15>;
 201                 };
 202         };
 203
 204         pmu {
 205                 compatible = "arm,armv8-pmuv3";
 206                 interrupt-parent = <&gic>;
 207                 interrupts = <0 143 4>,
 208                              <0 144 4>,
 209                              <0 145 4>,
 210                              <0 146 4>;
 211         };
 212
 213         psci {
 214                 compatible = "arm,psci-0.2";
 215                 method = "smc";
 216         };
 217
 218         firmware {
 219                 compatible = "xlnx,zynqmp-pm";
 220                 method = "smc";
 221         };
 222
 223         timer {
 224                 compatible = "arm,armv8-timer";
 225                 interrupt-parent = <&gic>;
 226                 interrupts = <1 13 0xf01>,
 227                              <1 14 0xf01>,
 228                              <1 11 0xf01>,
 229                              <1 10 0xf01>;
 230         };
 231
 232         edac {
 233                 compatible = "arm,cortex-a53-edac";
 234         };
 235
 236         amba_apu: amba_apu@0 {
 237                 compatible = "simple-bus";
 238                 #address-cells = <2>;
 239                 #size-cells = <1>;
 240                 ranges = <0 0 0 0 0xffffffff>;
 241
 242                 gic: interrupt-controller@f9010000 {
 243                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 244                         #interrupt-cells = <3>;
 245                         reg = <0x0 0xf9010000 0x10000>,
 246                               <0x0 0xf9020000 0x20000>,
 247                               <0x0 0xf9040000 0x20000>,
 248                               <0x0 0xf9060000 0x20000>;
 249                         interrupt-controller;
 250                         interrupt-parent = <&gic>;
 251                         interrupts = <1 9 0xf04>;
 252                 };
 253         };
 254
 255         amba: amba@0 {
 256                 compatible = "simple-bus";
 257                 u-boot,dm-pre-reloc;
 258                 #address-cells = <2>;
 259                 #size-cells = <1>;
 260                 ranges = <0 0 0 0 0xffffffff>;
 261
 262                 can0: can@ff060000 {
 263                         compatible = "xlnx,zynq-can-1.0";
 264                         status = "disabled";
 265                         clock-names = "can_clk", "pclk";
 266                         reg = <0x0 0xff060000 0x1000>;
 267                         interrupts = <0 23 4>;
 268                         interrupt-parent = <&gic>;
 269                         tx-fifo-depth = <0x40>;
 270                         rx-fifo-depth = <0x40>;
 271                         power-domains = <&pd_can0>;
 272                 };
 273
 274                 can1: can@ff070000 {
 275                         compatible = "xlnx,zynq-can-1.0";
 276                         status = "disabled";
 277                         clock-names = "can_clk", "pclk";
 278                         reg = <0x0 0xff070000 0x1000>;
 279                         interrupts = <0 24 4>;
 280                         interrupt-parent = <&gic>;
 281                         tx-fifo-depth = <0x40>;
 282                         rx-fifo-depth = <0x40>;
 283                         power-domains = <&pd_can1>;
 284                 };
 285
 286                 cci: cci@fd6e0000 {
 287                         compatible = "arm,cci-400";
 288                         reg = <0x0 0xfd6e0000 0x9000>;
 289                         ranges = <0x0 0x0 0xfd6e0000 0x10000>;
 290                         #address-cells = <1>;
 291                         #size-cells = <1>;
 292
 293                         pmu@9000 {
 294                                 compatible = "arm,cci-400-pmu,r1";
 295                                 reg = <0x9000 0x5000>;
 296                                 interrupt-parent = <&gic>;
 297                                 interrupts = <0 123 4>,
 298                                              <0 123 4>,
 299                                              <0 123 4>,
 300                                              <0 123 4>,
 301                                              <0 123 4>;
 302                         };
 303                 };
 304
 305                 /* GDMA */
 306                 fpd_dma_chan1: dma@fd500000 {
 307                         status = "disabled";
 308                         compatible = "xlnx,zynqmp-dma-1.0";
 309                         reg = <0x0 0xfd500000 0x1000>;
 310                         interrupt-parent = <&gic>;
 311                         interrupts = <0 124 4>;
 312                         clock-names = "clk_main", "clk_apb";
 313                         xlnx,bus-width = <128>;
 314                         power-domains = <&pd_gdma>;
 315                 };
 316
 317                 fpd_dma_chan2: dma@fd510000 {
 318                         status = "disabled";
 319                         compatible = "xlnx,zynqmp-dma-1.0";
 320                         reg = <0x0 0xfd510000 0x1000>;
 321                         interrupt-parent = <&gic>;
 322                         interrupts = <0 125 4>;
 323                         clock-names = "clk_main", "clk_apb";
 324                         xlnx,bus-width = <128>;
 325                         power-domains = <&pd_gdma>;
 326                 };
 327
 328                 fpd_dma_chan3: dma@fd520000 {
 329                         status = "disabled";
 330                         compatible = "xlnx,zynqmp-dma-1.0";
 331                         reg = <0x0 0xfd520000 0x1000>;
 332                         interrupt-parent = <&gic>;
 333                         interrupts = <0 126 4>;
 334                         clock-names = "clk_main", "clk_apb";
 335                         xlnx,bus-width = <128>;
 336                         power-domains = <&pd_gdma>;
 337                 };
 338
 339                 fpd_dma_chan4: dma@fd530000 {
 340                         status = "disabled";
 341                         compatible = "xlnx,zynqmp-dma-1.0";
 342                         reg = <0x0 0xfd530000 0x1000>;
 343                         interrupt-parent = <&gic>;
 344                         interrupts = <0 127 4>;
 345                         clock-names = "clk_main", "clk_apb";
 346                         xlnx,bus-width = <128>;
 347                         power-domains = <&pd_gdma>;
 348                 };
 349
 350                 fpd_dma_chan5: dma@fd540000 {
 351                         status = "disabled";
 352                         compatible = "xlnx,zynqmp-dma-1.0";
 353                         reg = <0x0 0xfd540000 0x1000>;
 354                         interrupt-parent = <&gic>;
 355                         interrupts = <0 128 4>;
 356                         clock-names = "clk_main", "clk_apb";
 357                         xlnx,bus-width = <128>;
 358                         power-domains = <&pd_gdma>;
 359                 };
 360
 361                 fpd_dma_chan6: dma@fd550000 {
 362                         status = "disabled";
 363                         compatible = "xlnx,zynqmp-dma-1.0";
 364                         reg = <0x0 0xfd550000 0x1000>;
 365                         interrupt-parent = <&gic>;
 366                         interrupts = <0 129 4>;
 367                         clock-names = "clk_main", "clk_apb";
 368                         xlnx,bus-width = <128>;
 369                         power-domains = <&pd_gdma>;
 370                 };
 371
 372                 fpd_dma_chan7: dma@fd560000 {
 373                         status = "disabled";
 374                         compatible = "xlnx,zynqmp-dma-1.0";
 375                         reg = <0x0 0xfd560000 0x1000>;
 376                         interrupt-parent = <&gic>;
 377                         interrupts = <0 130 4>;
 378                         clock-names = "clk_main", "clk_apb";
 379                         xlnx,bus-width = <128>;
 380                         power-domains = <&pd_gdma>;
 381                 };
 382
 383                 fpd_dma_chan8: dma@fd570000 {
 384                         status = "disabled";
 385                         compatible = "xlnx,zynqmp-dma-1.0";
 386                         reg = <0x0 0xfd570000 0x1000>;
 387                         interrupt-parent = <&gic>;
 388                         interrupts = <0 131 4>;
 389                         clock-names = "clk_main", "clk_apb";
 390                         xlnx,bus-width = <128>;
 391                         power-domains = <&pd_gdma>;
 392                 };
 393
 394                 gpu: gpu@fd4b0000 {
 395                         status = "disabled";
 396                         compatible = "arm,mali-400", "arm,mali-utgard";
 397                         reg = <0x0 0xfd4b0000 0x30000>;
 398                         interrupt-parent = <&gic>;
 399                         interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
 400                         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
 401                         power-domains = <&pd_gpu>;
 402                 };
 403
 404                 /* ADMA */
 405                 lpd_dma_chan1: dma@ffa80000 {
 406                         status = "disabled";
 407                         compatible = "xlnx,zynqmp-dma-1.0";
 408                         reg = <0x0 0xffa80000 0x1000>;
 409                         interrupt-parent = <&gic>;
 410                         interrupts = <0 77 4>;
 411                         xlnx,bus-width = <64>;
 412                         power-domains = <&pd_adma>;
 413                 };
 414
 415                 lpd_dma_chan2: dma@ffa90000 {
 416                         status = "disabled";
 417                         compatible = "xlnx,zynqmp-dma-1.0";
 418                         reg = <0x0 0xffa90000 0x1000>;
 419                         interrupt-parent = <&gic>;
 420                         interrupts = <0 78 4>;
 421                         xlnx,bus-width = <64>;
 422                         power-domains = <&pd_adma>;
 423                 };
 424
 425                 lpd_dma_chan3: dma@ffaa0000 {
 426                         status = "disabled";
 427                         compatible = "xlnx,zynqmp-dma-1.0";
 428                         reg = <0x0 0xffaa0000 0x1000>;
 429                         interrupt-parent = <&gic>;
 430                         interrupts = <0 79 4>;
 431                         xlnx,bus-width = <64>;
 432                         power-domains = <&pd_adma>;
 433                 };
 434
 435                 lpd_dma_chan4: dma@ffab0000 {
 436                         status = "disabled";
 437                         compatible = "xlnx,zynqmp-dma-1.0";
 438                         reg = <0x0 0xffab0000 0x1000>;
 439                         interrupt-parent = <&gic>;
 440                         interrupts = <0 80 4>;
 441                         xlnx,bus-width = <64>;
 442                         power-domains = <&pd_adma>;
 443                 };
 444
 445                 lpd_dma_chan5: dma@ffac0000 {
 446                         status = "disabled";
 447                         compatible = "xlnx,zynqmp-dma-1.0";
 448                         reg = <0x0 0xffac0000 0x1000>;
 449                         interrupt-parent = <&gic>;
 450                         interrupts = <0 81 4>;
 451                         xlnx,bus-width = <64>;
 452                         power-domains = <&pd_adma>;
 453                 };
 454
 455                 lpd_dma_chan6: dma@ffad0000 {
 456                         status = "disabled";
 457                         compatible = "xlnx,zynqmp-dma-1.0";
 458                         reg = <0x0 0xffad0000 0x1000>;
 459                         interrupt-parent = <&gic>;
 460                         interrupts = <0 82 4>;
 461                         xlnx,bus-width = <64>;
 462                         power-domains = <&pd_adma>;
 463                 };
 464
 465                 lpd_dma_chan7: dma@ffae0000 {
 466                         status = "disabled";
 467                         compatible = "xlnx,zynqmp-dma-1.0";
 468                         reg = <0x0 0xffae0000 0x1000>;
 469                         interrupt-parent = <&gic>;
 470                         interrupts = <0 83 4>;
 471                         xlnx,bus-width = <64>;
 472                         power-domains = <&pd_adma>;
 473                 };
 474
 475                 lpd_dma_chan8: dma@ffaf0000 {
 476                         status = "disabled";
 477                         compatible = "xlnx,zynqmp-dma-1.0";
 478                         reg = <0x0 0xffaf0000 0x1000>;
 479                         interrupt-parent = <&gic>;
 480                         interrupts = <0 84 4>;
 481                         xlnx,bus-width = <64>;
 482                         power-domains = <&pd_adma>;
 483                 };
 484
 485                 mc: memory-controller@fd070000 {
 486                         compatible = "xlnx,zynqmp-ddrc-2.40a";
 487                         reg = <0x0 0xfd070000 0x30000>;
 488                         interrupt-parent = <&gic>;
 489                         interrupts = <0 112 4>;
 490                 };
 491
 492                 nand0: nand@ff100000 {
 493                         compatible = "arasan,nfc-v3p10";
 494                         status = "disabled";
 495                         reg = <0x0 0xff100000 0x1000>;
 496                         clock-names = "clk_sys", "clk_flash";
 497                         interrupt-parent = <&gic>;
 498                         interrupts = <0 14 4>;
 499                         #address-cells = <2>;
 500                         #size-cells = <1>;
 501                         power-domains = <&pd_nand>;
 502                 };
 503
 504                 gem0: ethernet@ff0b0000 {
 505                         compatible = "cdns,zynqmp-gem";
 506                         status = "disabled";
 507                         interrupt-parent = <&gic>;
 508                         interrupts = <0 57 4>, <0 57 4>;
 509                         reg = <0x0 0xff0b0000 0x1000>;
 510                         clock-names = "pclk", "hclk", "tx_clk";
 511                         #address-cells = <1>;
 512                         #size-cells = <0>;
 513                         #stream-id-cells = <1>;
 514                         power-domains = <&pd_eth0>;
 515                 };
 516
 517                 gem1: ethernet@ff0c0000 {
 518                         compatible = "cdns,zynqmp-gem";
 519                         status = "disabled";
 520                         interrupt-parent = <&gic>;
 521                         interrupts = <0 59 4>, <0 59 4>;
 522                         reg = <0x0 0xff0c0000 0x1000>;
 523                         clock-names = "pclk", "hclk", "tx_clk";
 524                         #address-cells = <1>;
 525                         #size-cells = <0>;
 526                         #stream-id-cells = <1>;
 527                         power-domains = <&pd_eth1>;
 528                 };
 529
 530                 gem2: ethernet@ff0d0000 {
 531                         compatible = "cdns,zynqmp-gem";
 532                         status = "disabled";
 533                         interrupt-parent = <&gic>;
 534                         interrupts = <0 61 4>, <0 61 4>;
 535                         reg = <0x0 0xff0d0000 0x1000>;
 536                         clock-names = "pclk", "hclk", "tx_clk";
 537                         #address-cells = <1>;
 538                         #size-cells = <0>;
 539                         #stream-id-cells = <1>;
 540                         power-domains = <&pd_eth2>;
 541                 };
 542
 543                 gem3: ethernet@ff0e0000 {
 544                         compatible = "cdns,zynqmp-gem";
 545                         status = "disabled";
 546                         interrupt-parent = <&gic>;
 547                         interrupts = <0 63 4>, <0 63 4>;
 548                         reg = <0x0 0xff0e0000 0x1000>;
 549                         clock-names = "pclk", "hclk", "tx_clk";
 550                         #address-cells = <1>;
 551                         #size-cells = <0>;
 552                         #stream-id-cells = <1>;
 553                         power-domains = <&pd_eth3>;
 554                 };
 555
 556                 gpio: gpio@ff0a0000 {
 557                         compatible = "xlnx,zynqmp-gpio-1.0";
 558                         status = "disabled";
 559                         #gpio-cells = <0x2>;
 560                         interrupt-parent = <&gic>;
 561                         interrupts = <0 16 4>;
 562                         interrupt-controller;
 563                         #interrupt-cells = <2>;
 564                         reg = <0x0 0xff0a0000 0x1000>;
 565                         power-domains = <&pd_gpio>;
 566                 };
 567
 568                 i2c0: i2c@ff020000 {
 569                         compatible = "cdns,i2c-r1p10";
 570                         status = "disabled";
 571                         interrupt-parent = <&gic>;
 572                         interrupts = <0 17 4>;
 573                         reg = <0x0 0xff020000 0x1000>;
 574                         #address-cells = <1>;
 575                         #size-cells = <0>;
 576                         power-domains = <&pd_i2c0>;
 577                 };
 578
 579                 i2c1: i2c@ff030000 {
 580                         compatible = "cdns,i2c-r1p10";
 581                         status = "disabled";
 582                         interrupt-parent = <&gic>;
 583                         interrupts = <0 18 4>;
 584                         reg = <0x0 0xff030000 0x1000>;
 585                         #address-cells = <1>;
 586                         #size-cells = <0>;
 587                         power-domains = <&pd_i2c1>;
 588                 };
 589
 590                 pcie: pcie@fd0e0000 {
 591                         compatible = "xlnx,nwl-pcie-2.11";
 592                         status = "disabled";
 593                         #address-cells = <3>;
 594                         #size-cells = <2>;
 595                         #interrupt-cells = <1>;
 596                         msi-controller;
 597                         device_type = "pci";
 598                         interrupt-parent = <&gic>;
 599                         interrupts = <0 118 4>,
 600                                      <0 117 4>,
 601                                      <0 116 4>,
 602                                      <0 115 4>, /* MSI_1 [63...32] */
 603                                      <0 114 4>; /* MSI_0 [31...0] */
 604                         interrupt-names = "misc","dummy","intx", "msi1", "msi0";
 605                         msi-parent = <&pcie>;
 606                         reg = <0x0 0xfd0e0000 0x1000>,
 607                               <0x0 0xfd480000 0x1000>,
 608                               <0x0 0xe0000000 0x1000000>;
 609                         reg-names = "breg", "pcireg", "cfg";
 610                         ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
 611                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 612                         interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
 613                                         <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
 614                                         <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
 615                                         <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
 616                         power-domains = <&pd_pcie>;
 617                         pcie_intc: legacy-interrupt-controller {
 618                                 interrupt-controller;
 619                                 #address-cells = <0>;
 620                                 #interrupt-cells = <1>;
 621                         };
 622                 };
 623
 624                 qspi: spi@ff0f0000 {
 625                         compatible = "xlnx,zynqmp-qspi-1.0";
 626                         status = "disabled";
 627                         clock-names = "ref_clk", "pclk";
 628                         interrupts = <0 15 4>;
 629                         interrupt-parent = <&gic>;
 630                         num-cs = <1>;
 631                         reg = <0x0 0xff0f0000 0x1000>,
 632                               <0x0 0xc0000000 0x8000000>;
 633                         #address-cells = <1>;
 634                         #size-cells = <0>;
 635                         power-domains = <&pd_qspi>;
 636                 };
 637
 638                 rtc: rtc@ffa60000 {
 639                         compatible = "xlnx,zynqmp-rtc";
 640                         status = "disabled";
 641                         reg = <0x0 0xffa60000 0x100>;
 642                         interrupt-parent = <&gic>;
 643                         interrupts = <0 26 4>, <0 27 4>;
 644                         interrupt-names = "alarm", "sec";
 645                 };
 646
 647                 sata: ahci@fd0c0000 {
 648                         compatible = "ceva,ahci-1v84";
 649                         status = "disabled";
 650                         reg = <0x0 0xfd0c0000 0x2000>;
 651                         interrupt-parent = <&gic>;
 652                         interrupts = <0 133 4>;
 653                         power-domains = <&pd_sata>;
 654                 };
 655
 656                 sdhci0: sdhci@ff160000 {
 657                         u-boot,dm-pre-reloc;
 658                         compatible = "arasan,sdhci-8.9a";
 659                         status = "disabled";
 660                         interrupt-parent = <&gic>;
 661                         interrupts = <0 48 4>;
 662                         reg = <0x0 0xff160000 0x1000>;
 663                         clock-names = "clk_xin", "clk_ahb";
 664                         broken-tuning;
 665                         power-domains = <&pd_sd0>;
 666                 };
 667
 668                 sdhci1: sdhci@ff170000 {
 669                         u-boot,dm-pre-reloc;
 670                         compatible = "arasan,sdhci-8.9a";
 671                         status = "disabled";
 672                         interrupt-parent = <&gic>;
 673                         interrupts = <0 49 4>;
 674                         reg = <0x0 0xff170000 0x1000>;
 675                         clock-names = "clk_xin", "clk_ahb";
 676                         broken-tuning;
 677                         power-domains = <&pd_sd1>;
 678                 };
 679
 680                 smmu: smmu@fd800000 {
 681                         compatible = "arm,mmu-500";
 682                         reg = <0x0 0xfd800000 0x20000>;
 683                         #global-interrupts = <1>;
 684                         interrupt-parent = <&gic>;
 685                         interrupts = <0 155 4>,
 686                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 687                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 688                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 689                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 690                         mmu-masters = < &gem0 0x874
 691                                         &gem1 0x875
 692                                         &gem2 0x876
 693                                         &gem3 0x877 >;
 694                 };
 695
 696                 spi0: spi@ff040000 {
 697                         compatible = "cdns,spi-r1p6";
 698                         status = "disabled";
 699                         interrupt-parent = <&gic>;
 700                         interrupts = <0 19 4>;
 701                         reg = <0x0 0xff040000 0x1000>;
 702                         clock-names = "ref_clk", "pclk";
 703                         #address-cells = <1>;
 704                         #size-cells = <0>;
 705                         power-domains = <&pd_spi0>;
 706                 };
 707
 708                 spi1: spi@ff050000 {
 709                         compatible = "cdns,spi-r1p6";
 710                         status = "disabled";
 711                         interrupt-parent = <&gic>;
 712                         interrupts = <0 20 4>;
 713                         reg = <0x0 0xff050000 0x1000>;
 714                         clock-names = "ref_clk", "pclk";
 715                         #address-cells = <1>;
 716                         #size-cells = <0>;
 717                         power-domains = <&pd_spi1>;
 718                 };
 719
 720                 ttc0: timer@ff110000 {
 721                         compatible = "cdns,ttc";
 722                         status = "disabled";
 723                         interrupt-parent = <&gic>;
 724                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 725                         reg = <0x0 0xff110000 0x1000>;
 726                         timer-width = <32>;
 727                         power-domains = <&pd_ttc0>;
 728                 };
 729
 730                 ttc1: timer@ff120000 {
 731                         compatible = "cdns,ttc";
 732                         status = "disabled";
 733                         interrupt-parent = <&gic>;
 734                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 735                         reg = <0x0 0xff120000 0x1000>;
 736                         timer-width = <32>;
 737                         power-domains = <&pd_ttc1>;
 738                 };
 739
 740                 ttc2: timer@ff130000 {
 741                         compatible = "cdns,ttc";
 742                         status = "disabled";
 743                         interrupt-parent = <&gic>;
 744                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 745                         reg = <0x0 0xff130000 0x1000>;
 746                         timer-width = <32>;
 747                         power-domains = <&pd_ttc2>;
 748                 };
 749
 750                 ttc3: timer@ff140000 {
 751                         compatible = "cdns,ttc";
 752                         status = "disabled";
 753                         interrupt-parent = <&gic>;
 754                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 755                         reg = <0x0 0xff140000 0x1000>;
 756                         timer-width = <32>;
 757                         power-domains = <&pd_ttc3>;
 758                 };
 759
 760                 uart0: serial@ff000000 {
 761                         u-boot,dm-pre-reloc;
 762                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 763                         status = "disabled";
 764                         interrupt-parent = <&gic>;
 765                         interrupts = <0 21 4>;
 766                         reg = <0x0 0xff000000 0x1000>;
 767                         clock-names = "uart_clk", "pclk";
 768                         power-domains = <&pd_uart0>;
 769                 };
 770
 771                 uart1: serial@ff010000 {
 772                         u-boot,dm-pre-reloc;
 773                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 774                         status = "disabled";
 775                         interrupt-parent = <&gic>;
 776                         interrupts = <0 22 4>;
 777                         reg = <0x0 0xff010000 0x1000>;
 778                         clock-names = "uart_clk", "pclk";
 779                         power-domains = <&pd_uart1>;
 780                 };
 781
 782                 usb0: usb0 {
 783                         #address-cells = <2>;
 784                         #size-cells = <1>;
 785                         status = "disabled";
 786                         compatible = "xlnx,zynqmp-dwc3";
 787                         clock-names = "bus_clk", "ref_clk";
 788                         clocks = <&clk125>, <&clk125>;
 789                         power-domains = <&pd_usb0>;
 790                         ranges;
 791
 792                         dwc3_0: dwc3@fe200000 {
 793                                 compatible = "snps,dwc3";
 794                                 status = "disabled";
 795                                 reg = <0x0 0xfe200000 0x40000>;
 796                                 interrupt-parent = <&gic>;
 797                                 interrupts = <0 65 4>;
 798                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 799                                 snps,refclk_fladj;
 800                         };
 801                 };
 802
 803                 usb1: usb1 {
 804                         #address-cells = <2>;
 805                         #size-cells = <1>;
 806                         status = "disabled";
 807                         compatible = "xlnx,zynqmp-dwc3";
 808                         clock-names = "bus_clk", "ref_clk";
 809                         clocks = <&clk125>, <&clk125>;
 810                         power-domains = <&pd_usb1>;
 811                         ranges;
 812
 813                         dwc3_1: dwc3@fe300000 {
 814                                 compatible = "snps,dwc3";
 815                                 status = "disabled";
 816                                 reg = <0x0 0xfe300000 0x40000>;
 817                                 interrupt-parent = <&gic>;
 818                                 interrupts = <0 70 4>;
 819                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 820                                 snps,refclk_fladj;
 821                         };
 822                 };
 823
 824                 watchdog0: watchdog@fd4d0000 {
 825                         compatible = "cdns,wdt-r1p2";
 826                         status = "disabled";
 827                         interrupt-parent = <&gic>;
 828                         interrupts = <0 113 1>;
 829                         reg = <0x0 0xfd4d0000 0x1000>;
 830                         timeout-sec = <10>;
 831                 };
 832
 833                 xilinx_drm: xilinx_drm {
 834                         compatible = "xlnx,drm";
 835                         status = "disabled";
 836                         xlnx,encoder-slave = <&xlnx_dp>;
 837                         xlnx,connector-type = "DisplayPort";
 838                         xlnx,dp-sub = <&xlnx_dp_sub>;
 839                         planes {
 840                                 xlnx,pixel-format = "rgb565";
 841                                 plane0 {
 842                                         dmas = <&xlnx_dpdma 3>;
 843                                         dma-names = "dma0";
 844                                 };
 845                                 plane1 {
 846                                         dmas = <&xlnx_dpdma 0>,
 847                                                <&xlnx_dpdma 1>,
 848                                                <&xlnx_dpdma 2>;
 849                                         dma-names = "dma0", "dma1", "dma2";
 850                                 };
 851                         };
 852                 };
 853
 854                 xlnx_dp: dp@fd4a0000 {
 855                         compatible = "xlnx,v-dp";
 856                         status = "disabled";
 857                         reg = <0x0 0xfd4a0000 0x1000>;
 858                         interrupts = <0 119 4>;
 859                         interrupt-parent = <&gic>;
 860                         clock-names = "aclk", "aud_clk";
 861                         xlnx,dp-version = "v1.2";
 862                         xlnx,max-lanes = <2>;
 863                         xlnx,max-link-rate = <540000>;
 864                         xlnx,max-bpc = <16>;
 865                         xlnx,enable-ycrcb;
 866                         xlnx,colormetry = "rgb";
 867                         xlnx,bpc = <8>;
 868                         xlnx,audio-chan = <2>;
 869                         xlnx,dp-sub = <&xlnx_dp_sub>;
 870                         xlnx,max-pclock-frequency = <300000>;
 871                 };
 872
 873                 xlnx_dp_snd_card: dp_snd_card {
 874                         compatible = "xlnx,dp-snd-card";
 875                         status = "disabled";
 876                         xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
 877                         xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
 878                 };
 879
 880                 xlnx_dp_snd_codec0: dp_snd_codec0 {
 881                         compatible = "xlnx,dp-snd-codec";
 882                         status = "disabled";
 883                         clock-names = "aud_clk";
 884                 };
 885
 886                 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
 887                         compatible = "xlnx,dp-snd-pcm";
 888                         status = "disabled";
 889                         dmas = <&xlnx_dpdma 4>;
 890                         dma-names = "tx";
 891                 };
 892
 893                 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
 894                         compatible = "xlnx,dp-snd-pcm";
 895                         status = "disabled";
 896                         dmas = <&xlnx_dpdma 5>;
 897                         dma-names = "tx";
 898                 };
 899
 900                 xlnx_dp_sub: dp_sub@fd4aa000 {
 901                         compatible = "xlnx,dp-sub";
 902                         status = "disabled";
 903                         reg = <0x0 0xfd4aa000 0x1000>,
 904                               <0x0 0xfd4ab000 0x1000>,
 905                               <0x0 0xfd4ac000 0x1000>;
 906                         reg-names = "blend", "av_buf", "aud";
 907                         xlnx,output-fmt = "rgb";
 908                         xlnx,vid-fmt = "yuyv";
 909                         xlnx,gfx-fmt = "rgb565";
 910                 };
 911
 912                 xlnx_dpdma: dma@fd4c0000 {
 913                         compatible = "xlnx,dpdma";
 914                         status = "disabled";
 915                         reg = <0x0 0xfd4c0000 0x1000>;
 916                         interrupts = <0 122 4>;
 917                         interrupt-parent = <&gic>;
 918                         clock-names = "axi_clk";
 919                         dma-channels = <6>;
 920                         #dma-cells = <1>;
 921                         dma-video0channel {
 922                                 compatible = "xlnx,video0";
 923                         };
 924                         dma-video1channel {
 925                                 compatible = "xlnx,video1";
 926                         };
 927                         dma-video2channel {
 928                                 compatible = "xlnx,video2";
 929                         };
 930                         dma-graphicschannel {
 931                                 compatible = "xlnx,graphics";
 932                         };
 933                         dma-audio0channel {
 934                                 compatible = "xlnx,audio0";
 935                         };
 936                         dma-audio1channel {
 937                                 compatible = "xlnx,audio1";
 938                         };
 939                 };
 940         };
 941 };