arch/arm/dts/zynqmp-zcu1275-revB.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * dts file for Xilinx ZynqMP ZCU1275 RevB
   4  *
   5  * (C) Copyright 2018 - 2021, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
   9  */
  10
  11 /dts-v1/;
  12
  13 #include "zynqmp.dtsi"
  14 #include "zynqmp-clk-ccf.dtsi"
  15
  16 / {
  17         model = "ZynqMP ZCU1275 RevB";
  18         compatible = "xlnx,zynqmp-zcu1275-revB", "xlnx,zynqmp-zcu1275",
  19                      "xlnx,zynqmp";
  20
  21         aliases {
  22                 serial0 = &uart0;
  23                 serial1 = &dcc;
  24                 spi0 = &qspi;
  25                 mmc0 = &sdhci1;
  26                 ethernet0 = &gem1;
  27         };
  28
  29         chosen {
  30                 bootargs = "earlycon";
  31                 stdout-path = "serial0:115200n8";
  32         };
  33
  34         memory@0 {
  35                 device_type = "memory";
  36                 reg = <0x0 0x0 0x0 0x80000000>;
  37         };
  38 };
  39
  40 &dcc {
  41         status = "okay";
  42 };
  43
  44 &gem1 {
  45         status = "okay";
  46         mdio {
  47                 #address-cells = <1>;
  48                 #size-cells = <0>;
  49                 phy1: ethernet-phy@1 {
  50                         reg = <1>; /* KSZ9031RNXIC on AES-FMC-NETW1-G */
  51                         rxc-skew-ps = <1800>; /* Skew control of RX_CLK pad output */
  52                         txc-skew-ps = <1800>; /* Skew control of GTX_CLK pad input */
  53                         txen-skew-ps = <900>; /* Skew control of TX_CTL pad input */
  54                         rxdv-skew-ps = <0>; /* Skew control of RX_CTL pad output */
  55                         rxd0-skew-ps = <0>; /* Skew control of RXD0 pad output */
  56                         rxd1-skew-ps = <0>; /* Skew control of RXD1 pad output */
  57                         rxd2-skew-ps = <0>; /* Skew control of RXD2 pad output */
  58                         rxd3-skew-ps = <0>; /* Skew control of RXD3 pad output */
  59                         txd0-skew-ps = <900>; /* Skew control of TXD0 pad input */
  60                         txd1-skew-ps = <900>; /* Skew control of TXD1 pad input */
  61                         txd2-skew-ps = <900>; /* Skew control of TXD2 pad input */
  62                         txd3-skew-ps = <900>; /* Skew control of TXD3 pad input */
  63                 };
  64         };
  65 };
  66
  67 &gpio {
  68         status = "okay";
  69 };
  70
  71 &qspi {
  72         status = "okay";
  73         flash@0 {
  74                 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
  75                 #address-cells = <1>;
  76                 #size-cells = <1>;
  77                 reg = <0x0>;
  78                 spi-tx-bus-width = <1>;
  79                 spi-rx-bus-width = <1>;
  80                 spi-max-frequency = <108000000>; /* Based on DC1 spec */
  81                 partition@0 { /* for testing purpose */
  82                         label = "qspi-fsbl-uboot";
  83                         reg = <0x0 0x100000>;
  84                 };
  85                 partition@100000 { /* for testing purpose */
  86                         label = "qspi-linux";
  87                         reg = <0x100000 0x500000>;
  88                 };
  89                 partition@600000 { /* for testing purpose */
  90                         label = "qspi-device-tree";
  91                         reg = <0x600000 0x20000>;
  92                 };
  93                 partition@620000 { /* for testing purpose */
  94                         label = "qspi-rootfs";
  95                         reg = <0x620000 0x5E0000>;
  96                 };
  97         };
  98 };
  99
 100 &uart0 {
 101         status = "okay";
 102 };
 103
 104 &sdhci1 {
 105         status = "okay";
 106         /*
 107          * 1.0 revision has level shifter and this property should be
 108          * removed for supporting UHS mode
 109          */
 110         no-1-8-v;
 111         xlnx,mio-bank = <1>;
 112 };