1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZC1254
5 * (C) Copyright 2015 - 2018, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
8 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
17 model = "ZynqMP ZC1254 RevA";
18 compatible = "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254", "xlnx,zynqmp";
27 bootargs = "earlycon";
28 stdout-path = "serial0:115200n8";
32 device_type = "memory";
33 reg = <0x0 0x0 0x0 0x80000000>;
44 compatible = "m25p80"; /* 32MB */
48 spi-tx-bus-width = <1>;
49 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
50 spi-max-frequency = <108000000>; /* Based on DC1 spec */
51 partition@qspi-fsbl-uboot { /* for testing purpose */
52 label = "qspi-fsbl-uboot";
55 partition@qspi-linux { /* for testing purpose */
57 reg = <0x100000 0x500000>;
59 partition@qspi-device-tree { /* for testing purpose */
60 label = "qspi-device-tree";
61 reg = <0x600000 0x20000>;
63 partition@qspi-rootfs { /* for testing purpose */
64 label = "qspi-rootfs";
65 reg = <0x620000 0x5E0000>;