arch/arm/dts/zynqmp-zc1232-revA.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * dts file for Xilinx ZynqMP ZC1232
   4  *
   5  * (C) Copyright 2017 - 2021, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "zynqmp.dtsi"
  13 #include "zynqmp-clk-ccf.dtsi"
  14
  15 / {
  16         model = "ZynqMP ZC1232 RevA";
  17         compatible = "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232", "xlnx,zynqmp";
  18
  19         aliases {
  20                 serial0 = &uart0;
  21                 serial1 = &dcc;
  22                 spi0 = &qspi;
  23         };
  24
  25         chosen {
  26                 bootargs = "earlycon";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         memory@0 {
  31                 device_type = "memory";
  32                 reg = <0x0 0x0 0x0 0x80000000>;
  33         };
  34 };
  35
  36 &dcc {
  37         status = "okay";
  38 };
  39
  40 &qspi {
  41         status = "okay";
  42         flash@0 {
  43                 compatible = "m25p80", "jedec,spi-nor"; /* 32MB FIXME */
  44                 #address-cells = <1>;
  45                 #size-cells = <1>;
  46                 reg = <0x0>;
  47                 spi-tx-bus-width = <1>;
  48                 spi-rx-bus-width = <4>;
  49                 spi-max-frequency = <108000000>; /* Based on DC1 spec */
  50                 partition@0 { /* for testing purpose */
  51                         label = "qspi-fsbl-uboot";
  52                         reg = <0x0 0x100000>;
  53                 };
  54                 partition@100000 { /* for testing purpose */
  55                         label = "qspi-linux";
  56                         reg = <0x100000 0x500000>;
  57                 };
  58                 partition@600000 { /* for testing purpose */
  59                         label = "qspi-device-tree";
  60                         reg = <0x600000 0x20000>;
  61                 };
  62                 partition@620000 { /* for testing purpose */
  63                         label = "qspi-rootfs";
  64                         reg = <0x620000 0x5E0000>;
  65                 };
  66         };
  67 };
  68
  69 &sata {
  70         status = "okay";
  71         /* SATA OOB timing settings */
  72         ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
  73         ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
  74         ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
  75         ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
  76         ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
  77         ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
  78         ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
  79         ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
  80 };
  81
  82 &uart0 {
  83         status = "okay";
  84 };