arch/arm/dts/zynqmp-g-a2197-00-revA.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * dts file for Xilinx Versal a2197 RevA System Controller on MGT
   4  *
   5  * (C) Copyright 2019, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  */
   9 /dts-v1/;
  10
  11 #include "zynqmp.dtsi"
  12 #include "zynqmp-clk-ccf.dtsi"
  13 #include <dt-bindings/gpio/gpio.h>
  14
  15 / {
  16         model = "Versal System Controller on a2197 MGT Char board RevA";
  17         compatible = "xlnx,zynqmp-g-a2197-00-revA", "xlnx,zynqmp-a2197-revA",
  18                      "xlnx,zynqmp-a2197", "xlnx,zynqmp";
  19
  20         aliases {
  21                 ethernet0 = &gem0;
  22                 gpio0 = &gpio;
  23                 i2c0 = &i2c0;
  24                 mmc0 = &sdhci0;
  25                 rtc0 = &rtc;
  26                 serial0 = &uart0;
  27                 serial1 = &dcc;
  28                 usb0 = &usb0;
  29         };
  30
  31         chosen {
  32                 bootargs = "earlycon";
  33                 stdout-path = "serial0:115200n8";
  34                 xlnx,eeprom = <&eeprom>;
  35         };
  36
  37         memory@0 {
  38                 device_type = "memory";
  39                 reg = <0x0 0x0 0x0 0x80000000>;
  40         };
  41
  42         ina226-u74 {
  43                 compatible = "iio-hwmon";
  44                 io-channels = <&u74 0>, <&u74 1>, <&u74 2>, <&u74 3>;
  45         };
  46         ina226-u75 {
  47                 compatible = "iio-hwmon";
  48                 io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
  49         };
  50         ina226-u78 {
  51                 compatible = "iio-hwmon";
  52                 io-channels = <&u78 0>, <&u78 1>, <&u78 2>, <&u78 3>;
  53         };
  54         ina226-u79 {
  55                 compatible = "iio-hwmon";
  56                 io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
  57         };
  58         ina226-u82 {
  59                 compatible = "iio-hwmon";
  60                 io-channels = <&u82 0>, <&u82 1>, <&u82 2>, <&u82 3>;
  61         };
  62         ina226-u84 {
  63                 compatible = "iio-hwmon";
  64                 io-channels = <&u84 0>, <&u84 1>, <&u84 2>, <&u84 3>;
  65         };
  66 };
  67
  68 &sdhci0 { /* emmc MIO 13-23 16GB */
  69         status = "okay";
  70         non-removable;
  71         disable-wp;
  72         bus-width = <8>;
  73         xlnx,mio-bank = <0>;
  74 };
  75
  76 &uart0 { /* uart0 MIO38-39 */
  77         status = "okay";
  78         u-boot,dm-pre-reloc;
  79 };
  80
  81 &gem0 { /* eth MDIO 76/77 */
  82         status = "okay";
  83         phy-handle = <&phy0>;
  84         phy-mode = "sgmii";
  85         is-internal-pcspma;
  86         phy0: ethernet-phy@0 { /* marwell m88e1512 */
  87                 reg = <0>;
  88                 reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
  89 /*              xlnx,phy-type = <PHY_TYPE_SGMII>; */
  90         };
  91 /*      phy-names = "...";
  92         phys = <&lane0 PHY_TYPE_SGMII ... >
  93         Note: lane0 sgmii/lane1 usb3 */
  94 };
  95
  96 &gpio {
  97         status = "okay";
  98         gpio-line-names = "", "", "", "", "", /* 0 - 4 */
  99                   "", "", "", "", "", /* 5 - 9 */
 100                   "", "", "", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */
 101                   "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */
 102                   "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */
 103                   "", "", "", "", "", /* 25 - 29 */
 104                   "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */
 105                   "LP_I2C0_PMC_SDA", "", "", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */
 106                   "", "", "ETH_RESET_B", "", "", /* 40 - 44 */
 107                   "", "", "", "", "", /* 45 - 49 */
 108                   "", "", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */
 109                   "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */
 110                   "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "", /* 60 - 64 */
 111                   "", "", "", "", "", /* 65 - 69 */
 112                   "", "", "", "", "", /* 70 - 74 */
 113                   "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */
 114                   "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */
 115                   "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */
 116                   "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */
 117                   "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */
 118                   "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */
 119                   "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */
 120                   "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */
 121                   "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */
 122                   "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */
 123                   "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */
 124                   "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */
 125                   "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */
 126                   "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */
 127                   "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */
 128                   "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */
 129                   "", "", "", "", "", /* 150 - 154 */
 130                   "", "", "", "", "", /* 155 - 159 */
 131                   "", "", "", "", "", /* 160 - 164 */
 132                   "", "", "", "", "", /* 165 - 169 */
 133                   "", "", "", ""; /* 170 - 174 */
 134 };
 135
 136 &i2c0 { /* MIO 34-35 - can't stay here */
 137         status = "okay";
 138         clock-frequency = <400000>;
 139         scl-gpios = <&gpio 34 GPIO_ACTIVE_HIGH>;
 140         sda-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
 141         i2c-mux@74 { /* u94 */
 142                 compatible = "nxp,pca9548";
 143                 #address-cells = <1>;
 144                 #size-cells = <0>;
 145                 reg = <0x74>;
 146                 /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */
 147                 i2c@0 {
 148                         #address-cells = <1>;
 149                         #size-cells = <0>;
 150                         reg = <0>;
 151                         /* Use for storing information about SC board */
 152                         eeprom: eeprom@50 { /* u96 - 24LC32A - 256B */
 153                                 compatible = "atmel,24c32";
 154                                 reg = <0x50>;
 155                         };
 156                 };
 157                 i2c@1 { /* CM_I2C_SCL - Samtec */
 158                         #address-cells = <1>;
 159                         #size-cells = <0>;
 160                         reg = <1>;
 161                 };
 162                 i2c@2 { /* PMBUS - AFX_PMBUS */
 163                         #address-cells = <1>;
 164                         #size-cells = <0>;
 165                         reg = <2>;
 166                         tps544@d { /* u85 */
 167                                 compatible = "ti,tps544b25";
 168                                 reg = <0xd>;
 169                         };
 170                         tps544@10 { /* u73 */
 171                                 compatible = "ti,tps544b25";
 172                                 reg = <0x10>;
 173                         };
 174                         tps544@11 { /* u76 */
 175                                 compatible = "ti,tps544b25";
 176                                 reg = <0x11>;
 177                         };
 178                         tps544@12 { /* u77 */
 179                                 compatible = "ti,tps544b25";
 180                                 reg = <0x12>;
 181                         };
 182                         tps544@13 { /* u80 */
 183                                 compatible = "ti,tps544b25";
 184                                 reg = <0x13>;
 185                         };
 186                         tps544@14 { /* u81 */
 187                                 compatible = "ti,tps544b25";
 188                                 reg = <0x14>;
 189                         };
 190                         tps544@15 { /* u83 */
 191                                 compatible = "ti,tps544b25";
 192                                 reg = <0x15>;
 193                         };
 194                         tps544@16 { /* u63 */
 195                                 compatible = "ti,tps544b25";
 196                                 reg = <0x16>;
 197                         };
 198                         tps544@17 { /* u66 */
 199                                 compatible = "ti,tps544b25";
 200                                 reg = <0x17>;
 201                         };
 202                         tps544@18 { /* u67 */
 203                                 compatible = "ti,tps544b25";
 204                                 reg = <0x18>;
 205                         };
 206                         tps544@19 { /* u69 */
 207                                 compatible = "ti,tps544b25";
 208                                 reg = <0x19>;
 209                         };
 210                         tps544@1d { /* u88 */
 211                                 compatible = "ti,tps544b25";
 212                                 reg = <0x1d>;
 213                         };
 214                         tps544@1e { /* u89 */
 215                                 compatible = "ti,tps544b25";
 216                                 reg = <0x1e>;
 217                         };
 218                         tps544@1f { /* u87 */
 219                                 compatible = "ti,tps544b25";
 220                                 reg = <0x1f>;
 221                         };
 222                         tps544@20 { /* u71 */
 223                                 compatible = "ti,tps544b25";
 224                                 reg = <0x20>;
 225                         };
 226                         u74: ina226@40 { /* u74 */
 227                                 compatible = "ti,ina226";
 228                                 #io-channel-cells = <1>;
 229                                 label = "ina226-u74";
 230                                 reg = <0x40>;
 231                                 shunt-resistor = <1000>;
 232                         };
 233                         u75: ina226@41 { /* u75 */
 234                                 compatible = "ti,ina226";
 235                                 #io-channel-cells = <1>;
 236                                 label = "ina226-u75";
 237                                 reg = <0x41>;
 238                                 shunt-resistor = <1000>;
 239                         };
 240                         u78: ina226@42 { /* u78 */
 241                                 compatible = "ti,ina226";
 242                                 #io-channel-cells = <1>;
 243                                 label = "ina226-u78";
 244                                 reg = <0x42>;
 245                                 shunt-resistor = <5000>;
 246                         };
 247                         u79: ina226@43 { /* u79 */
 248                                 compatible = "ti,ina226";
 249                                 #io-channel-cells = <1>;
 250                                 label = "ina226-u79";
 251                                 reg = <0x43>;
 252                                 shunt-resistor = <1000>;
 253                         };
 254                         u82: ina226@44 { /* u82 */
 255                                 compatible = "ti,ina226";
 256                                 #io-channel-cells = <1>;
 257                                 label = "ina226-u82";
 258                                 reg = <0x44>;
 259                                 shunt-resistor = <1000>;
 260                         };
 261                         u84: ina226@45 { /* u84 */
 262                                 compatible = "ti,ina226";
 263                                 #io-channel-cells = <1>;
 264                                 label = "ina226-u84";
 265                                 reg = <0x45>;
 266                                 shunt-resistor = <5000>;
 267                         };
 268                         tps53681@c0 { /* u53 - FIXME name - don't know what it does - also vcc_io_soc */
 269                                 compatible = "ti,tps53681", "ti,tps53679";
 270                                 reg = <0xc0>;
 271                         };
 272                 };
 273                 i2c@3 { /* fmc1 via JA2G */
 274                         #address-cells = <1>;
 275                         #size-cells = <0>;
 276                         reg = <3>;
 277                         eeprom_fmc1: eeprom@50 { /* on FMC */
 278                                 compatible = "atmel,24c04";
 279                                 reg = <0x50>;
 280                         };
 281                 };
 282                 i2c@4 { /* fmc2 via JA3G */
 283                         #address-cells = <1>;
 284                         #size-cells = <0>;
 285                         reg = <4>;
 286                         eeprom_fmc2: eeprom@50 { /* on FMC */
 287                                 compatible = "atmel,24c04";
 288                                 reg = <0x50>;
 289                         };
 290                 };
 291                 i2c@5 { /* fmc3 via JA4G */
 292                         #address-cells = <1>;
 293                         #size-cells = <0>;
 294                         reg = <5>;
 295                         eeprom_fmc3: eeprom@50 { /* on FMC */
 296                                 compatible = "atmel,24c04";
 297                                 reg = <0x50>;
 298                         };
 299                 };
 300                 i2c@6 { /* ddr dimm */
 301                         #address-cells = <1>;
 302                         #size-cells = <0>;
 303                         reg = <7>;
 304                 };
 305                 /* 7 unused */
 306         };
 307 };
 308
 309 &usb0 { /* USB0 MIO52-63 */
 310         status = "okay";
 311         xlnx,usb-polarity = <0>;
 312         xlnx,usb-reset-mode = <0>;
 313 };
 314
 315 &dwc3_0 {
 316         status = "okay";
 317         dr_mode = "peripheral";
 318         maximum-speed = "high-speed";
 319 };