Merge branch 'master' of git://git.denx.de/u-boot-atmel
[platform/kernel/u-boot.git] / arch / arm / dts / zynqmp-ep108.dts
1 /*
2  * dts file for Xilinx ZynqMP ep108 development board
3  *
4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
5  *
6  * Michal Simek <michal.simek@xilinx.com>
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 /dts-v1/;
12
13 /include/ "zynqmp.dtsi"
14 /include/ "zynqmp-ep108-clk.dtsi"
15
16 / {
17         model = "ZynqMP EP108";
18
19         aliases {
20                 serial0 = &uart0;
21                 spi0 = &qspi;
22                 spi1 = &spi0;
23                 spi2 = &spi1;
24         };
25
26         chosen {
27                 stdout-path = "serial0:115200n8";
28         };
29
30         memory {
31                 device_type = "memory";
32                 reg = <0x0 0x0 0x40000000>;
33         };
34 };
35
36 &can0 {
37         status = "okay";
38 };
39
40 &gem0 {
41         status = "okay";
42         phy-handle = <&phy0>;
43         phy-mode = "rgmii-id";
44         phy0: phy@0 {
45                 reg = <0>;
46                 max-speed = <100>;
47         };
48 };
49
50 &gpio {
51         status = "okay";
52 };
53
54 &i2c0 {
55         status = "okay";
56         clock-frequency = <400000>;
57         eeprom@54 {
58                 compatible = "at,24c64";
59                 reg = <0x54>;
60         };
61 };
62
63 &i2c1 {
64         status = "okay";
65         clock-frequency = <400000>;
66         eeprom@55 {
67                 compatible = "at,24c64";
68                 reg = <0x55>;
69         };
70 };
71
72 &qspi {
73         status = "okay";
74         flash@0 {
75                 compatible = "n25q512a11";
76                 #address-cells = <1>;
77                 #size-cells = <1>;
78                 reg = <0x0>;
79                 spi-tx-bus-width = <1>;
80                 spi-rx-bus-width = <4>;
81                 spi-max-frequency = <10000000>;
82                 partition@qspi-fsbl-uboot { /* for testing purpose */
83                         label = "qspi-fsbl-uboot";
84                         reg = <0x0 0x100000>;
85                 };
86                 partition@qspi-linux { /* for testing purpose */
87                         label = "qspi-linux";
88                         reg = <0x100000 0x500000>;
89                 };
90                 partition@qspi-device-tree { /* for testing purpose */
91                         label = "qspi-device-tree";
92                         reg = <0x600000 0x20000>;
93                 };
94                 partition@qspi-rootfs { /* for testing purpose */
95                         label = "qspi-rootfs";
96                         reg = <0x620000 0x5E0000>;
97                 };
98         };
99 };
100
101 &sata {
102         status = "okay";
103         ceva,broken-gen2;
104 };
105
106 &sdhci0 {
107         status = "okay";
108 };
109
110 &sdhci1 {
111         status = "okay";
112 };
113
114 &spi0 {
115         status = "okay";
116         num-cs = <1>;
117         spi0_flash0: spi0_flash0@0 {
118                 compatible = "m25p80";
119                 #address-cells = <1>;
120                 #size-cells = <1>;
121                 spi-max-frequency = <50000000>;
122                 reg = <0>;
123
124                 spi0_flash0@00000000 {
125                         label = "spi0_flash0";
126                         reg = <0x0 0x100000>;
127                 };
128         };
129 };
130
131 &spi1 {
132         status = "okay";
133         num-cs = <1>;
134         spi1_flash0: spi1_flash0@0 {
135                 compatible = "m25p80";
136                 #address-cells = <1>;
137                 #size-cells = <1>;
138                 spi-max-frequency = <50000000>;
139                 reg = <0>;
140
141                 spi1_flash0@00000000 {
142                         label = "spi1_flash0";
143                         reg = <0x0 0x100000>;
144                 };
145         };
146 };
147
148 &uart0 {
149         status = "okay";
150 };
151
152 &usb0 {
153         status = "okay";
154         dr_mode = "peripheral";
155         maximum-speed = "high-speed";
156 };
157
158 &usb1 {
159         status = "okay";
160         dr_mode = "host";
161         maximum-speed = "high-speed";
162 };
163
164 &watchdog0 {
165         status = "okay";
166 };
167
168 &xlnx_dp {
169         xlnx,max-pclock-frequency = <200000>;
170 };
171
172 &xlnx_dpdma {
173         xlnx,axi-clock-freq = <200000000>;
174 };