arch/arm/dts/zynqmp-a2197-m-revA.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * dts file for Xilinx Versal a2197 RevA System Controller
   4  *
   5  * (C) Copyright 2019, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  */
   9 /dts-v1/;
  10
  11 #include "zynqmp.dtsi"
  12 #include "zynqmp-clk-ccf.dtsi"
  13 #include <dt-bindings/gpio/gpio.h>
  14
  15 / {
  16         model = "Versal System Controller on a2197 Memory Char board RevA";
  17         compatible = "xlnx,zynqmp-a2197-m-revA", "xlnx,zynqmp-a2197-revA",
  18                      "xlnx,zynqmp-a2197", "xlnx,zynqmp";
  19
  20         aliases {
  21                 ethernet0 = &gem0;
  22                 gpio0 = &gpio;
  23                 i2c0 = &i2c0;
  24                 i2c1 = &i2c1;
  25                 mmc0 = &sdhci0;
  26                 mmc1 = &sdhci1;
  27                 rtc0 = &rtc;
  28                 serial0 = &uart0;
  29                 serial1 = &uart1;
  30                 serial2 = &dcc;
  31                 usb0 = &usb0;
  32                 usb1 = &usb1;
  33                 spi0 = &qspi;
  34         };
  35
  36         chosen {
  37                 bootargs = "earlycon";
  38                 stdout-path = "serial0:115200n8";
  39                 xlnx,eeprom = <&eeprom>;
  40         };
  41
  42         memory@0 {
  43                 device_type = "memory";
  44                 reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */
  45         };
  46 };
  47
  48 &qspi {
  49         status = "okay";
  50         is-dual = <1>;
  51         flash@0 {
  52                 compatible = "m25p80", "spi-flash"; /* 32MB */
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 reg = <0x0>;
  56                 spi-tx-bus-width = <1>;
  57                 spi-rx-bus-width = <4>;
  58                 spi-max-frequency = <108000000>;
  59         };
  60 };
  61
  62 &sdhci0 { /* emmc MIO 13-23 - with some settings  16GB */
  63         status = "okay";
  64         non-removable;
  65         disable-wp;
  66         bus-width = <8>;
  67         xlnx,mio_bank = <0>; /* FIXME tap delay */
  68 };
  69
  70 &uart0 { /* uart0 MIO38-39 */
  71         status = "okay";
  72         u-boot,dm-pre-reloc;
  73 };
  74
  75 &uart1 { /* uart1 MIO40-41 */
  76         status = "okay";
  77         u-boot,dm-pre-reloc;
  78 };
  79
  80 &sdhci1 { /* sd1 MIO45-51 cd in place */
  81         status = "disable";
  82         no-1-8-v;
  83         disable-wp;
  84         xlnx,mio_bank = <1>;
  85 };
  86
  87 &gem0 {
  88         status = "okay";
  89         phy-handle = <&phy0>;
  90         phy-mode = "sgmii"; /* DTG generates this properly  1512 */
  91         phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>;
  92         phy0: phy@0 { /* marwell m88e1512 - SGMII */
  93                 reg = <0>;
  94 /*              xlnx,phy-type = <PHY_TYPE_SGMII>; */
  95         };
  96 /*      phy-names = "...";
  97         phys = <&lane0 PHY_TYPE_SGMII ... >
  98         Note: lane0 sgmii/lane1 usb3 */
  99 };
 100
 101 &gpio {
 102         status = "okay";
 103         gpio-line-names = "SCLK_OUT", "MISO_MO1", "MO2", "MO3", "MOSI_MIO0", /* 0 - 4 */
 104                   "N_SS_OUT", "", "SYS_CTRL0", "SYS_CTRL1", "SYS_CTRL2", /* 5 - 9 */
 105                   "SYS_CTRL3", "SYS_CTRL4", "SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */
 106                   "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */
 107                   "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */
 108                   "", "RXD0_IN", "TXD0_OUT", "TXD1_OUT", "RXD1_IN", /* 25 - 29 */
 109                   "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */
 110                   "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */
 111                   "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */
 112                   "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */
 113                   "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */
 114                   "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */
 115                   "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */
 116                   "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */
 117                   "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */
 118                   "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */
 119                   "", "", "", "", "", /* 78 - 79 */
 120                   "", "", "", "", "", /* 80 - 84 */
 121                   "", "", "", "", "", /* 85 -89 */
 122                   "", "", "", "", "", /* 90 - 94 */
 123                   "", "", "", "", "", /* 95 - 99 */
 124                   "", "", "", "", "", /* 100 - 104 */
 125                   "", "", "", "", "", /* 105 - 109 */
 126                   "", "", "", "", "", /* 110 - 114 */
 127                   "", "", "", "", "", /* 115 - 119 */
 128                   "", "", "", "", "", /* 120 - 124 */
 129                   "", "", "", "", "", /* 125 - 129 */
 130                   "", "", "", "", "", /* 130 - 134 */
 131                   "", "", "", "", "", /* 135 - 139 */
 132                   "", "", "", "", "", /* 140 - 144 */
 133                   "", "", "", "", "", /* 145 - 149 */
 134                   "", "", "", "", "", /* 150 - 154 */
 135                   "", "", "", "", "", /* 155 - 159 */
 136                   "", "", "", "", "", /* 160 - 164 */
 137                   "", "", "", "", "", /* 165 - 169 */
 138                   "", "", "", ""; /* 170 - 174 */
 139 };
 140
 141 &i2c0 { /* MIO 34-35 - can't stay here */
 142         status = "okay";
 143         clock-frequency = <400000>;
 144         i2c-mux@74 { /* u46 */
 145                 compatible = "nxp,pca9548";
 146                 #address-cells = <1>;
 147                 #size-cells = <0>;
 148                 reg = <0x74>;
 149                 /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */
 150                 i2c@0 { /* PMBUS  must be enabled via SW21 */
 151                         #address-cells = <1>;
 152                         #size-cells = <0>;
 153                         reg = <0>;
 154                         reg_vcc1v2_lp4: tps544@15 { /* u97 */
 155                                 compatible = "ti,tps544b25";
 156                                 reg = <0x15>;
 157                         };
 158                         reg_vcc1v1_lp4: tps544@16 { /* u95 */
 159                                 compatible = "ti,tps544b25";
 160                                 reg = <0x16>;
 161                         };
 162                         reg_vdd1_1v8_lp4: tps544@17 { /* u99 */
 163                                 compatible = "ti,tps544b25";
 164                                 reg = <0x17>;
 165                         };
 166                         /* UTIL_PMBUS connection */
 167                         reg_vcc1v8: tps544@13 { /* u92 */
 168                                 compatible = "ti,tps544b25";
 169                                 reg = <0x13>;
 170                         };
 171                         reg_vcc3v3: tps544@14 { /* u93 */
 172                                 compatible = "ti,tps544b25";
 173                                 reg = <0x14>;
 174                         };
 175                         reg_vcc5v0: tps544@1e { /* u94 */
 176                                 compatible = "ti,tps544b25";
 177                                 reg = <0x1e>;
 178                         };
 179                 };
 180                 i2c@1 { /* PMBUS_INA226 */
 181                         #address-cells = <1>;
 182                         #size-cells = <0>;
 183                         reg = <1>;
 184                         vcc_aux: ina226@42 { /* u86 */
 185                                 compatible = "ti,ina226";
 186                                 reg = <0x42>;
 187                                 shunt-resistor = <5000>;
 188                         };
 189                         vcc_ram: ina226@43 { /* u81 */
 190                                 compatible = "ti,ina226";
 191                                 reg = <0x43>;
 192                                 shunt-resistor = <5000>;
 193                         };
 194                         vcc1v1_lp4: ina226@46 { /* u96 */
 195                                 compatible = "ti,ina226";
 196                                 reg = <0x46>;
 197                                 shunt-resistor = <5000>;
 198                         };
 199                         vcc1v2_lp4: ina226@47 { /* u98 */
 200                                 compatible = "ti,ina226";
 201                                 reg = <0x47>;
 202                                 shunt-resistor = <5000>;
 203                         };
 204                         vdd1_1v8_lp4: ina226@48 { /* u100 */
 205                                 compatible = "ti,ina226";
 206                                 reg = <0x48>;
 207                                 shunt-resistor = <5000>;
 208                         };
 209                         vcc0v6_lp4: ina226@49 { /* u101 */
 210                                 compatible = "ti,ina226";
 211                                 reg = <0x49>;
 212                                 shunt-resistor = <5000>;
 213                         };
 214                 };
 215                 i2c@2 { /* PMBUS1 */
 216                         #address-cells = <1>;
 217                         #size-cells = <0>;
 218                         reg = <2>;
 219                         reg_vccint: tps53681@c0 { /* u69 */
 220                                 compatible = "ti,tps53681"; /* FIXME no linux driver */
 221                                 reg = <0xc0>;
 222                         };
 223                         reg_vcc_pmc: tps544@7 { /* u80 */
 224                                 compatible = "ti,tps544b25";
 225                                 reg = <0x7>;
 226                         };
 227                         reg_vcc_ram: tps544@8 { /* u82 */
 228                                 compatible = "ti,tps544b25";
 229                                 reg = <0x8>;
 230                         };
 231                         reg_vcc_pslp: tps544@9 { /* u83 */
 232                                 compatible = "ti,tps544b25";
 233                                 reg = <0x9>;
 234                         };
 235                         reg_vcc_psfp: tps544@a { /* u84 */
 236                                 compatible = "ti,tps544b25";
 237                                 reg = <0xa>;
 238                         };
 239                         reg_vccaux: tps544@d { /* u85 */
 240                                 compatible = "ti,tps544b25";
 241                                 reg = <0xd>;
 242                         };
 243                         reg_vccaux_pmc: tps544@e { /* u87 */
 244                                 compatible = "ti,tps544b25";
 245                                 reg = <0xe>;
 246                         };
 247                         reg_vcco_500: tps544@f { /* u88 */
 248                                 compatible = "ti,tps544b25";
 249                                 reg = <0xf>;
 250                         };
 251                         reg_vcco_501: tps544@10 { /* u89 */
 252                                 compatible = "ti,tps544b25";
 253                                 reg = <0x10>;
 254                         };
 255                         reg_vcco_502: tps544@11 { /* u90 */
 256                                 compatible = "ti,tps544b25";
 257                                 reg = <0x11>;
 258                         };
 259                         reg_vcco_503: tps544@12 { /* u91 */
 260                                 compatible = "ti,tps544b25";
 261                                 reg = <0x12>;
 262                         };
 263                 };
 264                 i2c@3 { /* MEM PMBUS - FIXME bug in schematics */
 265                         #address-cells = <1>;
 266                         #size-cells = <0>;
 267                         /* reg = <3>; */
 268                 };
 269                 i2c@4 { /* LP_I2C_SM */
 270                         #address-cells = <1>;
 271                         #size-cells = <0>;
 272                         reg = <4>;
 273                         /* connected to U20G */
 274                 };
 275                 /* 5-7 unused */
 276         };
 277 };
 278
 279 /* TODO sysctrl via J239 */
 280 /* TODO samtec J212G/H via J242 */
 281 /* TODO teensy via U30 PCA9543A bus 1 */
 282 &i2c1 { /* i2c1 MIO 36-37 */
 283         status = "okay";
 284         clock-frequency = <400000>;
 285
 286         /* Must be enabled via J242 */
 287         eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */
 288                 compatible = "atmel,24c02";
 289                 reg = <0x51>;
 290         };
 291
 292         i2c-mux@74 { /* u35 */
 293                 compatible = "nxp,pca9548";
 294                 #address-cells = <1>;
 295                 #size-cells = <0>;
 296                 reg = <0x74>;
 297                 /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */
 298                 dc_i2c: i2c@0 { /* DC_I2C */
 299                         #address-cells = <1>;
 300                         #size-cells = <0>;
 301                         reg = <0>;
 302                         /* Use for storing information about SC board */
 303                         eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */
 304                                 compatible = "atmel,24c08";
 305                                 reg = <0x54>;
 306                         };
 307                         si570_ref_clk: clock-generator@5d { /* u26 */
 308                                 #clock-cells = <0>;
 309                                 compatible = "silabs,si570";
 310                                 reg = <0x5d>; /* FIXME addr */
 311                                 temperature-stability = <50>;
 312                                 factory-fout = <156250000>; /* FIXME every chip can be different */
 313                                 clock-frequency = <33333333>;
 314                                 clock-output-names = "REF_CLK"; /* FIXME */
 315                         };
 316                         /* Connection via Samtec U20D */
 317                         /* Use for storing information about X-PRC card */
 318                         x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */
 319                                 compatible = "atmel,24c02";
 320                                 reg = <0x52>;
 321                         };
 322
 323                         /* Use for setting up certain features on X-PRC card */
 324                         x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */
 325                                 compatible = "nxp,pca9534";
 326                                 reg = <0x22>;
 327                                 gpio-controller; /* IRQ not connected */
 328                                 #gpio-cells = <2>;
 329                                 gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4",
 330                                                   "", "", "", "";
 331                                 gtr_sel0 {
 332                                         gpio-hog;
 333                                         gpios = <0 0>;
 334                                         input; /* FIXME add meaning */
 335                                         line-name = "sw4_1";
 336                                 };
 337                                 gtr_sel1 {
 338                                         gpio-hog;
 339                                         gpios = <1 0>;
 340                                         input; /* FIXME add meaning */
 341                                         line-name = "sw4_2";
 342                                 };
 343                                 gtr_sel2 {
 344                                         gpio-hog;
 345                                         gpios = <2 0>;
 346                                         input; /* FIXME add meaning */
 347                                         line-name = "sw4_3";
 348                                 };
 349                                 gtr_sel3 {
 350                                         gpio-hog;
 351                                         gpios = <3 0>;
 352                                         input; /* FIXME add meaning */
 353                                         line-name = "sw4_4";
 354                                 };
 355                         };
 356                 };
 357                 i2c@1 { /* UTIL_PMBUS - FIXME incorrect schematics */
 358                         #address-cells = <1>;
 359                         #size-cells = <0>;
 360                         /* reg = <1>; */
 361                 };
 362                 i2c@2 { /* C0_LP4 */
 363                         #address-cells = <1>;
 364                         #size-cells = <0>;
 365                         reg = <2>;
 366                         si570_c0_lp4: clock-generator@5d { /* u10 */
 367                                 #clock-cells = <0>;
 368                                 compatible = "silabs,si570";
 369                                 reg = <0x5d>; /* FIXME addr */
 370                                 temperature-stability = <50>;
 371                                 factory-fout = <30000000>;
 372                                 clock-frequency = <30000000>;
 373                                 clock-output-names = "C0_LP4_SI570_CLK";
 374                         };
 375                 };
 376                 i2c@3 { /* C1_LP4 */
 377                         #address-cells = <1>;
 378                         #size-cells = <0>;
 379                         reg = <3>;
 380                         si570_c1_lp4: clock-generator@5d { /* u10 */
 381                                 #clock-cells = <0>;
 382                                 compatible = "silabs,si570";
 383                                 reg = <0x5d>; /* FIXME addr */
 384                                 temperature-stability = <50>;
 385                                 factory-fout = <30000000>;
 386                                 clock-frequency = <30000000>;
 387                                 clock-output-names = "C1_LP4_SI570_CLK";
 388                         };
 389                 };
 390                 i2c@4 { /* C2_LP4 */
 391                         #address-cells = <1>;
 392                         #size-cells = <0>;
 393                         reg = <4>;
 394                         si570_c2_lp4: clock-generator@5d { /* u10 */
 395                                 #clock-cells = <0>;
 396                                 compatible = "silabs,si570";
 397                                 reg = <0x5d>; /* FIXME addr */
 398                                 temperature-stability = <50>;
 399                                 factory-fout = <30000000>;
 400                                 clock-frequency = <30000000>;
 401                                 clock-output-names = "C2_LP4_SI570_CLK";
 402                         };
 403                 };
 404                 i2c@5 { /* C3_LP4 */
 405                         #address-cells = <1>;
 406                         #size-cells = <0>;
 407                         reg = <5>;
 408                         si570_c3_lp4: clock-generator@5d { /* u15 */
 409                                 #clock-cells = <0>;
 410                                 compatible = "silabs,si570";
 411                                 reg = <0x5d>; /* FIXME addr */
 412                                 temperature-stability = <50>;
 413                                 factory-fout = <30000000>;
 414                                 clock-frequency = <30000000>;
 415                                 clock-output-names = "C3_LP4_SI570_CLK";
 416                         };
 417                 };
 418                 i2c@6 { /* HSDP_SI570 */
 419                         #address-cells = <1>;
 420                         #size-cells = <0>;
 421                         reg = <6>;
 422                         si570_hsdp: clock-generator@5d { /* u19 */
 423                                 #clock-cells = <0>;
 424                                 compatible = "silabs,si570";
 425                                 reg = <0x5d>; /* FIXME addr */
 426                                 temperature-stability = <50>;
 427                                 factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */
 428                                 clock-frequency = <33333333>;
 429                                 clock-output-names = "HSDP_SI570";
 430                         };
 431                 };
 432         };
 433 };
 434
 435 &usb0 {
 436         status = "okay";
 437         xlnx,usb-polarity = <0>;
 438         xlnx,usb-reset-mode = <0>;
 439 };
 440
 441 &dwc3_0 {
 442         status = "okay";
 443         dr_mode = "host";
 444         /* dr_mode = "peripheral"; */
 445         maximum-speed = "high-speed";
 446 };
 447
 448 &usb1 {
 449         status = "disabled"; /* not at mem board */
 450         xlnx,usb-polarity = <0>;
 451         xlnx,usb-reset-mode = <0>;
 452 };
 453
 454 &dwc3_1 {
 455         /delete-property/ phy-names ;
 456         /delete-property/ phys ;
 457         maximum-speed = "high-speed";
 458         snps,dis_u2_susphy_quirk ;
 459         snps,dis_u3_susphy_quirk ;
 460         status = "disabled";
 461 };