arch/arm/dts/zynq-zc702.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Copyright (C) 2011 - 2015 Xilinx
   4  *  Copyright (C) 2012 National Instruments Corp.
   5  */
   6 /dts-v1/;
   7 #include "zynq-7000.dtsi"
   8
   9 / {
  10         model = "Xilinx ZC702 board";
  11         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
  12
  13         aliases {
  14                 ethernet0 = &gem0;
  15                 i2c0 = &i2c0;
  16                 serial0 = &uart1;
  17                 spi0 = &qspi;
  18                 mmc0 = &sdhci0;
  19                 usb0 = &usb0;
  20         };
  21
  22         memory@0 {
  23                 device_type = "memory";
  24                 reg = <0x0 0x40000000>;
  25         };
  26
  27         chosen {
  28                 bootargs = "";
  29                 stdout-path = "serial0:115200n8";
  30         };
  31
  32         gpio-keys {
  33                 compatible = "gpio-keys";
  34                 autorepeat;
  35                 sw14 {
  36                         label = "sw14";
  37                         gpios = <&gpio0 12 0>;
  38                         linux,code = <108>; /* down */
  39                         wakeup-source;
  40                         autorepeat;
  41                 };
  42                 sw13 {
  43                         label = "sw13";
  44                         gpios = <&gpio0 14 0>;
  45                         linux,code = <103>; /* up */
  46                         wakeup-source;
  47                         autorepeat;
  48                 };
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53
  54                 ds23 {
  55                         label = "ds23";
  56                         gpios = <&gpio0 10 0>;
  57                         linux,default-trigger = "heartbeat";
  58                 };
  59         };
  60
  61         usb_phy0: phy0 {
  62                 compatible = "usb-nop-xceiv";
  63                 #phy-cells = <0>;
  64         };
  65 };
  66
  67 &amba {
  68         ocm: sram@fffc0000 {
  69                 compatible = "mmio-sram";
  70                 reg = <0xfffc0000 0x10000>;
  71         };
  72 };
  73
  74 &can0 {
  75         status = "okay";
  76         pinctrl-names = "default";
  77         pinctrl-0 = <&pinctrl_can0_default>;
  78 };
  79
  80 &clkc {
  81         ps-clk-frequency = <33333333>;
  82 };
  83
  84 &gem0 {
  85         status = "okay";
  86         phy-mode = "rgmii-id";
  87         phy-handle = <&ethernet_phy>;
  88         pinctrl-names = "default";
  89         pinctrl-0 = <&pinctrl_gem0_default>;
  90         phy-reset-gpio = <&gpio0 11 0>;
  91         phy-reset-active-low;
  92
  93         ethernet_phy: ethernet-phy@7 {
  94                 reg = <7>;
  95                 device_type = "ethernet-phy";
  96         };
  97 };
  98
  99 &gpio0 {
 100         pinctrl-names = "default";
 101         pinctrl-0 = <&pinctrl_gpio0_default>;
 102 };
 103
 104 &i2c0 {
 105         status = "okay";
 106         clock-frequency = <400000>;
 107         pinctrl-names = "default", "gpio";
 108         pinctrl-0 = <&pinctrl_i2c0_default>;
 109         pinctrl-1 = <&pinctrl_i2c0_gpio>;
 110         scl-gpios = <&gpio0 50 0>;
 111         sda-gpios = <&gpio0 51 0>;
 112
 113         i2c-mux@74 {
 114                 compatible = "nxp,pca9548";
 115                 #address-cells = <1>;
 116                 #size-cells = <0>;
 117                 reg = <0x74>;
 118
 119                 i2c@0 {
 120                         #address-cells = <1>;
 121                         #size-cells = <0>;
 122                         reg = <0>;
 123                         si570: clock-generator@5d {
 124                                 #clock-cells = <0>;
 125                                 compatible = "silabs,si570";
 126                                 temperature-stability = <50>;
 127                                 reg = <0x5d>;
 128                                 factory-fout = <156250000>;
 129                                 clock-frequency = <148500000>;
 130                         };
 131                 };
 132
 133                 i2c@1 {
 134                         #address-cells = <1>;
 135                         #size-cells = <0>;
 136                         reg = <1>;
 137                         adv7511: hdmi-tx@39 {
 138                                 compatible = "adi,adv7511";
 139                                 reg = <0x39>;
 140                                 adi,input-depth = <8>;
 141                                 adi,input-colorspace = "yuv422";
 142                                 adi,input-clock = "1x";
 143                                 adi,input-style = <3>;
 144                                 adi,input-justification = "right";
 145                         };
 146                 };
 147
 148                 i2c@2 {
 149                         #address-cells = <1>;
 150                         #size-cells = <0>;
 151                         reg = <2>;
 152                         eeprom@54 {
 153                                 compatible = "atmel,24c08";
 154                                 reg = <0x54>;
 155                         };
 156                 };
 157
 158                 i2c@3 {
 159                         #address-cells = <1>;
 160                         #size-cells = <0>;
 161                         reg = <3>;
 162                         gpio@21 {
 163                                 compatible = "ti,tca6416";
 164                                 reg = <0x21>;
 165                                 gpio-controller;
 166                                 #gpio-cells = <2>;
 167                         };
 168                 };
 169
 170                 i2c@4 {
 171                         #address-cells = <1>;
 172                         #size-cells = <0>;
 173                         reg = <4>;
 174                         rtc@51 {
 175                                 compatible = "nxp,pcf8563";
 176                                 reg = <0x51>;
 177                         };
 178                 };
 179
 180                 i2c@7 {
 181                         #address-cells = <1>;
 182                         #size-cells = <0>;
 183                         reg = <7>;
 184                         hwmon@52 {
 185                                 compatible = "ti,ucd9248";
 186                                 reg = <52>;
 187                         };
 188                         hwmon@53 {
 189                                 compatible = "ti,ucd9248";
 190                                 reg = <53>;
 191                         };
 192                         hwmon@54 {
 193                                 compatible = "ti,ucd9248";
 194                                 reg = <54>;
 195                         };
 196                 };
 197         };
 198 };
 199
 200 &pinctrl0 {
 201         pinctrl_can0_default: can0-default {
 202                 mux {
 203                         function = "can0";
 204                         groups = "can0_9_grp";
 205                 };
 206
 207                 conf {
 208                         groups = "can0_9_grp";
 209                         slew-rate = <0>;
 210                         io-standard = <1>;
 211                 };
 212
 213                 conf-rx {
 214                         pins = "MIO46";
 215                         bias-high-impedance;
 216                 };
 217
 218                 conf-tx {
 219                         pins = "MIO47";
 220                         bias-disable;
 221                 };
 222         };
 223
 224         pinctrl_gem0_default: gem0-default {
 225                 mux {
 226                         function = "ethernet0";
 227                         groups = "ethernet0_0_grp";
 228                 };
 229
 230                 conf {
 231                         groups = "ethernet0_0_grp";
 232                         slew-rate = <0>;
 233                         io-standard = <4>;
 234                 };
 235
 236                 conf-rx {
 237                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 238                         bias-high-impedance;
 239                         low-power-disable;
 240                 };
 241
 242                 conf-tx {
 243                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 244                         bias-disable;
 245                         low-power-enable;
 246                 };
 247
 248                 mux-mdio {
 249                         function = "mdio0";
 250                         groups = "mdio0_0_grp";
 251                 };
 252
 253                 conf-mdio {
 254                         groups = "mdio0_0_grp";
 255                         slew-rate = <0>;
 256                         io-standard = <1>;
 257                         bias-disable;
 258                 };
 259         };
 260
 261         pinctrl_gpio0_default: gpio0-default {
 262                 mux {
 263                         function = "gpio0";
 264                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 265                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 266                                  "gpio0_13_grp", "gpio0_14_grp";
 267                 };
 268
 269                 conf {
 270                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 271                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 272                                  "gpio0_13_grp", "gpio0_14_grp";
 273                         slew-rate = <0>;
 274                         io-standard = <1>;
 275                 };
 276
 277                 conf-pull-up {
 278                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
 279                         bias-pull-up;
 280                 };
 281
 282                 conf-pull-none {
 283                         pins = "MIO7", "MIO8";
 284                         bias-disable;
 285                 };
 286         };
 287
 288         pinctrl_i2c0_default: i2c0-default {
 289                 mux {
 290                         groups = "i2c0_10_grp";
 291                         function = "i2c0";
 292                 };
 293
 294                 conf {
 295                         groups = "i2c0_10_grp";
 296                         bias-pull-up;
 297                         slew-rate = <0>;
 298                         io-standard = <1>;
 299                 };
 300         };
 301
 302         pinctrl_i2c0_gpio: i2c0-gpio {
 303                 mux {
 304                         groups = "gpio0_50_grp", "gpio0_51_grp";
 305                         function = "gpio0";
 306                 };
 307
 308                 conf {
 309                         groups = "gpio0_50_grp", "gpio0_51_grp";
 310                         slew-rate = <0>;
 311                         io-standard = <1>;
 312                 };
 313         };
 314
 315         pinctrl_sdhci0_default: sdhci0-default {
 316                 mux {
 317                         groups = "sdio0_2_grp";
 318                         function = "sdio0";
 319                 };
 320
 321                 conf {
 322                         groups = "sdio0_2_grp";
 323                         slew-rate = <0>;
 324                         io-standard = <1>;
 325                         bias-disable;
 326                 };
 327
 328                 mux-cd {
 329                         groups = "gpio0_0_grp";
 330                         function = "sdio0_cd";
 331                 };
 332
 333                 conf-cd {
 334                         groups = "gpio0_0_grp";
 335                         bias-high-impedance;
 336                         bias-pull-up;
 337                         slew-rate = <0>;
 338                         io-standard = <1>;
 339                 };
 340
 341                 mux-wp {
 342                         groups = "gpio0_15_grp";
 343                         function = "sdio0_wp";
 344                 };
 345
 346                 conf-wp {
 347                         groups = "gpio0_15_grp";
 348                         bias-high-impedance;
 349                         bias-pull-up;
 350                         slew-rate = <0>;
 351                         io-standard = <1>;
 352                 };
 353         };
 354
 355         pinctrl_uart1_default: uart1-default {
 356                 mux {
 357                         groups = "uart1_10_grp";
 358                         function = "uart1";
 359                 };
 360
 361                 conf {
 362                         groups = "uart1_10_grp";
 363                         slew-rate = <0>;
 364                         io-standard = <1>;
 365                 };
 366
 367                 conf-rx {
 368                         pins = "MIO49";
 369                         bias-high-impedance;
 370                 };
 371
 372                 conf-tx {
 373                         pins = "MIO48";
 374                         bias-disable;
 375                 };
 376         };
 377
 378         pinctrl_usb0_default: usb0-default {
 379                 mux {
 380                         groups = "usb0_0_grp";
 381                         function = "usb0";
 382                 };
 383
 384                 conf {
 385                         groups = "usb0_0_grp";
 386                         slew-rate = <0>;
 387                         io-standard = <1>;
 388                 };
 389
 390                 conf-rx {
 391                         pins = "MIO29", "MIO31", "MIO36";
 392                         bias-high-impedance;
 393                 };
 394
 395                 conf-tx {
 396                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 397                                "MIO35", "MIO37", "MIO38", "MIO39";
 398                         bias-disable;
 399                 };
 400         };
 401 };
 402
 403 &qspi {
 404         u-boot,dm-pre-reloc;
 405         status = "okay";
 406 };
 407
 408 &sdhci0 {
 409         u-boot,dm-pre-reloc;
 410         status = "okay";
 411         pinctrl-names = "default";
 412         pinctrl-0 = <&pinctrl_sdhci0_default>;
 413 };
 414
 415 &uart1 {
 416         u-boot,dm-pre-reloc;
 417         status = "okay";
 418         pinctrl-names = "default";
 419         pinctrl-0 = <&pinctrl_uart1_default>;
 420 };
 421
 422 &usb0 {
 423         status = "okay";
 424         dr_mode = "host";
 425         usb-phy = <&usb_phy0>;
 426         pinctrl-names = "default";
 427         pinctrl-0 = <&pinctrl_usb0_default>;
 428 };