arch/arm/dts/zynq-zc702.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Copyright (C) 2011 - 2015 Xilinx
   4  *  Copyright (C) 2012 National Instruments Corp.
   5  */
   6 /dts-v1/;
   7 #include "zynq-7000.dtsi"
   8
   9 / {
  10         model = "Xilinx ZC702 board";
  11         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
  12
  13         aliases {
  14                 ethernet0 = &gem0;
  15                 i2c0 = &i2c0;
  16                 serial0 = &uart1;
  17                 spi0 = &qspi;
  18                 mmc0 = &sdhci0;
  19                 usb0 = &usb0;
  20         };
  21
  22         memory@0 {
  23                 device_type = "memory";
  24                 reg = <0x0 0x40000000>;
  25         };
  26
  27         chosen {
  28                 bootargs = "";
  29                 stdout-path = "serial0:115200n8";
  30         };
  31
  32         gpio-keys {
  33                 compatible = "gpio-keys";
  34                 autorepeat;
  35                 sw14 {
  36                         label = "sw14";
  37                         gpios = <&gpio0 12 0>;
  38                         linux,code = <108>; /* down */
  39                         wakeup-source;
  40                         autorepeat;
  41                 };
  42                 sw13 {
  43                         label = "sw13";
  44                         gpios = <&gpio0 14 0>;
  45                         linux,code = <103>; /* up */
  46                         wakeup-source;
  47                         autorepeat;
  48                 };
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53
  54                 led-ds23 {
  55                         label = "ds23";
  56                         gpios = <&gpio0 10 0>;
  57                         linux,default-trigger = "heartbeat";
  58                 };
  59         };
  60
  61         usb_phy0: phy0 {
  62                 compatible = "usb-nop-xceiv";
  63                 #phy-cells = <0>;
  64         };
  65 };
  66
  67 &amba {
  68         ocm: sram@fffc0000 {
  69                 compatible = "mmio-sram";
  70                 reg = <0xfffc0000 0x10000>;
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73                 ranges = <0 0xfffc0000 0x10000>;
  74                 ocm-sram@0 {
  75                         reg = <0x0 0x10000>;
  76                 };
  77         };
  78 };
  79
  80 &can0 {
  81         status = "okay";
  82         pinctrl-names = "default";
  83         pinctrl-0 = <&pinctrl_can0_default>;
  84 };
  85
  86 &clkc {
  87         ps-clk-frequency = <33333333>;
  88 };
  89
  90 &gem0 {
  91         status = "okay";
  92         phy-mode = "rgmii-id";
  93         phy-handle = <&ethernet_phy>;
  94         pinctrl-names = "default";
  95         pinctrl-0 = <&pinctrl_gem0_default>;
  96         phy-reset-gpio = <&gpio0 11 0>;
  97         phy-reset-active-low;
  98
  99         ethernet_phy: ethernet-phy@7 {
 100                 reg = <7>;
 101                 device_type = "ethernet-phy";
 102         };
 103 };
 104
 105 &gpio0 {
 106         pinctrl-names = "default";
 107         pinctrl-0 = <&pinctrl_gpio0_default>;
 108 };
 109
 110 &i2c0 {
 111         status = "okay";
 112         clock-frequency = <400000>;
 113         pinctrl-names = "default", "gpio";
 114         pinctrl-0 = <&pinctrl_i2c0_default>;
 115         pinctrl-1 = <&pinctrl_i2c0_gpio>;
 116         scl-gpios = <&gpio0 50 0>;
 117         sda-gpios = <&gpio0 51 0>;
 118
 119         i2c-mux@74 {
 120                 compatible = "nxp,pca9548";
 121                 #address-cells = <1>;
 122                 #size-cells = <0>;
 123                 reg = <0x74>;
 124
 125                 i2c@0 {
 126                         #address-cells = <1>;
 127                         #size-cells = <0>;
 128                         reg = <0>;
 129                         si570: clock-generator@5d {
 130                                 #clock-cells = <0>;
 131                                 compatible = "silabs,si570";
 132                                 temperature-stability = <50>;
 133                                 reg = <0x5d>;
 134                                 factory-fout = <156250000>;
 135                                 clock-frequency = <148500000>;
 136                         };
 137                 };
 138
 139                 i2c@1 {
 140                         #address-cells = <1>;
 141                         #size-cells = <0>;
 142                         reg = <1>;
 143                         adv7511: hdmi-tx@39 {
 144                                 compatible = "adi,adv7511";
 145                                 reg = <0x39>;
 146                                 adi,input-depth = <8>;
 147                                 adi,input-colorspace = "yuv422";
 148                                 adi,input-clock = "1x";
 149                                 adi,input-style = <3>;
 150                                 adi,input-justification = "right";
 151                         };
 152                 };
 153
 154                 i2c@2 {
 155                         #address-cells = <1>;
 156                         #size-cells = <0>;
 157                         reg = <2>;
 158                         eeprom@54 {
 159                                 compatible = "atmel,24c08";
 160                                 reg = <0x54>;
 161                         };
 162                 };
 163
 164                 i2c@3 {
 165                         #address-cells = <1>;
 166                         #size-cells = <0>;
 167                         reg = <3>;
 168                         gpio@21 {
 169                                 compatible = "ti,tca6416";
 170                                 reg = <0x21>;
 171                                 gpio-controller;
 172                                 #gpio-cells = <2>;
 173                         };
 174                 };
 175
 176                 i2c@4 {
 177                         #address-cells = <1>;
 178                         #size-cells = <0>;
 179                         reg = <4>;
 180                         rtc@51 {
 181                                 compatible = "nxp,pcf8563";
 182                                 reg = <0x51>;
 183                         };
 184                 };
 185
 186                 i2c@7 {
 187                         #address-cells = <1>;
 188                         #size-cells = <0>;
 189                         reg = <7>;
 190                         hwmon@34 {
 191                                 compatible = "ti,ucd9248";
 192                                 reg = <0x34>;
 193                         };
 194                         hwmon@35 {
 195                                 compatible = "ti,ucd9248";
 196                                 reg = <0x35>;
 197                         };
 198                         hwmon@36 {
 199                                 compatible = "ti,ucd9248";
 200                                 reg = <0x36>;
 201                         };
 202                 };
 203         };
 204 };
 205
 206 &pinctrl0 {
 207         pinctrl_can0_default: can0-default {
 208                 mux {
 209                         function = "can0";
 210                         groups = "can0_9_grp";
 211                 };
 212
 213                 conf {
 214                         groups = "can0_9_grp";
 215                         slew-rate = <0>;
 216                         io-standard = <1>;
 217                 };
 218
 219                 conf-rx {
 220                         pins = "MIO46";
 221                         bias-high-impedance;
 222                 };
 223
 224                 conf-tx {
 225                         pins = "MIO47";
 226                         bias-disable;
 227                 };
 228         };
 229
 230         pinctrl_gem0_default: gem0-default {
 231                 mux {
 232                         function = "ethernet0";
 233                         groups = "ethernet0_0_grp";
 234                 };
 235
 236                 conf {
 237                         groups = "ethernet0_0_grp";
 238                         slew-rate = <0>;
 239                         io-standard = <4>;
 240                 };
 241
 242                 conf-rx {
 243                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 244                         bias-high-impedance;
 245                         low-power-disable;
 246                 };
 247
 248                 conf-tx {
 249                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 250                         bias-disable;
 251                         low-power-enable;
 252                 };
 253
 254                 mux-mdio {
 255                         function = "mdio0";
 256                         groups = "mdio0_0_grp";
 257                 };
 258
 259                 conf-mdio {
 260                         groups = "mdio0_0_grp";
 261                         slew-rate = <0>;
 262                         io-standard = <1>;
 263                         bias-disable;
 264                 };
 265         };
 266
 267         pinctrl_gpio0_default: gpio0-default {
 268                 mux {
 269                         function = "gpio0";
 270                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 271                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 272                                  "gpio0_13_grp", "gpio0_14_grp";
 273                 };
 274
 275                 conf {
 276                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 277                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 278                                  "gpio0_13_grp", "gpio0_14_grp";
 279                         slew-rate = <0>;
 280                         io-standard = <1>;
 281                 };
 282
 283                 conf-pull-up {
 284                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
 285                         bias-pull-up;
 286                 };
 287
 288                 conf-pull-none {
 289                         pins = "MIO7", "MIO8";
 290                         bias-disable;
 291                 };
 292         };
 293
 294         pinctrl_i2c0_default: i2c0-default {
 295                 mux {
 296                         groups = "i2c0_10_grp";
 297                         function = "i2c0";
 298                 };
 299
 300                 conf {
 301                         groups = "i2c0_10_grp";
 302                         bias-pull-up;
 303                         slew-rate = <0>;
 304                         io-standard = <1>;
 305                 };
 306         };
 307
 308         pinctrl_i2c0_gpio: i2c0-gpio {
 309                 mux {
 310                         groups = "gpio0_50_grp", "gpio0_51_grp";
 311                         function = "gpio0";
 312                 };
 313
 314                 conf {
 315                         groups = "gpio0_50_grp", "gpio0_51_grp";
 316                         slew-rate = <0>;
 317                         io-standard = <1>;
 318                 };
 319         };
 320
 321         pinctrl_sdhci0_default: sdhci0-default {
 322                 mux {
 323                         groups = "sdio0_2_grp";
 324                         function = "sdio0";
 325                 };
 326
 327                 conf {
 328                         groups = "sdio0_2_grp";
 329                         slew-rate = <0>;
 330                         io-standard = <1>;
 331                         bias-disable;
 332                 };
 333
 334                 mux-cd {
 335                         groups = "gpio0_0_grp";
 336                         function = "sdio0_cd";
 337                 };
 338
 339                 conf-cd {
 340                         groups = "gpio0_0_grp";
 341                         bias-high-impedance;
 342                         bias-pull-up;
 343                         slew-rate = <0>;
 344                         io-standard = <1>;
 345                 };
 346
 347                 mux-wp {
 348                         groups = "gpio0_15_grp";
 349                         function = "sdio0_wp";
 350                 };
 351
 352                 conf-wp {
 353                         groups = "gpio0_15_grp";
 354                         bias-high-impedance;
 355                         bias-pull-up;
 356                         slew-rate = <0>;
 357                         io-standard = <1>;
 358                 };
 359         };
 360
 361         pinctrl_uart1_default: uart1-default {
 362                 mux {
 363                         groups = "uart1_10_grp";
 364                         function = "uart1";
 365                 };
 366
 367                 conf {
 368                         groups = "uart1_10_grp";
 369                         slew-rate = <0>;
 370                         io-standard = <1>;
 371                 };
 372
 373                 conf-rx {
 374                         pins = "MIO49";
 375                         bias-high-impedance;
 376                 };
 377
 378                 conf-tx {
 379                         pins = "MIO48";
 380                         bias-disable;
 381                 };
 382         };
 383
 384         pinctrl_usb0_default: usb0-default {
 385                 mux {
 386                         groups = "usb0_0_grp";
 387                         function = "usb0";
 388                 };
 389
 390                 conf {
 391                         groups = "usb0_0_grp";
 392                         slew-rate = <0>;
 393                         io-standard = <1>;
 394                 };
 395
 396                 conf-rx {
 397                         pins = "MIO29", "MIO31", "MIO36";
 398                         bias-high-impedance;
 399                 };
 400
 401                 conf-tx {
 402                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 403                                "MIO35", "MIO37", "MIO38", "MIO39";
 404                         bias-disable;
 405                 };
 406         };
 407 };
 408
 409 &qspi {
 410         u-boot,dm-pre-reloc;
 411         status = "okay";
 412 };
 413
 414 &sdhci0 {
 415         u-boot,dm-pre-reloc;
 416         status = "okay";
 417         pinctrl-names = "default";
 418         pinctrl-0 = <&pinctrl_sdhci0_default>;
 419 };
 420
 421 &uart1 {
 422         u-boot,dm-pre-reloc;
 423         status = "okay";
 424         pinctrl-names = "default";
 425         pinctrl-0 = <&pinctrl_uart1_default>;
 426 };
 427
 428 &usb0 {
 429         status = "okay";
 430         dr_mode = "host";
 431         usb-phy = <&usb_phy0>;
 432         pinctrl-names = "default";
 433         pinctrl-0 = <&pinctrl_usb0_default>;
 434 };