Merge branch 'master' of git://git.denx.de/u-boot-spi
[platform/kernel/u-boot.git] / arch / arm / dts / ulcb.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the R-Car Gen3 ULCB board
4  *
5  * Copyright (C) 2016 Renesas Electronics Corp.
6  * Copyright (C) 2016 Cogent Embedded, Inc.
7  */
8
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11
12 / {
13         model = "Renesas R-Car Gen3 ULCB board";
14
15         aliases {
16                 serial0 = &scif2;
17                 ethernet0 = &avb;
18         };
19
20         chosen {
21                 stdout-path = "serial0:115200n8";
22         };
23
24         audio_clkout: audio-clkout {
25                 /*
26                  * This is same as <&rcar_sound 0>
27                  * but needed to avoid cs2000/rcar_sound probe dead-lock
28                  */
29                 compatible = "fixed-clock";
30                 #clock-cells = <0>;
31                 clock-frequency = <12288000>;
32         };
33
34         hdmi0-out {
35                 compatible = "hdmi-connector";
36                 type = "a";
37
38                 port {
39                         hdmi0_con: endpoint {
40                         };
41                 };
42         };
43
44         keyboard {
45                 compatible = "gpio-keys";
46
47                 key-1 {
48                         linux,code = <KEY_1>;
49                         label = "SW3";
50                         wakeup-source;
51                         debounce-interval = <20>;
52                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
53                 };
54         };
55
56         leds {
57                 compatible = "gpio-leds";
58
59                 led5 {
60                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
61                 };
62                 led6 {
63                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
64                 };
65         };
66
67         reg_1p8v: regulator0 {
68                 compatible = "regulator-fixed";
69                 regulator-name = "fixed-1.8V";
70                 regulator-min-microvolt = <1800000>;
71                 regulator-max-microvolt = <1800000>;
72                 regulator-boot-on;
73                 regulator-always-on;
74         };
75
76         reg_3p3v: regulator1 {
77                 compatible = "regulator-fixed";
78                 regulator-name = "fixed-3.3V";
79                 regulator-min-microvolt = <3300000>;
80                 regulator-max-microvolt = <3300000>;
81                 regulator-boot-on;
82                 regulator-always-on;
83         };
84
85         rsnd_ak4613: sound {
86                 compatible = "simple-audio-card";
87
88                 simple-audio-card,format = "left_j";
89                 simple-audio-card,bitclock-master = <&sndcpu>;
90                 simple-audio-card,frame-master = <&sndcpu>;
91
92                 sndcpu: simple-audio-card,cpu {
93                         sound-dai = <&rcar_sound>;
94                 };
95
96                 sndcodec: simple-audio-card,codec {
97                         sound-dai = <&ak4613>;
98                 };
99         };
100
101         vcc_sdhi0: regulator-vcc-sdhi0 {
102                 compatible = "regulator-fixed";
103
104                 regulator-name = "SDHI0 Vcc";
105                 regulator-min-microvolt = <3300000>;
106                 regulator-max-microvolt = <3300000>;
107
108                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
109                 enable-active-high;
110         };
111
112         vccq_sdhi0: regulator-vccq-sdhi0 {
113                 compatible = "regulator-gpio";
114
115                 regulator-name = "SDHI0 VccQ";
116                 regulator-min-microvolt = <1800000>;
117                 regulator-max-microvolt = <3300000>;
118
119                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
120                 gpios-states = <1>;
121                 states = <3300000 1
122                           1800000 0>;
123         };
124
125         x12_clk: x12 {
126                 compatible = "fixed-clock";
127                 #clock-cells = <0>;
128                 clock-frequency = <24576000>;
129         };
130
131         x23_clk: x23-clock {
132                 compatible = "fixed-clock";
133                 #clock-cells = <0>;
134                 clock-frequency = <25000000>;
135         };
136 };
137
138 &audio_clk_a {
139         clock-frequency = <22579200>;
140 };
141
142 &avb {
143         pinctrl-0 = <&avb_pins>;
144         pinctrl-names = "default";
145         phy-handle = <&phy0>;
146         phy-mode = "rgmii-txid";
147         status = "okay";
148
149         phy0: ethernet-phy@0 {
150                 rxc-skew-ps = <1500>;
151                 reg = <0>;
152                 interrupt-parent = <&gpio2>;
153                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
154                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
155         };
156 };
157
158 &du {
159         status = "okay";
160 };
161
162 &ehci1 {
163         status = "okay";
164 };
165
166 &extal_clk {
167         clock-frequency = <16666666>;
168 };
169
170 &extalr_clk {
171         clock-frequency = <32768>;
172 };
173
174 &hdmi0 {
175         status = "okay";
176
177         ports {
178                 port@1 {
179                         reg = <1>;
180                         rcar_dw_hdmi0_out: endpoint {
181                                 remote-endpoint = <&hdmi0_con>;
182                         };
183                 };
184         };
185 };
186
187 &hdmi0_con {
188         remote-endpoint = <&rcar_dw_hdmi0_out>;
189 };
190
191 &i2c2 {
192         pinctrl-0 = <&i2c2_pins>;
193         pinctrl-names = "default";
194
195         status = "okay";
196
197         clock-frequency = <100000>;
198
199         ak4613: codec@10 {
200                 compatible = "asahi-kasei,ak4613";
201                 #sound-dai-cells = <0>;
202                 reg = <0x10>;
203                 clocks = <&rcar_sound 3>;
204
205                 asahi-kasei,in1-single-end;
206                 asahi-kasei,in2-single-end;
207                 asahi-kasei,out1-single-end;
208                 asahi-kasei,out2-single-end;
209                 asahi-kasei,out3-single-end;
210                 asahi-kasei,out4-single-end;
211                 asahi-kasei,out5-single-end;
212                 asahi-kasei,out6-single-end;
213         };
214
215         cs2000: clk-multiplier@4f {
216                 #clock-cells = <0>;
217                 compatible = "cirrus,cs2000-cp";
218                 reg = <0x4f>;
219                 clocks = <&audio_clkout>, <&x12_clk>;
220                 clock-names = "clk_in", "ref_clk";
221
222                 assigned-clocks = <&cs2000>;
223                 assigned-clock-rates = <24576000>; /* 1/1 divide */
224         };
225 };
226
227 &i2c4 {
228         status = "okay";
229
230         clock-frequency = <400000>;
231
232         versaclock5: clock-generator@6a {
233                 compatible = "idt,5p49v5925";
234                 reg = <0x6a>;
235                 #clock-cells = <1>;
236                 clocks = <&x23_clk>;
237                 clock-names = "xin";
238         };
239 };
240
241 &i2c_dvfs {
242         status = "okay";
243
244         pmic: pmic@30 {
245                 pinctrl-0 = <&irq0_pins>;
246                 pinctrl-names = "default";
247
248                 compatible = "rohm,bd9571mwv";
249                 reg = <0x30>;
250                 interrupt-parent = <&intc_ex>;
251                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
252                 interrupt-controller;
253                 #interrupt-cells = <2>;
254                 gpio-controller;
255                 #gpio-cells = <2>;
256                 rohm,ddr-backup-power = <0xf>;
257                 rohm,rstbmode-pulse;
258
259                 regulators {
260                         dvfs: dvfs {
261                                 regulator-name = "dvfs";
262                                 regulator-min-microvolt = <750000>;
263                                 regulator-max-microvolt = <1030000>;
264                                 regulator-boot-on;
265                                 regulator-always-on;
266                         };
267                 };
268         };
269 };
270
271 &ohci1 {
272         status = "okay";
273 };
274
275 &pfc {
276         pinctrl-0 = <&scif_clk_pins>;
277         pinctrl-names = "default";
278
279         avb_pins: avb {
280                 mux {
281                         groups = "avb_link", "avb_mdio", "avb_mii";
282                         function = "avb";
283                 };
284
285                 pins_mdio {
286                         groups = "avb_mdio";
287                         drive-strength = <24>;
288                 };
289
290                 pins_mii_tx {
291                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
292                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
293                         drive-strength = <12>;
294                 };
295         };
296
297         i2c2_pins: i2c2 {
298                 groups = "i2c2_a";
299                 function = "i2c2";
300         };
301
302         irq0_pins: irq0 {
303                 groups = "intc_ex_irq0";
304                 function = "intc_ex";
305         };
306
307         scif2_pins: scif2 {
308                 groups = "scif2_data_a";
309                 function = "scif2";
310         };
311
312         scif_clk_pins: scif_clk {
313                 groups = "scif_clk_a";
314                 function = "scif_clk";
315         };
316
317         sdhi0_pins: sd0 {
318                 groups = "sdhi0_data4", "sdhi0_ctrl";
319                 function = "sdhi0";
320                 power-source = <3300>;
321         };
322
323         sdhi0_pins_uhs: sd0_uhs {
324                 groups = "sdhi0_data4", "sdhi0_ctrl";
325                 function = "sdhi0";
326                 power-source = <1800>;
327         };
328
329         sdhi2_pins: sd2 {
330                 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
331                 function = "sdhi2";
332                 power-source = <3300>;
333         };
334
335         sdhi2_pins_uhs: sd2_uhs {
336                 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
337                 function = "sdhi2";
338                 power-source = <1800>;
339         };
340
341         sound_pins: sound {
342                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
343                 function = "ssi";
344         };
345
346         sound_clk_pins: sound-clk {
347                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
348                          "audio_clkout_a", "audio_clkout3_a";
349                 function = "audio_clk";
350         };
351
352         usb1_pins: usb1 {
353                 groups = "usb1";
354                 function = "usb1";
355         };
356 };
357
358 &rcar_sound {
359         pinctrl-0 = <&sound_pins &sound_clk_pins>;
360         pinctrl-names = "default";
361
362         /* Single DAI */
363         #sound-dai-cells = <0>;
364
365         /* audio_clkout0/1/2/3 */
366         #clock-cells = <1>;
367         clock-frequency = <12288000 11289600>;
368
369         status = "okay";
370
371         /* update <audio_clk_b> to <cs2000> */
372         clocks = <&cpg CPG_MOD 1005>,
373                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
374                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
375                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
376                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
377                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
378                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
379                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
380                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
381                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
382                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
383                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
384                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
385                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
386                  <&audio_clk_a>, <&cs2000>,
387                  <&audio_clk_c>,
388                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
389
390         rcar_sound,dai {
391                 dai0 {
392                         playback = <&ssi0 &src0 &dvc0>;
393                         capture  = <&ssi1 &src1 &dvc1>;
394                 };
395         };
396 };
397
398 &scif2 {
399         pinctrl-0 = <&scif2_pins>;
400         pinctrl-names = "default";
401
402         status = "okay";
403 };
404
405 &scif_clk {
406         clock-frequency = <14745600>;
407 };
408
409 &sdhi0 {
410         pinctrl-0 = <&sdhi0_pins>;
411         pinctrl-1 = <&sdhi0_pins_uhs>;
412         pinctrl-names = "default", "state_uhs";
413
414         vmmc-supply = <&vcc_sdhi0>;
415         vqmmc-supply = <&vccq_sdhi0>;
416         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
417         bus-width = <4>;
418         sd-uhs-sdr50;
419         status = "okay";
420 };
421
422 &sdhi2 {
423         /* used for on-board 8bit eMMC */
424         pinctrl-0 = <&sdhi2_pins>;
425         pinctrl-1 = <&sdhi2_pins_uhs>;
426         pinctrl-names = "default", "state_uhs";
427
428         vmmc-supply = <&reg_3p3v>;
429         vqmmc-supply = <&reg_1p8v>;
430         bus-width = <8>;
431         mmc-hs200-1_8v;
432         non-removable;
433         status = "okay";
434 };
435
436 &ssi1 {
437         shared-pin;
438 };
439
440 &usb2_phy1 {
441         pinctrl-0 = <&usb1_pins>;
442         pinctrl-names = "default";
443
444         status = "okay";
445 };
446
447 &rwdt {
448         timeout-sec = <60>;
449         status = "okay";
450 };