arch/arm/dts/tegra20-whistler.dts

   1 /dts-v1/;
   2
   3 #include "tegra20.dtsi"
   4
   5 / {
   6         model = "NVIDIA Tegra20 Whistler evaluation board";
   7         compatible = "nvidia,whistler", "nvidia,tegra20";
   8
   9         chosen {
  10                 stdout-path = &uarta;
  11         };
  12
  13         aliases {
  14                 i2c0 = "/i2c@7000d000";
  15                 usb0 = "/usb@c5008000";
  16                 sdhci0 = "/sdhci@c8000600";
  17                 sdhci1 = "/sdhci@c8000400";
  18         };
  19
  20         memory {
  21                 device_type = "memory";
  22                 reg = < 0x00000000 0x20000000 >;
  23         };
  24
  25         serial@70006000 {
  26                 clock-frequency = < 216000000 >;
  27         };
  28
  29         i2c@7000d000 {
  30                 status = "okay";
  31                 clock-frequency = <100000>;
  32
  33                 pmic@3c {
  34                         compatible = "maxim,max8907b";
  35                         reg = <0x3c>;
  36
  37                         clk_32k: clock {
  38                                 compatible = "fixed-clock";
  39                                 /*
  40                                  * leave out for now due to CPP:
  41                                  * #clock-cells = <0>;
  42                                  */
  43                                 clock-frequency = <32768>;
  44                         };
  45                 };
  46         };
  47
  48         usb@c5008000 {
  49                 status = "okay";
  50         };
  51
  52         sdhci@c8000400 {
  53                 status = "okay";
  54                 wp-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
  55                 bus-width = <8>;
  56         };
  57
  58         sdhci@c8000600 {
  59                 status = "okay";
  60                 bus-width = <8>;
  61         };
  62
  63         clocks {
  64                 compatible = "simple-bus";
  65                 #address-cells = <1>;
  66                 #size-cells = <0>;
  67
  68                 clk32k_in: clock@0 {
  69                         compatible = "fixed-clock";
  70                         reg=<0>;
  71                         #clock-cells = <0>;
  72                         clock-frequency = <32768>;
  73                 };
  74         };
  75
  76 };