Merge branch 'u-boot/master' into 'u-boot-arm/master'
[platform/kernel/u-boot.git] / arch / arm / dts / tegra114.dtsi
1 #include "skeleton.dtsi"
2
3 / {
4         compatible = "nvidia,tegra114";
5
6         tegra_car: clock {
7                 compatible = "nvidia,tegra114-car";
8                 reg = <0x60006000 0x1000>;
9                 #clock-cells = <1>;
10         };
11
12         apbdma: dma {
13                 compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
14                 reg = <0x6000a000 0x1400>;
15                 interrupts = <0 104 0x04
16                               0 105 0x04
17                               0 106 0x04
18                               0 107 0x04
19                               0 108 0x04
20                               0 109 0x04
21                               0 110 0x04
22                               0 111 0x04
23                               0 112 0x04
24                               0 113 0x04
25                               0 114 0x04
26                               0 115 0x04
27                               0 116 0x04
28                               0 117 0x04
29                               0 118 0x04
30                               0 119 0x04
31                               0 128 0x04
32                               0 129 0x04
33                               0 130 0x04
34                               0 131 0x04
35                               0 132 0x04
36                               0 133 0x04
37                               0 134 0x04
38                               0 135 0x04
39                               0 136 0x04
40                               0 137 0x04
41                               0 138 0x04
42                               0 139 0x04
43                               0 140 0x04
44                               0 141 0x04
45                               0 142 0x04
46                               0 143 0x04>;
47         };
48
49         gpio: gpio {
50                 compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
51                 reg = <0x6000d000 0x1000>;
52                 interrupts = <0 32 0x04
53                               0 33 0x04
54                               0 34 0x04
55                               0 35 0x04
56                               0 55 0x04
57                               0 87 0x04
58                               0 89 0x04
59                               0 125 0x04>;
60                 #gpio-cells = <2>;
61                 gpio-controller;
62                 #interrupt-cells = <2>;
63                 interrupt-controller;
64         };
65
66         i2c@7000c000 {
67                 compatible = "nvidia,tegra114-i2c";
68                 reg = <0x7000c000 0x100>;
69                 interrupts = <0 38 0x04>;
70                 #address-cells = <1>;
71                 #size-cells = <0>;
72                 clocks = <&tegra_car 12>;
73                 status = "disabled";
74         };
75
76         i2c@7000c400 {
77                 compatible = "nvidia,tegra114-i2c";
78                 reg = <0x7000c400 0x100>;
79                 interrupts = <0 84 0x04>;
80                 #address-cells = <1>;
81                 #size-cells = <0>;
82                 clocks = <&tegra_car 54>;
83                 status = "disabled";
84         };
85
86         i2c@7000c500 {
87                 compatible = "nvidia,tegra114-i2c";
88                 reg = <0x7000c500 0x100>;
89                 interrupts = <0 92 0x04>;
90                 #address-cells = <1>;
91                 #size-cells = <0>;
92                 clocks = <&tegra_car 67>;
93                 status = "disabled";
94         };
95
96         i2c@7000c700 {
97                 compatible = "nvidia,tegra114-i2c";
98                 reg = <0x7000c700 0x100>;
99                 interrupts = <0 120 0x04>;
100                 #address-cells = <1>;
101                 #size-cells = <0>;
102                 clocks = <&tegra_car 103>;
103                 status = "disabled";
104         };
105
106         i2c@7000d000 {
107                 compatible = "nvidia,tegra114-i2c";
108                 reg = <0x7000d000 0x100>;
109                 interrupts = <0 53 0x04>;
110                 #address-cells = <1>;
111                 #size-cells = <0>;
112                 clocks = <&tegra_car 47>;
113                 status = "disabled";
114         };
115
116         spi@7000d400 {
117                 compatible = "nvidia,tegra114-spi";
118                 reg = <0x7000d400 0x200>;
119                 interrupts = <0 59 0x04>;
120                 nvidia,dma-request-selector = <&apbdma 15>;
121                 #address-cells = <1>;
122                 #size-cells = <0>;
123                 status = "disabled";
124                 /* PERIPH_ID_SBC1, PLLP_OUT0 */
125                 clocks = <&tegra_car 41>;
126         };
127
128         spi@7000d600 {
129                 compatible = "nvidia,tegra114-spi";
130                 reg = <0x7000d600 0x200>;
131                 interrupts = <0 82 0x04>;
132                 nvidia,dma-request-selector = <&apbdma 16>;
133                 #address-cells = <1>;
134                 #size-cells = <0>;
135                 status = "disabled";
136                 /* PERIPH_ID_SBC2, PLLP_OUT0 */
137                 clocks = <&tegra_car 44>;
138         };
139
140         spi@7000d800 {
141                 compatible = "nvidia,tegra114-spi";
142                 reg = <0x7000d480 0x200>;
143                 interrupts = <0 83 0x04>;
144                 nvidia,dma-request-selector = <&apbdma 17>;
145                 #address-cells = <1>;
146                 #size-cells = <0>;
147                 status = "disabled";
148                 /* PERIPH_ID_SBC3, PLLP_OUT0 */
149                 clocks = <&tegra_car 46>;
150         };
151
152         spi@7000da00 {
153                 compatible = "nvidia,tegra114-spi";
154                 reg = <0x7000da00 0x200>;
155                 interrupts = <0 93 0x04>;
156                 nvidia,dma-request-selector = <&apbdma 18>;
157                 #address-cells = <1>;
158                 #size-cells = <0>;
159                 status = "disabled";
160                 /* PERIPH_ID_SBC4, PLLP_OUT0 */
161                 clocks = <&tegra_car 68>;
162         };
163
164         spi@7000dc00 {
165                 compatible = "nvidia,tegra114-spi";
166                 reg = <0x7000dc00 0x200>;
167                 interrupts = <0 94 0x04>;
168                 nvidia,dma-request-selector = <&apbdma 27>;
169                 #address-cells = <1>;
170                 #size-cells = <0>;
171                 status = "disabled";
172                 /* PERIPH_ID_SBC5, PLLP_OUT0 */
173                 clocks = <&tegra_car 104>;
174         };
175
176         spi@7000de00 {
177                 compatible = "nvidia,tegra114-spi";
178                 reg = <0x7000de00 0x200>;
179                 interrupts = <0 79 0x04>;
180                 nvidia,dma-request-selector = <&apbdma 28>;
181                 #address-cells = <1>;
182                 #size-cells = <0>;
183                 status = "disabled";
184                 /* PERIPH_ID_SBC6, PLLP_OUT0 */
185                 clocks = <&tegra_car 105>;
186         };
187
188         sdhci@78000000 {
189                 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
190                 reg = <0x78000000 0x200>;
191                 interrupts = <0 14 0x04>;
192                 clocks = <&tegra_car 14>;
193                 status = "disable";
194         };
195
196         sdhci@78000200 {
197                 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
198                 reg = <0x78000200 0x200>;
199                 interrupts = <0 15 0x04>;
200                 clocks = <&tegra_car 9>;
201                 status = "disable";
202         };
203
204         sdhci@78000400 {
205                 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
206                 reg = <0x78000400 0x200>;
207                 interrupts = <0 19 0x04>;
208                 clocks = <&tegra_car 69>;
209                 status = "disable";
210         };
211
212         sdhci@78000600 {
213                 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
214                 reg = <0x78000600 0x200>;
215                 interrupts = <0 31 0x04>;
216                 clocks = <&tegra_car 15>;
217                 status = "disable";
218         };
219 };