arch/arm/dts/sun8i-a83t-cubietruck-plus.dts

   1 /*
   2  * Copyright 2015 Chen-Yu Tsai
   3  *
   4  * Chen-Yu Tsai <wens@csie.org>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 /dts-v1/;
  46 #include "sun8i-a83t.dtsi"
  47
  48 #include <dt-bindings/gpio/gpio.h>
  49
  50 / {
  51         model = "Cubietech Cubietruck Plus";
  52         compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
  53
  54         aliases {
  55                 ethernet0 = &emac;
  56                 serial0 = &uart0;
  57         };
  58
  59         chosen {
  60                 stdout-path = "serial0:115200n8";
  61         };
  62
  63         leds {
  64                 compatible = "gpio-leds";
  65
  66                 blue {
  67                         label = "cubietruck-plus:blue:usr";
  68                         gpios = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */
  69                 };
  70
  71                 orange {
  72                         label = "cubietruck-plus:orange:usr";
  73                         gpios = <&pio 3 26 GPIO_ACTIVE_HIGH>; /* PD26 */
  74                 };
  75
  76                 white {
  77                         label = "cubietruck-plus:white:usr";
  78                         gpios = <&pio 3 27 GPIO_ACTIVE_HIGH>; /* PD27 */
  79                 };
  80
  81                 green {
  82                         label = "cubietruck-plus:green:usr";
  83                         gpios = <&pio 4 4 GPIO_ACTIVE_HIGH>; /* PE4 */
  84                 };
  85         };
  86
  87         usb-hub {
  88                 /* I2C is not connected */
  89                 compatible = "smsc,usb3503";
  90                 initial-mode = <1>; /* initialize in HUB mode */
  91                 disabled-ports = <1>;
  92                 intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
  93                 reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */
  94                 connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
  95                 refclk-frequency = <19200000>;
  96         };
  97
  98         reg_usb1_vbus: reg-usb1-vbus {
  99                 compatible = "regulator-fixed";
 100                 regulator-name = "usb1-vbus";
 101                 regulator-min-microvolt = <5000000>;
 102                 regulator-max-microvolt = <5000000>;
 103                 regulator-boot-on;
 104                 enable-active-high;
 105                 gpio = <&pio 3 29 GPIO_ACTIVE_HIGH>; /* PD29 */
 106         };
 107
 108         reg_usb2_vbus: reg-usb2-vbus {
 109                 compatible = "regulator-fixed";
 110                 regulator-name = "usb2-vbus";
 111                 regulator-min-microvolt = <5000000>;
 112                 regulator-max-microvolt = <5000000>;
 113                 regulator-boot-on;
 114                 enable-active-high;
 115                 gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
 116         };
 117
 118         sound {
 119                 compatible = "simple-audio-card";
 120                 simple-audio-card,name = "On-board SPDIF";
 121
 122                 simple-audio-card,cpu {
 123                         sound-dai = <&spdif>;
 124                 };
 125
 126                 simple-audio-card,codec {
 127                         sound-dai = <&spdif_out>;
 128                 };
 129         };
 130
 131         spdif_out: spdif-out {
 132                 #sound-dai-cells = <0>;
 133                 compatible = "linux,spdif-dit";
 134         };
 135
 136         wifi_pwrseq: wifi_pwrseq {
 137                 compatible = "mmc-pwrseq-simple";
 138                 clocks = <&ac100_rtc 1>;
 139                 clock-names = "ext_clock";
 140                 /* The WiFi low power clock must be 32768 Hz */
 141                 assigned-clocks = <&ac100_rtc 1>;
 142                 assigned-clock-rates = <32768>;
 143                 /* enables internal regulator and de-asserts reset */
 144                 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
 145         };
 146 };
 147
 148 &ehci0 {
 149         /* GL830 USB-to-SATA bridge here */
 150         status = "okay";
 151 };
 152
 153 &ehci1 {
 154         /* USB3503 HSIC USB 2.0 hub here */
 155         status = "okay";
 156 };
 157
 158 &emac {
 159         pinctrl-names = "default";
 160         pinctrl-0 = <&emac_rgmii_pins>;
 161         phy-supply = <&reg_dldo4>;
 162         phy-handle = <&rgmii_phy>;
 163         phy-mode = "rgmii";
 164         status = "okay";
 165 };
 166
 167 &mdio {
 168         rgmii_phy: ethernet-phy@1 {
 169                 compatible = "ethernet-phy-ieee802.3-c22";
 170                 reg = <1>;
 171         };
 172 };
 173
 174 &mmc0 {
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&mmc0_pins>;
 177         vmmc-supply = <&reg_dcdc1>;
 178         bus-width = <4>;
 179         cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
 180         status = "okay";
 181 };
 182
 183 &mmc1 {
 184         vmmc-supply = <&reg_dcdc1>;
 185         vqmmc-supply = <&reg_sw>;
 186         mmc-pwrseq = <&wifi_pwrseq>;
 187         bus-width = <4>;
 188         non-removable;
 189         status = "okay";
 190 };
 191
 192 &mmc2 {
 193         pinctrl-names = "default";
 194         pinctrl-0 = <&mmc2_8bit_emmc_pins>;
 195         vmmc-supply = <&reg_dcdc1>;
 196         bus-width = <8>;
 197         non-removable;
 198         cap-mmc-hw-reset;
 199         status = "okay";
 200 };
 201
 202 &r_rsb {
 203         status = "okay";
 204
 205         axp81x: pmic@3a3 {
 206                 compatible = "x-powers,axp818", "x-powers,axp813";
 207                 reg = <0x3a3>;
 208                 interrupt-parent = <&r_intc>;
 209                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 210                 eldoin-supply = <&reg_dcdc1>;
 211                 swin-supply = <&reg_dcdc1>;
 212                 x-powers,drive-vbus-en;
 213         };
 214
 215         ac100: codec@e89 {
 216                 compatible = "x-powers,ac100";
 217                 reg = <0xe89>;
 218
 219                 ac100_codec: codec {
 220                         compatible = "x-powers,ac100-codec";
 221                         interrupt-parent = <&r_pio>;
 222                         interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
 223                         #clock-cells = <0>;
 224                         clock-output-names = "4M_adda";
 225                 };
 226
 227                 ac100_rtc: rtc {
 228                         compatible = "x-powers,ac100-rtc";
 229                         interrupt-parent = <&r_intc>;
 230                         interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 231                         clocks = <&ac100_codec>;
 232                         #clock-cells = <1>;
 233                         clock-output-names = "cko1_rtc",
 234                                              "cko2_rtc",
 235                                              "cko3_rtc";
 236                 };
 237         };
 238 };
 239
 240 #include "axp81x.dtsi"
 241
 242 &reg_aldo1 {
 243         regulator-always-on;
 244         regulator-min-microvolt = <1800000>;
 245         regulator-max-microvolt = <1800000>;
 246         regulator-name = "vcc-1v8";
 247 };
 248
 249 &reg_aldo2 {
 250         regulator-always-on;
 251         regulator-min-microvolt = <1800000>;
 252         regulator-max-microvolt = <1800000>;
 253         regulator-name = "dram-pll";
 254 };
 255
 256 &reg_aldo3 {
 257         regulator-always-on;
 258         regulator-min-microvolt = <3000000>;
 259         regulator-max-microvolt = <3000000>;
 260         regulator-name = "avcc";
 261 };
 262
 263 &reg_dcdc1 {
 264         /*
 265          * The schematics say this should be 3.3V, but the FEX file says
 266          * it should be 3V. The latter makes sense, as the WiFi module's
 267          * I/O is indirectly powered from DCDC1, through SW. It is rated
 268          * at 2.98V maximum.
 269          */
 270         regulator-always-on;
 271         regulator-min-microvolt = <3000000>;
 272         regulator-max-microvolt = <3000000>;
 273         regulator-name = "vcc-3v";
 274 };
 275
 276 &reg_dcdc2 {
 277         regulator-always-on;
 278         regulator-min-microvolt = <700000>;
 279         regulator-max-microvolt = <1100000>;
 280         regulator-name = "vdd-cpua";
 281 };
 282
 283 &reg_dcdc3 {
 284         regulator-always-on;
 285         regulator-min-microvolt = <700000>;
 286         regulator-max-microvolt = <1100000>;
 287         regulator-name = "vdd-cpub";
 288 };
 289
 290 &reg_dcdc4 {
 291         regulator-min-microvolt = <700000>;
 292         regulator-max-microvolt = <1100000>;
 293         regulator-name = "vdd-gpu";
 294 };
 295
 296 &reg_dcdc5 {
 297         regulator-always-on;
 298         regulator-min-microvolt = <1500000>;
 299         regulator-max-microvolt = <1500000>;
 300         regulator-name = "vcc-dram";
 301 };
 302
 303 &reg_dcdc6 {
 304         regulator-always-on;
 305         regulator-min-microvolt = <900000>;
 306         regulator-max-microvolt = <900000>;
 307         regulator-name = "vdd-sys";
 308 };
 309
 310 &reg_dldo2 {
 311         regulator-min-microvolt = <3300000>;
 312         regulator-max-microvolt = <3300000>;
 313         regulator-name = "dp-pwr";
 314 };
 315
 316 &reg_dldo3 {
 317         regulator-always-on;
 318         regulator-min-microvolt = <2500000>;
 319         regulator-max-microvolt = <2500000>;
 320         regulator-name = "ephy-io";
 321 };
 322
 323 &reg_dldo4 {
 324         /*
 325          * The PHY requires 20ms after all voltages are applied until core
 326          * logic is ready and 30ms after the reset pin is de-asserted.
 327          * Set a 100ms delay to account for PMIC ramp time and board traces.
 328          */
 329         regulator-enable-ramp-delay = <100000>;
 330         regulator-min-microvolt = <3300000>;
 331         regulator-max-microvolt = <3300000>;
 332         regulator-name = "ephy";
 333 };
 334
 335 &reg_drivevbus {
 336         regulator-name = "usb0-vbus";
 337         status = "okay";
 338 };
 339
 340 &reg_eldo1 {
 341         regulator-min-microvolt = <1200000>;
 342         regulator-max-microvolt = <1200000>;
 343         regulator-name = "dp-bridge-1";
 344 };
 345
 346 &reg_eldo2 {
 347         regulator-min-microvolt = <1200000>;
 348         regulator-max-microvolt = <1200000>;
 349         regulator-name = "dp-bridge-2";
 350 };
 351
 352 &reg_fldo1 {
 353         /* TODO should be handled by USB PHY */
 354         regulator-always-on;
 355         regulator-min-microvolt = <1080000>;
 356         regulator-max-microvolt = <1320000>;
 357         regulator-name = "vdd12-hsic";
 358 };
 359
 360 &reg_fldo2 {
 361         /*
 362          * Despite the embedded CPUs core not being used in any way,
 363          * this must remain on or the system will hang.
 364          */
 365         regulator-always-on;
 366         regulator-min-microvolt = <700000>;
 367         regulator-max-microvolt = <1100000>;
 368         regulator-name = "vdd-cpus";
 369 };
 370
 371 &reg_rtc_ldo {
 372         regulator-name = "vcc-rtc";
 373 };
 374
 375 &reg_sw {
 376         regulator-name = "vcc-wifi-io";
 377 };
 378
 379 &spdif {
 380         status = "okay";
 381 };
 382
 383 &uart0 {
 384         pinctrl-names = "default";
 385         pinctrl-0 = <&uart0_pb_pins>;
 386         status = "okay";
 387 };
 388
 389 &usb_otg {
 390         status = "okay";
 391 };
 392
 393 &usbphy {
 394         usb1_vbus-supply = <&reg_usb1_vbus>;
 395         usb2_vbus-supply = <&reg_usb2_vbus>;
 396         status = "okay";
 397 };