1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright : STMicroelectronics 2018
21 pinctrl1 = &pinctrl_z;
28 /* need PSCI for sysreset during board_f */
35 compatible = "syscon-reboot";
47 compatible = "st,stm32mp1-ddr";
49 reg = <0x5A003000 0x550
52 clocks = <&rcc AXIDCG>,
59 clock-names = "axidcg",
157 /* pre-reloc probe = reserve video frame buffer in video_reserve() */
159 u-boot,dm-pre-proper;
162 /* temp = waiting kernel update */
164 resets = <&rcc MCU_R>,
165 <&rcc MCU_HOLD_BOOT_R>;
166 reset-names = "mcu_rst", "hold_boot";
183 #address-cells = <1>;
188 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
192 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
196 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
200 resets = <&rcc USART1_R>;
204 resets = <&rcc USART2_R>;
208 resets = <&rcc USART3_R>;
212 resets = <&rcc UART4_R>;
216 resets = <&rcc UART5_R>;
220 resets = <&rcc USART6_R>;
224 resets = <&rcc UART7_R>;
228 resets = <&rcc UART8_R>;
232 compatible = "st,stm32mp1-hsotg", "snps,dwc2";