1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright : STMicroelectronics 2018
21 pinctrl1 = &pinctrl_z;
28 /* need PSCI for sysreset during board_f */
35 compatible = "syscon-reboot";
47 compatible = "st,stm32mp1-ddr";
49 reg = <0x5A003000 0x550
52 clocks = <&rcc AXIDCG>,
59 clock-names = "axidcg",
157 /* pre-reloc probe = reserve video frame buffer in video_reserve() */
159 u-boot,dm-pre-proper;
176 #address-cells = <1>;
181 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
185 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
189 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
193 resets = <&rcc USART1_R>;
197 resets = <&rcc USART2_R>;
201 resets = <&rcc USART3_R>;
205 resets = <&rcc UART4_R>;
209 resets = <&rcc UART5_R>;
213 resets = <&rcc USART6_R>;
217 resets = <&rcc UART7_R>;
221 resets = <&rcc UART8_R>;
225 compatible = "st,stm32mp1-hsotg", "snps,dwc2";