e0965c5936e3a2cb96cbfd72c0c972253591876c
[platform/kernel/u-boot.git] / arch / arm / dts / stm32mp15-pinctrl.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /*
3  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4  * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5  */
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8 &pinctrl {
9         adc1_in6_pins_a: adc1-in6-0 {
10                 pins {
11                         pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
12                 };
13         };
14
15         adc12_ain_pins_a: adc12-ain-0 {
16                 pins {
17                         pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
18                                  <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
19                                  <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
20                                  <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
21                 };
22         };
23
24         adc12_ain_pins_b: adc12-ain-1 {
25                 pins {
26                         pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
27                                  <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
28                 };
29         };
30
31         adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
32                 pins {
33                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
34                                  <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
35                 };
36         };
37
38         cec_pins_a: cec-0 {
39                 pins {
40                         pinmux = <STM32_PINMUX('A', 15, AF4)>;
41                         bias-disable;
42                         drive-open-drain;
43                         slew-rate = <0>;
44                 };
45         };
46
47         cec_sleep_pins_a: cec-sleep-0 {
48                 pins {
49                         pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
50                 };
51         };
52
53         cec_pins_b: cec-1 {
54                 pins {
55                         pinmux = <STM32_PINMUX('B', 6, AF5)>;
56                         bias-disable;
57                         drive-open-drain;
58                         slew-rate = <0>;
59                 };
60         };
61
62         cec_sleep_pins_b: cec-sleep-1 {
63                 pins {
64                         pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
65                 };
66         };
67
68         dac_ch1_pins_a: dac-ch1-0 {
69                 pins {
70                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
71                 };
72         };
73
74         dac_ch2_pins_a: dac-ch2-0 {
75                 pins {
76                         pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
77                 };
78         };
79
80         dcmi_pins_a: dcmi-0 {
81                 pins {
82                         pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
83                                  <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
84                                  <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
85                                  <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
86                                  <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
87                                  <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
88                                  <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
89                                  <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
90                                  <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
91                                  <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
92                                  <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
93                                  <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
94                                  <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
95                                  <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
96                                  <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
97                         bias-disable;
98                 };
99         };
100
101         dcmi_sleep_pins_a: dcmi-sleep-0 {
102                 pins {
103                         pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
104                                  <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
105                                  <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
106                                  <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
107                                  <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
108                                  <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
109                                  <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
110                                  <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
111                                  <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
112                                  <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
113                                  <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
114                                  <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
115                                  <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
116                                  <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
117                                  <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
118                 };
119         };
120
121         dcmi_pins_b: dcmi-1 {
122                 pins {
123                         pinmux = <STM32_PINMUX('A', 4,  AF13)>,/* DCMI_HSYNC */
124                                  <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
125                                  <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
126                                  <STM32_PINMUX('C', 6,  AF13)>,/* DCMI_D0 */
127                                  <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
128                                  <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
129                                  <STM32_PINMUX('E', 1,  AF13)>,/* DCMI_D3 */
130                                  <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
131                                  <STM32_PINMUX('D', 3,  AF13)>,/* DCMI_D5 */
132                                  <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
133                                  <STM32_PINMUX('B', 9,  AF13)>;/* DCMI_D7 */
134                         bias-disable;
135                 };
136         };
137
138         dcmi_sleep_pins_b: dcmi-sleep-1 {
139                 pins {
140                         pinmux = <STM32_PINMUX('A', 4,  ANALOG)>,/* DCMI_HSYNC */
141                                  <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
142                                  <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
143                                  <STM32_PINMUX('C', 6,  ANALOG)>,/* DCMI_D0 */
144                                  <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
145                                  <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
146                                  <STM32_PINMUX('E', 1,  ANALOG)>,/* DCMI_D3 */
147                                  <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
148                                  <STM32_PINMUX('D', 3,  ANALOG)>,/* DCMI_D5 */
149                                  <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
150                                  <STM32_PINMUX('B', 9,  ANALOG)>;/* DCMI_D7 */
151                 };
152         };
153
154         ethernet0_rgmii_pins_a: rgmii-0 {
155                 pins1 {
156                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
157                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
158                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
159                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
160                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
161                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
162                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
163                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
164                         bias-disable;
165                         drive-push-pull;
166                         slew-rate = <2>;
167                 };
168                 pins2 {
169                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
170                         bias-disable;
171                         drive-push-pull;
172                         slew-rate = <0>;
173                 };
174                 pins3 {
175                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
176                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
177                                  <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
178                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
179                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
180                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
181                         bias-disable;
182                 };
183         };
184
185         ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
186                 pins1 {
187                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
188                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
189                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
190                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
191                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
192                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
193                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
194                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
195                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
196                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
197                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
198                                  <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
199                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
200                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
201                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
202                 };
203         };
204
205         ethernet0_rgmii_pins_b: rgmii-1 {
206                 pins1 {
207                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
208                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
209                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
210                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
211                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
212                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
213                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
214                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
215                         bias-disable;
216                         drive-push-pull;
217                         slew-rate = <2>;
218                 };
219                 pins2 {
220                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
221                         bias-disable;
222                         drive-push-pull;
223                         slew-rate = <0>;
224                 };
225                 pins3 {
226                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
227                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
228                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
229                                  <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
230                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
231                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
232                         bias-disable;
233                 };
234         };
235
236         ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
237                 pins1 {
238                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
239                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
240                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
241                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
242                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
243                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
244                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
245                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
246                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
247                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
248                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
249                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
250                                  <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
251                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
252                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
253                  };
254         };
255
256         ethernet0_rgmii_pins_c: rgmii-2 {
257                 pins1 {
258                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
259                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
260                                  <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
261                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
262                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
263                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
264                                  <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
265                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
266                         bias-disable;
267                         drive-push-pull;
268                         slew-rate = <2>;
269                 };
270                 pins2 {
271                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
272                         bias-disable;
273                         drive-push-pull;
274                         slew-rate = <0>;
275                 };
276                 pins3 {
277                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
278                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
279                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
280                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
281                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
282                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
283                         bias-disable;
284                 };
285         };
286
287         ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
288                 pins1 {
289                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
290                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
291                                  <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
292                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
293                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
294                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
295                                  <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
296                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
297                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
298                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
299                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
300                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
301                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
302                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
303                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
304                 };
305         };
306
307         ethernet0_rmii_pins_a: rmii-0 {
308                 pins1 {
309                         pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
310                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
311                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
312                                  <STM32_PINMUX('A', 1, AF0)>,   /* ETH1_RMII_REF_CLK */
313                                  <STM32_PINMUX('A', 2, AF11)>,  /* ETH1_MDIO */
314                                  <STM32_PINMUX('C', 1, AF11)>;  /* ETH1_MDC */
315                         bias-disable;
316                         drive-push-pull;
317                         slew-rate = <2>;
318                 };
319                 pins2 {
320                         pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
321                                  <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
322                                  <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
323                         bias-disable;
324                 };
325         };
326
327         ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
328                 pins1 {
329                         pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
330                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
331                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
332                                  <STM32_PINMUX('A', 2, ANALOG)>,  /* ETH1_MDIO */
333                                  <STM32_PINMUX('C', 1, ANALOG)>,  /* ETH1_MDC */
334                                  <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
335                                  <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
336                                  <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
337                                  <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
338                 };
339         };
340
341         ethernet0_rmii_pins_b: rmii-1 {
342                 pins1 {
343                         pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
344                                 <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
345                                 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
346                                 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
347                         bias-disable;
348                         drive-push-pull;
349                         slew-rate = <1>;
350                 };
351                 pins2 {
352                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
353                         bias-disable;
354                         drive-push-pull;
355                         slew-rate = <0>;
356                 };
357                 pins3 {
358                         pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
359                                 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
360                                 <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
361                         bias-disable;
362                 };
363                 pins4 {
364                         pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
365                 };
366         };
367
368         ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
369                 pins1 {
370                         pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
371                                 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
372                                 <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */
373                                 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
374                                 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
375                                 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
376                                 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
377                                 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
378                                 <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
379                 };
380         };
381
382         fmc_pins_a: fmc-0 {
383                 pins1 {
384                         pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
385                                  <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
386                                  <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
387                                  <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
388                                  <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
389                                  <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
390                                  <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
391                                  <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
392                                  <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
393                                  <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
394                                  <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
395                                  <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
396                                  <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
397                         bias-disable;
398                         drive-push-pull;
399                         slew-rate = <1>;
400                 };
401                 pins2 {
402                         pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
403                         bias-pull-up;
404                 };
405         };
406
407         fmc_sleep_pins_a: fmc-sleep-0 {
408                 pins {
409                         pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
410                                  <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
411                                  <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
412                                  <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
413                                  <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
414                                  <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
415                                  <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
416                                  <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
417                                  <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
418                                  <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
419                                  <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
420                                  <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
421                                  <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
422                                  <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
423                 };
424         };
425
426         fmc_pins_b: fmc-1 {
427                 pins {
428                         pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
429                                  <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
430                                  <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
431                                  <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
432                                  <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
433                                  <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
434                                  <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
435                                  <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
436                                  <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
437                                  <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
438                                  <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
439                                  <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
440                                  <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
441                                  <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
442                                  <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
443                                  <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
444                                  <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
445                                  <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
446                                  <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
447                                  <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
448                                  <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
449                         bias-disable;
450                         drive-push-pull;
451                         slew-rate = <3>;
452                 };
453         };
454
455         fmc_sleep_pins_b: fmc-sleep-1 {
456                 pins {
457                         pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
458                                  <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
459                                  <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
460                                  <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
461                                  <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
462                                  <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
463                                  <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
464                                  <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
465                                  <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
466                                  <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
467                                  <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
468                                  <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
469                                  <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
470                                  <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
471                                  <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
472                                  <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
473                                  <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
474                                  <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
475                                  <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
476                                  <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
477                                  <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
478                 };
479         };
480
481         i2c1_pins_a: i2c1-0 {
482                 pins {
483                         pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
484                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
485                         bias-disable;
486                         drive-open-drain;
487                         slew-rate = <0>;
488                 };
489         };
490
491         i2c1_sleep_pins_a: i2c1-sleep-0 {
492                 pins {
493                         pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
494                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
495                 };
496         };
497
498         i2c1_pins_b: i2c1-1 {
499                 pins {
500                         pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
501                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
502                         bias-disable;
503                         drive-open-drain;
504                         slew-rate = <0>;
505                 };
506         };
507
508         i2c1_sleep_pins_b: i2c1-sleep-1 {
509                 pins {
510                         pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
511                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
512                 };
513         };
514
515         i2c2_pins_a: i2c2-0 {
516                 pins {
517                         pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
518                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
519                         bias-disable;
520                         drive-open-drain;
521                         slew-rate = <0>;
522                 };
523         };
524
525         i2c2_sleep_pins_a: i2c2-sleep-0 {
526                 pins {
527                         pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
528                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
529                 };
530         };
531
532         i2c2_pins_b1: i2c2-1 {
533                 pins {
534                         pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
535                         bias-disable;
536                         drive-open-drain;
537                         slew-rate = <0>;
538                 };
539         };
540
541         i2c2_sleep_pins_b1: i2c2-sleep-1 {
542                 pins {
543                         pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
544                 };
545         };
546
547         i2c2_pins_c: i2c2-2 {
548                 pins {
549                         pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
550                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
551                         bias-disable;
552                         drive-open-drain;
553                         slew-rate = <0>;
554                 };
555         };
556
557         i2c2_pins_sleep_c: i2c2-sleep-2 {
558                 pins {
559                         pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
560                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
561                 };
562         };
563
564         i2c5_pins_a: i2c5-0 {
565                 pins {
566                         pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
567                                  <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
568                         bias-disable;
569                         drive-open-drain;
570                         slew-rate = <0>;
571                 };
572         };
573
574         i2c5_sleep_pins_a: i2c5-sleep-0 {
575                 pins {
576                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
577                                  <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
578
579                 };
580         };
581
582         i2c5_pins_b: i2c5-1 {
583                 pins {
584                         pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
585                                  <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
586                         bias-disable;
587                         drive-open-drain;
588                         slew-rate = <0>;
589                 };
590         };
591
592         i2c5_sleep_pins_b: i2c5-sleep-1 {
593                 pins {
594                         pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
595                                  <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
596                 };
597         };
598
599         i2s2_pins_a: i2s2-0 {
600                 pins {
601                         pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
602                                  <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
603                                  <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
604                         slew-rate = <1>;
605                         drive-push-pull;
606                         bias-disable;
607                 };
608         };
609
610         i2s2_sleep_pins_a: i2s2-sleep-0 {
611                 pins {
612                         pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
613                                  <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
614                                  <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
615                 };
616         };
617
618         ltdc_pins_a: ltdc-0 {
619                 pins {
620                         pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
621                                  <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
622                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
623                                  <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
624                                  <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
625                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
626                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
627                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
628                                  <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
629                                  <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
630                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
631                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
632                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
633                                  <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
634                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
635                                  <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
636                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
637                                  <STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
638                                  <STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
639                                  <STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
640                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
641                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
642                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
643                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
644                                  <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
645                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
646                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
647                                  <STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
648                         bias-disable;
649                         drive-push-pull;
650                         slew-rate = <1>;
651                 };
652         };
653
654         ltdc_sleep_pins_a: ltdc-sleep-0 {
655                 pins {
656                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
657                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
658                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
659                                  <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
660                                  <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
661                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
662                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
663                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
664                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
665                                  <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
666                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
667                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
668                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
669                                  <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
670                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
671                                  <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
672                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
673                                  <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
674                                  <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
675                                  <STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
676                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
677                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
678                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
679                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
680                                  <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
681                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
682                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
683                                  <STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
684                 };
685         };
686
687         ltdc_pins_b: ltdc-1 {
688                 pins {
689                         pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
690                                  <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
691                                  <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
692                                  <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
693                                  <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
694                                  <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
695                                  <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
696                                  <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
697                                  <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
698                                  <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
699                                  <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
700                                  <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
701                                  <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
702                                  <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
703                                  <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
704                                  <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
705                                  <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
706                                  <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
707                                  <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
708                                  <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
709                                  <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
710                                  <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
711                                  <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
712                                  <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
713                                  <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
714                                  <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
715                                  <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
716                                  <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
717                         bias-disable;
718                         drive-push-pull;
719                         slew-rate = <1>;
720                 };
721         };
722
723         ltdc_sleep_pins_b: ltdc-sleep-1 {
724                 pins {
725                         pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
726                                  <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
727                                  <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
728                                  <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
729                                  <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
730                                  <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
731                                  <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
732                                  <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
733                                  <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
734                                  <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
735                                  <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
736                                  <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
737                                  <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
738                                  <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
739                                  <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
740                                  <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
741                                  <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
742                                  <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
743                                  <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
744                                  <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
745                                  <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
746                                  <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
747                                  <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
748                                  <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
749                                  <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
750                                  <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
751                                  <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
752                                  <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
753                 };
754         };
755
756         ltdc_pins_c: ltdc-2 {
757                 pins1 {
758                         pinmux = <STM32_PINMUX('B',  1, AF9)>,  /* LTDC_R6 */
759                                  <STM32_PINMUX('B',  9, AF14)>, /* LTDC_B7 */
760                                  <STM32_PINMUX('C',  0, AF14)>, /* LTDC_R5 */
761                                  <STM32_PINMUX('D',  3, AF14)>, /* LTDC_G7 */
762                                  <STM32_PINMUX('D',  6, AF14)>, /* LTDC_B2 */
763                                  <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
764                                  <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
765                                  <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
766                                  <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
767                                  <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
768                                  <STM32_PINMUX('H',  4, AF9)>,  /* LTDC_G5 */
769                                  <STM32_PINMUX('H',  8, AF14)>, /* LTDC_R2 */
770                                  <STM32_PINMUX('H',  9, AF14)>, /* LTDC_R3 */
771                                  <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
772                                  <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
773                                  <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
774                                  <STM32_PINMUX('I',  1, AF14)>, /* LTDC_G6 */
775                                  <STM32_PINMUX('I',  5, AF14)>, /* LTDC_B5 */
776                                  <STM32_PINMUX('I',  6, AF14)>, /* LTDC_B6 */
777                                  <STM32_PINMUX('I',  9, AF14)>, /* LTDC_VSYNC */
778                                  <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
779                         bias-disable;
780                         drive-push-pull;
781                         slew-rate = <0>;
782                 };
783                 pins2 {
784                         pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
785                         bias-disable;
786                         drive-push-pull;
787                         slew-rate = <1>;
788                 };
789         };
790
791         ltdc_sleep_pins_c: ltdc-sleep-2 {
792                 pins1 {
793                         pinmux = <STM32_PINMUX('B', 1, ANALOG)>,  /* LTDC_R6 */
794                                  <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
795                                  <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
796                                  <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
797                                  <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
798                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
799                                  <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
800                                  <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
801                                  <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
802                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
803                                  <STM32_PINMUX('H', 4, ANALOG)>,  /* LTDC_G5 */
804                                  <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
805                                  <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
806                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
807                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
808                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
809                                  <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
810                                  <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
811                                  <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
812                                  <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
813                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
814                                  <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
815                 };
816         };
817
818         ltdc_pins_d: ltdc-3 {
819                 pins1 {
820                         pinmux = <STM32_PINMUX('G',  7, AF14)>; /* LCD_CLK */
821                         bias-disable;
822                         drive-push-pull;
823                         slew-rate = <3>;
824                 };
825                 pins2 {
826                         pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
827                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
828                                  <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
829                                  <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
830                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
831                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
832                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
833                                  <STM32_PINMUX('A',  5, AF14)>, /* LCD_R4 */
834                                  <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
835                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
836                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
837                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
838                                  <STM32_PINMUX('B',  0, AF14)>, /* LCD_G1 */
839                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
840                                  <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
841                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
842                                  <STM32_PINMUX('H',  4,  AF9)>, /* LCD_G5 */
843                                  <STM32_PINMUX('I', 11,  AF9)>, /* LCD_G6 */
844                                  <STM32_PINMUX('G',  8, AF14)>, /* LCD_G7 */
845                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
846                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
847                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
848                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
849                                  <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
850                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
851                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
852                                  <STM32_PINMUX('I',  7, AF14)>; /* LCD_B7 */
853                         bias-disable;
854                         drive-push-pull;
855                         slew-rate = <2>;
856                 };
857         };
858
859         ltdc_sleep_pins_d: ltdc-sleep-3 {
860                 pins {
861                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
862                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
863                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
864                                  <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
865                                  <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
866                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
867                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
868                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
869                                  <STM32_PINMUX('A',  5, ANALOG)>, /* LCD_R4 */
870                                  <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
871                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
872                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
873                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
874                                  <STM32_PINMUX('B',  0, ANALOG)>, /* LCD_G1 */
875                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
876                                  <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
877                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
878                                  <STM32_PINMUX('H',  4, ANALOG)>, /* LCD_G5 */
879                                  <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
880                                  <STM32_PINMUX('G',  8, ANALOG)>, /* LCD_G7 */
881                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
882                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
883                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
884                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
885                                  <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
886                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
887                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
888                                  <STM32_PINMUX('I',  7, ANALOG)>; /* LCD_B7 */
889                 };
890         };
891
892         m_can1_pins_a: m-can1-0 {
893                 pins1 {
894                         pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
895                         slew-rate = <1>;
896                         drive-push-pull;
897                         bias-disable;
898                 };
899                 pins2 {
900                         pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
901                         bias-disable;
902                 };
903         };
904
905         m_can1_sleep_pins_a: m_can1-sleep-0 {
906                 pins {
907                         pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
908                                  <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
909                 };
910         };
911
912         m_can1_pins_b: m-can1-1 {
913                 pins1 {
914                         pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
915                         slew-rate = <1>;
916                         drive-push-pull;
917                         bias-disable;
918                 };
919                 pins2 {
920                         pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
921                         bias-disable;
922                 };
923         };
924
925         m_can1_sleep_pins_b: m_can1-sleep-1 {
926                 pins {
927                         pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
928                                  <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
929                 };
930         };
931
932         m_can1_pins_c: m-can1-2 {
933                 pins1 {
934                         pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
935                         slew-rate = <1>;
936                         drive-push-pull;
937                         bias-disable;
938                 };
939                 pins2 {
940                         pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
941                         bias-disable;
942                 };
943         };
944
945         m_can1_sleep_pins_c: m_can1-sleep-2 {
946                 pins {
947                         pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
948                                  <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
949                 };
950         };
951
952         m_can2_pins_a: m-can2-0 {
953                 pins1 {
954                         pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
955                         slew-rate = <1>;
956                         drive-push-pull;
957                         bias-disable;
958                 };
959                 pins2 {
960                         pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
961                         bias-disable;
962                 };
963         };
964
965         m_can2_sleep_pins_a: m_can2-sleep-0 {
966                 pins {
967                         pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
968                                  <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
969                 };
970         };
971
972         pwm1_pins_a: pwm1-0 {
973                 pins {
974                         pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
975                                  <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
976                                  <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
977                         bias-pull-down;
978                         drive-push-pull;
979                         slew-rate = <0>;
980                 };
981         };
982
983         pwm1_sleep_pins_a: pwm1-sleep-0 {
984                 pins {
985                         pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
986                                  <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
987                                  <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
988                 };
989         };
990
991         pwm1_pins_b: pwm1-1 {
992                 pins {
993                         pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
994                         bias-pull-down;
995                         drive-push-pull;
996                         slew-rate = <0>;
997                 };
998         };
999
1000         pwm1_sleep_pins_b: pwm1-sleep-1 {
1001                 pins {
1002                         pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
1003                 };
1004         };
1005
1006         pwm2_pins_a: pwm2-0 {
1007                 pins {
1008                         pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
1009                         bias-pull-down;
1010                         drive-push-pull;
1011                         slew-rate = <0>;
1012                 };
1013         };
1014
1015         pwm2_sleep_pins_a: pwm2-sleep-0 {
1016                 pins {
1017                         pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
1018                 };
1019         };
1020
1021         pwm3_pins_a: pwm3-0 {
1022                 pins {
1023                         pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
1024                         bias-pull-down;
1025                         drive-push-pull;
1026                         slew-rate = <0>;
1027                 };
1028         };
1029
1030         pwm3_sleep_pins_a: pwm3-sleep-0 {
1031                 pins {
1032                         pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
1033                 };
1034         };
1035
1036         pwm3_pins_b: pwm3-1 {
1037                 pins {
1038                         pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
1039                         bias-disable;
1040                         drive-push-pull;
1041                         slew-rate = <0>;
1042                 };
1043         };
1044
1045         pwm3_sleep_pins_b: pwm3-sleep-1 {
1046                 pins {
1047                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
1048                 };
1049         };
1050
1051         pwm4_pins_a: pwm4-0 {
1052                 pins {
1053                         pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
1054                                  <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
1055                         bias-pull-down;
1056                         drive-push-pull;
1057                         slew-rate = <0>;
1058                 };
1059         };
1060
1061         pwm4_sleep_pins_a: pwm4-sleep-0 {
1062                 pins {
1063                         pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
1064                                  <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
1065                 };
1066         };
1067
1068         pwm4_pins_b: pwm4-1 {
1069                 pins {
1070                         pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
1071                         bias-pull-down;
1072                         drive-push-pull;
1073                         slew-rate = <0>;
1074                 };
1075         };
1076
1077         pwm4_sleep_pins_b: pwm4-sleep-1 {
1078                 pins {
1079                         pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
1080                 };
1081         };
1082
1083         pwm5_pins_a: pwm5-0 {
1084                 pins {
1085                         pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
1086                         bias-pull-down;
1087                         drive-push-pull;
1088                         slew-rate = <0>;
1089                 };
1090         };
1091
1092         pwm5_sleep_pins_a: pwm5-sleep-0 {
1093                 pins {
1094                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
1095                 };
1096         };
1097
1098         pwm5_pins_b: pwm5-1 {
1099                 pins {
1100                         pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
1101                                  <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
1102                                  <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
1103                         bias-disable;
1104                         drive-push-pull;
1105                         slew-rate = <0>;
1106                 };
1107         };
1108
1109         pwm5_sleep_pins_b: pwm5-sleep-1 {
1110                 pins {
1111                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
1112                                  <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
1113                                  <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
1114                 };
1115         };
1116
1117         pwm8_pins_a: pwm8-0 {
1118                 pins {
1119                         pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
1120                         bias-pull-down;
1121                         drive-push-pull;
1122                         slew-rate = <0>;
1123                 };
1124         };
1125
1126         pwm8_sleep_pins_a: pwm8-sleep-0 {
1127                 pins {
1128                         pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
1129                 };
1130         };
1131
1132         pwm12_pins_a: pwm12-0 {
1133                 pins {
1134                         pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1135                         bias-pull-down;
1136                         drive-push-pull;
1137                         slew-rate = <0>;
1138                 };
1139         };
1140
1141         pwm12_sleep_pins_a: pwm12-sleep-0 {
1142                 pins {
1143                         pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1144                 };
1145         };
1146
1147         qspi_clk_pins_a: qspi-clk-0 {
1148                 pins {
1149                         pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
1150                         bias-disable;
1151                         drive-push-pull;
1152                         slew-rate = <3>;
1153                 };
1154         };
1155
1156         qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1157                 pins {
1158                         pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
1159                 };
1160         };
1161
1162         qspi_bk1_pins_a: qspi-bk1-0 {
1163                 pins1 {
1164                         pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1165                                  <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
1166                                  <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
1167                                  <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
1168                         bias-disable;
1169                         drive-push-pull;
1170                         slew-rate = <1>;
1171                 };
1172                 pins2 {
1173                         pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1174                         bias-pull-up;
1175                         drive-push-pull;
1176                         slew-rate = <1>;
1177                 };
1178         };
1179
1180         qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1181                 pins {
1182                         pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1183                                  <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
1184                                  <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
1185                                  <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
1186                                  <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1187                 };
1188         };
1189
1190         qspi_bk2_pins_a: qspi-bk2-0 {
1191                 pins1 {
1192                         pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1193                                  <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
1194                                  <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
1195                                  <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1196                         bias-disable;
1197                         drive-push-pull;
1198                         slew-rate = <1>;
1199                 };
1200                 pins2 {
1201                         pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1202                         bias-pull-up;
1203                         drive-push-pull;
1204                         slew-rate = <1>;
1205                 };
1206         };
1207
1208         qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1209                 pins {
1210                         pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1211                                  <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
1212                                  <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
1213                                  <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
1214                                  <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1215                 };
1216         };
1217
1218         sai2a_pins_a: sai2a-0 {
1219                 pins {
1220                         pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1221                                  <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1222                                  <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1223                                  <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1224                         slew-rate = <0>;
1225                         drive-push-pull;
1226                         bias-disable;
1227                 };
1228         };
1229
1230         sai2a_sleep_pins_a: sai2a-sleep-0 {
1231                 pins {
1232                         pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1233                                  <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1234                                  <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1235                                  <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1236                 };
1237         };
1238
1239         sai2a_pins_b: sai2a-1 {
1240                 pins1 {
1241                         pinmux = <STM32_PINMUX('I', 6, AF10)>,  /* SAI2_SD_A */
1242                                  <STM32_PINMUX('I', 7, AF10)>,  /* SAI2_FS_A */
1243                                  <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1244                         slew-rate = <0>;
1245                         drive-push-pull;
1246                         bias-disable;
1247                 };
1248         };
1249
1250         sai2a_sleep_pins_b: sai2a-sleep-1 {
1251                 pins {
1252                         pinmux = <STM32_PINMUX('I', 6, ANALOG)>,  /* SAI2_SD_A */
1253                                  <STM32_PINMUX('I', 7, ANALOG)>,  /* SAI2_FS_A */
1254                                  <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1255                 };
1256         };
1257
1258         sai2a_pins_c: sai2a-2 {
1259                 pins {
1260                         pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1261                                  <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
1262                                  <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
1263                         slew-rate = <0>;
1264                         drive-push-pull;
1265                         bias-disable;
1266                 };
1267         };
1268
1269         sai2a_sleep_pins_c: sai2a-sleep-2 {
1270                 pins {
1271                         pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1272                                  <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
1273                                  <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
1274                 };
1275         };
1276
1277         sai2b_pins_a: sai2b-0 {
1278                 pins1 {
1279                         pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1280                                  <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1281                                  <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1282                         slew-rate = <0>;
1283                         drive-push-pull;
1284                         bias-disable;
1285                 };
1286                 pins2 {
1287                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1288                         bias-disable;
1289                 };
1290         };
1291
1292         sai2b_sleep_pins_a: sai2b-sleep-0 {
1293                 pins {
1294                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1295                                  <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1296                                  <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1297                                  <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1298                 };
1299         };
1300
1301         sai2b_pins_b: sai2b-1 {
1302                 pins {
1303                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1304                         bias-disable;
1305                 };
1306         };
1307
1308         sai2b_sleep_pins_b: sai2b-sleep-1 {
1309                 pins {
1310                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1311                 };
1312         };
1313
1314         sai2b_pins_c: sai2b-2 {
1315                 pins1 {
1316                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1317                         bias-disable;
1318                 };
1319         };
1320
1321         sai2b_sleep_pins_c: sai2b-sleep-2 {
1322                 pins {
1323                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1324                 };
1325         };
1326
1327         sai4a_pins_a: sai4a-0 {
1328                 pins {
1329                         pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1330                         slew-rate = <0>;
1331                         drive-push-pull;
1332                         bias-disable;
1333                 };
1334         };
1335
1336         sai4a_sleep_pins_a: sai4a-sleep-0 {
1337                 pins {
1338                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1339                 };
1340         };
1341
1342         sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1343                 pins1 {
1344                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1345                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1346                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1347                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1348                                  <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1349                         slew-rate = <1>;
1350                         drive-push-pull;
1351                         bias-disable;
1352                 };
1353                 pins2 {
1354                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1355                         slew-rate = <2>;
1356                         drive-push-pull;
1357                         bias-disable;
1358                 };
1359         };
1360
1361         sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1362                 pins1 {
1363                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1364                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1365                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1366                                  <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1367                         slew-rate = <1>;
1368                         drive-push-pull;
1369                         bias-disable;
1370                 };
1371                 pins2 {
1372                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1373                         slew-rate = <2>;
1374                         drive-push-pull;
1375                         bias-disable;
1376                 };
1377                 pins3 {
1378                         pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1379                         slew-rate = <1>;
1380                         drive-open-drain;
1381                         bias-disable;
1382                 };
1383         };
1384
1385         sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
1386                 pins1 {
1387                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1388                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1389                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1390                                  <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1391                         slew-rate = <1>;
1392                         drive-push-pull;
1393                         bias-disable;
1394                 };
1395         };
1396
1397         sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1398                 pins {
1399                         pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1400                                  <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1401                                  <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1402                                  <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1403                                  <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1404                                  <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1405                 };
1406         };
1407
1408         sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1409                 pins1 {
1410                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1411                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1412                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1413                         slew-rate = <1>;
1414                         drive-push-pull;
1415                         bias-pull-up;
1416                 };
1417                 pins2{
1418                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1419                         bias-pull-up;
1420                 };
1421         };
1422
1423         sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
1424                 pins1 {
1425                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1426                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1427                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1428                         slew-rate = <1>;
1429                         drive-push-pull;
1430                         bias-pull-up;
1431                 };
1432         };
1433
1434         sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1435                 pins {
1436                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1437                                  <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
1438                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1439                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1440                 };
1441         };
1442
1443         sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1444                 pins1 {
1445                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1446                                  <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
1447                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1448                         slew-rate = <1>;
1449                         drive-push-pull;
1450                         bias-pull-up;
1451                 };
1452                 pins2{
1453                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1454                         bias-pull-up;
1455                 };
1456         };
1457
1458         sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1459                 pins {
1460                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1461                                  <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
1462                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1463                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1464                 };
1465         };
1466
1467         sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1468                 pins1 {
1469                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1470                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1471                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1472                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1473                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1474                         slew-rate = <1>;
1475                         drive-push-pull;
1476                         bias-pull-up;
1477                 };
1478                 pins2 {
1479                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1480                         slew-rate = <2>;
1481                         drive-push-pull;
1482                         bias-pull-up;
1483                 };
1484         };
1485
1486         sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1487                 pins1 {
1488                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1489                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1490                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1491                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1492                         slew-rate = <1>;
1493                         drive-push-pull;
1494                         bias-pull-up;
1495                 };
1496                 pins2 {
1497                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1498                         slew-rate = <2>;
1499                         drive-push-pull;
1500                         bias-pull-up;
1501                 };
1502                 pins3 {
1503                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1504                         slew-rate = <1>;
1505                         drive-open-drain;
1506                         bias-pull-up;
1507                 };
1508         };
1509
1510         sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1511                 pins {
1512                         pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1513                                  <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
1514                                  <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
1515                                  <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
1516                                  <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
1517                                  <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
1518                 };
1519         };
1520
1521         sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1522                 pins1 {
1523                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1524                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1525                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1526                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1527                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1528                         slew-rate = <1>;
1529                         drive-push-pull;
1530                         bias-disable;
1531                 };
1532                 pins2 {
1533                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1534                         slew-rate = <2>;
1535                         drive-push-pull;
1536                         bias-disable;
1537                 };
1538         };
1539
1540         sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1541                 pins1 {
1542                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1543                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1544                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1545                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1546                         slew-rate = <1>;
1547                         drive-push-pull;
1548                         bias-disable;
1549                 };
1550                 pins2 {
1551                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1552                         slew-rate = <2>;
1553                         drive-push-pull;
1554                         bias-disable;
1555                 };
1556                 pins3 {
1557                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1558                         slew-rate = <1>;
1559                         drive-open-drain;
1560                         bias-disable;
1561                 };
1562         };
1563
1564         sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1565                 pins {
1566                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1567                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1568                                  <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1569                                  <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
1570                         slew-rate = <1>;
1571                         drive-push-pull;
1572                         bias-pull-up;
1573                 };
1574         };
1575
1576         sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1577                 pins {
1578                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1579                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1580                                  <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1581                                  <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
1582                 };
1583         };
1584
1585         sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1586                 pins {
1587                         pinmux = <STM32_PINMUX('A', 8, AF9)>,  /* SDMMC2_D4 */
1588                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1589                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1590                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1591                         slew-rate = <1>;
1592                         drive-push-pull;
1593                         bias-disable;
1594                 };
1595         };
1596
1597         sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1598                 pins {
1599                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1600                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1601                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1602                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1603                 };
1604         };
1605
1606         sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1607                 pins {
1608                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1609                                  <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
1610                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1611                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1612                         slew-rate = <1>;
1613                         drive-push-pull;
1614                         bias-pull-up;
1615                 };
1616         };
1617
1618         sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
1619                 pins {
1620                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1621                                  <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
1622                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1623                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1624                 };
1625         };
1626
1627         sdmmc2_d47_pins_d: sdmmc2-d47-3 {
1628                 pins {
1629                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1630                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1631                                  <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1632                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1633                 };
1634         };
1635
1636         sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
1637                 pins {
1638                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1639                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1640                                  <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1641                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1642                 };
1643         };
1644
1645         sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1646                 pins1 {
1647                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1648                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1649                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1650                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1651                                  <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
1652                         slew-rate = <1>;
1653                         drive-push-pull;
1654                         bias-pull-up;
1655                 };
1656                 pins2 {
1657                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1658                         slew-rate = <2>;
1659                         drive-push-pull;
1660                         bias-pull-up;
1661                 };
1662         };
1663
1664         sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1665                 pins1 {
1666                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1667                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1668                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1669                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1670                         slew-rate = <1>;
1671                         drive-push-pull;
1672                         bias-pull-up;
1673                 };
1674                 pins2 {
1675                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1676                         slew-rate = <2>;
1677                         drive-push-pull;
1678                         bias-pull-up;
1679                 };
1680                 pins3 {
1681                         pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1682                         slew-rate = <1>;
1683                         drive-open-drain;
1684                         bias-pull-up;
1685                 };
1686         };
1687
1688         sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1689                 pins {
1690                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1691                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1692                                  <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
1693                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1694                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1695                                  <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
1696                 };
1697         };
1698
1699         sdmmc3_b4_pins_b: sdmmc3-b4-1 {
1700                 pins1 {
1701                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1702                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1703                                  <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1704                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1705                                  <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
1706                         slew-rate = <1>;
1707                         drive-push-pull;
1708                         bias-pull-up;
1709                 };
1710                 pins2 {
1711                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1712                         slew-rate = <2>;
1713                         drive-push-pull;
1714                         bias-pull-up;
1715                 };
1716         };
1717
1718         sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
1719                 pins1 {
1720                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1721                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1722                                  <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1723                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1724                         slew-rate = <1>;
1725                         drive-push-pull;
1726                         bias-pull-up;
1727                 };
1728                 pins2 {
1729                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1730                         slew-rate = <2>;
1731                         drive-push-pull;
1732                         bias-pull-up;
1733                 };
1734                 pins3 {
1735                         pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
1736                         slew-rate = <1>;
1737                         drive-open-drain;
1738                         bias-pull-up;
1739                 };
1740         };
1741
1742         sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
1743                 pins {
1744                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1745                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1746                                  <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
1747                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1748                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1749                                  <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
1750                 };
1751         };
1752
1753         spdifrx_pins_a: spdifrx-0 {
1754                 pins {
1755                         pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1756                         bias-disable;
1757                 };
1758         };
1759
1760         spdifrx_sleep_pins_a: spdifrx-sleep-0 {
1761                 pins {
1762                         pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1763                 };
1764         };
1765
1766         spi2_pins_a: spi2-0 {
1767                 pins1 {
1768                         pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */
1769                                  <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
1770                         bias-disable;
1771                         drive-push-pull;
1772                         slew-rate = <1>;
1773                 };
1774
1775                 pins2 {
1776                         pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
1777                         bias-disable;
1778                 };
1779         };
1780
1781         spi4_pins_a: spi4-0 {
1782                 pins {
1783                         pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
1784                                  <STM32_PINMUX('E', 6, AF5)>;  /* SPI4_MOSI */
1785                         bias-disable;
1786                         drive-push-pull;
1787                         slew-rate = <1>;
1788                 };
1789                 pins2 {
1790                         pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
1791                         bias-disable;
1792                 };
1793         };
1794
1795         stusb1600_pins_a: stusb1600-0 {
1796                 pins {
1797                         pinmux = <STM32_PINMUX('I', 11, GPIO)>;
1798                         bias-pull-up;
1799                 };
1800         };
1801
1802         uart4_pins_a: uart4-0 {
1803                 pins1 {
1804                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1805                         bias-disable;
1806                         drive-push-pull;
1807                         slew-rate = <0>;
1808                 };
1809                 pins2 {
1810                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1811                         bias-disable;
1812                 };
1813         };
1814
1815         uart4_idle_pins_a: uart4-idle-0 {
1816                 pins1 {
1817                         pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
1818                 };
1819                 pins2 {
1820                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1821                         bias-disable;
1822                 };
1823         };
1824
1825         uart4_sleep_pins_a: uart4-sleep-0 {
1826                 pins {
1827                         pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
1828                                  <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
1829                 };
1830         };
1831
1832         uart4_pins_b: uart4-1 {
1833                 pins1 {
1834                         pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1835                         bias-disable;
1836                         drive-push-pull;
1837                         slew-rate = <0>;
1838                 };
1839                 pins2 {
1840                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1841                         bias-disable;
1842                 };
1843         };
1844
1845         uart4_pins_c: uart4-2 {
1846                 pins1 {
1847                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1848                         bias-disable;
1849                         drive-push-pull;
1850                         slew-rate = <0>;
1851                 };
1852                 pins2 {
1853                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1854                         bias-disable;
1855                 };
1856         };
1857
1858         uart4_pins_d: uart4-3 {
1859                 pins1 {
1860                         pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
1861                         bias-disable;
1862                         drive-push-pull;
1863                         slew-rate = <0>;
1864                 };
1865                 pins2 {
1866                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1867                         bias-disable;
1868                 };
1869         };
1870
1871         uart4_idle_pins_d: uart4-idle-3 {
1872                 pins1 {
1873                         pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
1874                 };
1875                 pins2 {
1876                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1877                         bias-disable;
1878                 };
1879         };
1880
1881         uart4_sleep_pins_d: uart4-sleep-3 {
1882                 pins {
1883                         pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
1884                                  <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
1885                 };
1886         };
1887
1888         uart5_pins_a: uart5-0 {
1889                 pins1 {
1890                         pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
1891                         bias-disable;
1892                         drive-push-pull;
1893                         slew-rate = <0>;
1894                 };
1895                 pins2 {
1896                         pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
1897                         bias-disable;
1898                 };
1899         };
1900
1901         uart7_pins_a: uart7-0 {
1902                 pins1 {
1903                         pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
1904                         bias-disable;
1905                         drive-push-pull;
1906                         slew-rate = <0>;
1907                 };
1908                 pins2 {
1909                         pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
1910                                  <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
1911                                  <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
1912                         bias-disable;
1913                 };
1914         };
1915
1916         uart7_pins_b: uart7-1 {
1917                 pins1 {
1918                         pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
1919                         bias-disable;
1920                         drive-push-pull;
1921                         slew-rate = <0>;
1922                 };
1923                 pins2 {
1924                         pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
1925                         bias-disable;
1926                 };
1927         };
1928
1929         uart7_pins_c: uart7-2 {
1930                 pins1 {
1931                         pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
1932                         bias-disable;
1933                         drive-push-pull;
1934                         slew-rate = <0>;
1935                 };
1936                 pins2 {
1937                         pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
1938                         bias-pull-up;
1939                 };
1940         };
1941
1942         uart7_idle_pins_c: uart7-idle-2 {
1943                 pins1 {
1944                         pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
1945                 };
1946                 pins2 {
1947                         pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
1948                         bias-pull-up;
1949                 };
1950         };
1951
1952         uart7_sleep_pins_c: uart7-sleep-2 {
1953                 pins {
1954                         pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
1955                                  <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
1956                 };
1957         };
1958
1959         uart8_pins_a: uart8-0 {
1960                 pins1 {
1961                         pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
1962                         bias-disable;
1963                         drive-push-pull;
1964                         slew-rate = <0>;
1965                 };
1966                 pins2 {
1967                         pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
1968                         bias-disable;
1969                 };
1970         };
1971
1972         uart8_rtscts_pins_a: uart8rtscts-0 {
1973                 pins {
1974                         pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
1975                                  <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */
1976                         bias-disable;
1977                 };
1978         };
1979
1980         usart2_pins_a: usart2-0 {
1981                 pins1 {
1982                         pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1983                                  <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
1984                         bias-disable;
1985                         drive-push-pull;
1986                         slew-rate = <0>;
1987                 };
1988                 pins2 {
1989                         pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
1990                                  <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
1991                         bias-disable;
1992                 };
1993         };
1994
1995         usart2_sleep_pins_a: usart2-sleep-0 {
1996                 pins {
1997                         pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1998                                  <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
1999                                  <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2000                                  <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2001                 };
2002         };
2003
2004         usart2_pins_b: usart2-1 {
2005                 pins1 {
2006                         pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2007                                  <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
2008                         bias-disable;
2009                         drive-push-pull;
2010                         slew-rate = <0>;
2011                 };
2012                 pins2 {
2013                         pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
2014                                  <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
2015                         bias-disable;
2016                 };
2017         };
2018
2019         usart2_sleep_pins_b: usart2-sleep-1 {
2020                 pins {
2021                         pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2022                                  <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
2023                                  <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
2024                                  <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
2025                 };
2026         };
2027
2028         usart2_pins_c: usart2-2 {
2029                 pins1 {
2030                         pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
2031                                  <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2032                         bias-disable;
2033                         drive-push-pull;
2034                         slew-rate = <3>;
2035                 };
2036                 pins2 {
2037                         pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2038                                  <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2039                         bias-disable;
2040                 };
2041         };
2042
2043         usart2_idle_pins_c: usart2-idle-2 {
2044                 pins1 {
2045                         pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2046                                  <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2047                 };
2048                 pins2 {
2049                         pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2050                         bias-disable;
2051                         drive-push-pull;
2052                         slew-rate = <3>;
2053                 };
2054                 pins3 {
2055                         pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
2056                         bias-disable;
2057                 };
2058         };
2059
2060         usart2_sleep_pins_c: usart2-sleep-2 {
2061                 pins {
2062                         pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2063                                  <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2064                                  <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2065                                  <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2066                 };
2067         };
2068
2069         usart3_pins_a: usart3-0 {
2070                 pins1 {
2071                         pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
2072                         bias-disable;
2073                         drive-push-pull;
2074                         slew-rate = <0>;
2075                 };
2076                 pins2 {
2077                         pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2078                         bias-disable;
2079                 };
2080         };
2081
2082         usart3_pins_b: usart3-1 {
2083                 pins1 {
2084                         pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2085                                  <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2086                         bias-disable;
2087                         drive-push-pull;
2088                         slew-rate = <0>;
2089                 };
2090                 pins2 {
2091                         pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2092                                  <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
2093                         bias-pull-up;
2094                 };
2095         };
2096
2097         usart3_idle_pins_b: usart3-idle-1 {
2098                 pins1 {
2099                         pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2100                                  <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
2101                 };
2102                 pins2 {
2103                         pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2104                         bias-disable;
2105                         drive-push-pull;
2106                         slew-rate = <0>;
2107                 };
2108                 pins3 {
2109                         pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2110                         bias-pull-up;
2111                 };
2112         };
2113
2114         usart3_sleep_pins_b: usart3-sleep-1 {
2115                 pins {
2116                         pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2117                                  <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2118                                  <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */
2119                                  <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2120                 };
2121         };
2122
2123         usart3_pins_c: usart3-2 {
2124                 pins1 {
2125                         pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2126                                  <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2127                         bias-disable;
2128                         drive-push-pull;
2129                         slew-rate = <0>;
2130                 };
2131                 pins2 {
2132                         pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2133                                  <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
2134                         bias-pull-up;
2135                 };
2136         };
2137
2138         usart3_idle_pins_c: usart3-idle-2 {
2139                 pins1 {
2140                         pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2141                                  <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
2142                 };
2143                 pins2 {
2144                         pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2145                         bias-disable;
2146                         drive-push-pull;
2147                         slew-rate = <0>;
2148                 };
2149                 pins3 {
2150                         pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2151                         bias-pull-up;
2152                 };
2153         };
2154
2155         usart3_sleep_pins_c: usart3-sleep-2 {
2156                 pins {
2157                         pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2158                                  <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2159                                  <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
2160                                  <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2161                 };
2162         };
2163
2164         usart3_pins_d: usart3-3 {
2165                 pins1 {
2166                         pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2167                                  <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2168                         bias-disable;
2169                         drive-push-pull;
2170                         slew-rate = <0>;
2171                 };
2172                 pins2 {
2173                         pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
2174                                  <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2175                         bias-disable;
2176                 };
2177         };
2178
2179         usart3_idle_pins_d: usart3-idle-3 {
2180                 pins1 {
2181                         pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2182                                  <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2183                                  <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
2184                 };
2185                 pins2 {
2186                         pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
2187                         bias-disable;
2188                 };
2189         };
2190
2191         usart3_sleep_pins_d: usart3-sleep-3 {
2192                 pins {
2193                         pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2194                                  <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2195                                  <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
2196                                  <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */
2197                 };
2198         };
2199
2200         usart3_pins_e: usart3-4 {
2201                 pins1 {
2202                         pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2203                                  <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2204                         bias-disable;
2205                         drive-push-pull;
2206                         slew-rate = <0>;
2207                 };
2208                 pins2 {
2209                         pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
2210                                  <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2211                         bias-pull-up;
2212                 };
2213         };
2214
2215         usart3_idle_pins_e: usart3-idle-4 {
2216                 pins1 {
2217                         pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2218                                  <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
2219                 };
2220                 pins2 {
2221                         pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2222                         bias-disable;
2223                         drive-push-pull;
2224                         slew-rate = <0>;
2225                 };
2226                 pins3 {
2227                         pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
2228                         bias-pull-up;
2229                 };
2230         };
2231
2232         usart3_sleep_pins_e: usart3-sleep-4 {
2233                 pins {
2234                         pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2235                                  <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2236                                  <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
2237                                  <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */
2238                 };
2239         };
2240
2241         usbotg_hs_pins_a: usbotg-hs-0 {
2242                 pins {
2243                         pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
2244                 };
2245         };
2246
2247         usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
2248                 pins {
2249                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
2250                                  <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
2251                 };
2252         };
2253 };
2254
2255 &pinctrl_z {
2256         i2c2_pins_b2: i2c2-0 {
2257                 pins {
2258                         pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
2259                         bias-disable;
2260                         drive-open-drain;
2261                         slew-rate = <0>;
2262                 };
2263         };
2264
2265         i2c2_sleep_pins_b2: i2c2-sleep-0 {
2266                 pins {
2267                         pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
2268                 };
2269         };
2270
2271         i2c4_pins_a: i2c4-0 {
2272                 pins {
2273                         pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
2274                                  <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
2275                         bias-disable;
2276                         drive-open-drain;
2277                         slew-rate = <0>;
2278                 };
2279         };
2280
2281         i2c4_sleep_pins_a: i2c4-sleep-0 {
2282                 pins {
2283                         pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
2284                                  <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
2285                 };
2286         };
2287
2288         i2c6_pins_a: i2c6-0 {
2289                 pins {
2290                         pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
2291                                  <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
2292                         bias-disable;
2293                         drive-open-drain;
2294                         slew-rate = <0>;
2295                 };
2296         };
2297
2298         i2c6_sleep_pins_a: i2c6-sleep-0 {
2299                 pins {
2300                         pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
2301                                  <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
2302                 };
2303         };
2304
2305         spi1_pins_a: spi1-0 {
2306                 pins1 {
2307                         pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
2308                                  <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
2309                         bias-disable;
2310                         drive-push-pull;
2311                         slew-rate = <1>;
2312                 };
2313
2314                 pins2 {
2315                         pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
2316                         bias-disable;
2317                 };
2318         };
2319 };