arch/arm/dts/socfpga_cyclone5_sr1500.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015 Stefan Roese <sr@denx.de>
   4  */
   5
   6 #include "socfpga_cyclone5.dtsi"
   7
   8 / {
   9         model = "SoCFPGA Cyclone V SR1500";
  10         compatible = "anonymous,socfpga-sr1500", "altr,socfpga-cyclone5", "altr,socfpga";
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,115200";
  14                 stdout-path = "serial0:115200n8";
  15         };
  16
  17         aliases {
  18                 /*
  19                  * This allows the ethaddr uboot environment variable
  20                  * contents to be added to the gmac1 device tree blob.
  21                  */
  22                 ethernet0 = &gmac1;
  23         };
  24
  25         memory@0 {
  26                 name = "memory";
  27                 device_type = "memory";
  28                 reg = <0x0 0x40000000>; /* 1GB */
  29         };
  30
  31         soc {
  32                 u-boot,dm-pre-reloc;
  33         };
  34 };
  35
  36 &gmac1 {
  37         status = "okay";
  38         phy-mode = "rgmii";
  39 };
  40
  41 &gpio0 {
  42         status = "okay";
  43 };
  44
  45 &gpio1 {
  46         status = "okay";
  47 };
  48
  49 &gpio2 {
  50         status = "okay";
  51 };
  52
  53 &i2c0 {
  54         status = "okay";
  55         speed-mode = <0>;
  56 };
  57
  58 &i2c1 {
  59         status = "okay";
  60         speed-mode = <0>;
  61 };
  62
  63 &mmc0 {
  64         status = "okay";
  65         bus-width = <8>;
  66         u-boot,dm-pre-reloc;
  67 };
  68
  69 &uart0 {
  70         status = "okay";
  71         u-boot,dm-pre-reloc;
  72 };
  73
  74 &usb1 {
  75         status = "okay";
  76 };
  77
  78 &watchdog0 {
  79         status = "okay";
  80 };
  81
  82 &qspi {
  83         status = "okay";
  84         u-boot,dm-pre-reloc;
  85
  86         flash0: n25q00@0 {
  87                 u-boot,dm-pre-reloc;
  88                 #address-cells = <1>;
  89                 #size-cells = <1>;
  90                 compatible = "n25q00", "spi-flash";
  91                 reg = <0>;      /* chip select */
  92                 spi-max-frequency = <100000000>;
  93                 m25p,fast-read;
  94                 page-size = <256>;
  95                 block-size = <16>; /* 2^16, 64KB */
  96                 cdns,tshsl-ns = <50>;
  97                 cdns,tsd2d-ns = <50>;
  98                 cdns,tchsh-ns = <4>;
  99                 cdns,tslch-ns = <4>;
 100         };
 101 };