a18d16856b4912666fbdb9abacc269d65084bb77
[platform/kernel/u-boot.git] / arch / arm / dts / socfpga_cyclone5_socrates.dts
1 /*
2  *  Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include "socfpga_cyclone5.dtsi"
8
9 / {
10         model = "EBV SOCrates";
11         compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
12
13         chosen {
14                 bootargs = "console=ttyS0,115200";
15         };
16
17         memory {
18                 name = "memory";
19                 device_type = "memory";
20                 reg = <0x0 0x40000000>; /* 1GB */
21         };
22
23         soc {
24                 u-boot,dm-pre-reloc;
25         };
26 };
27
28 &gmac1 {
29         status = "okay";
30         phy-mode = "rgmii";
31
32         rxd0-skew-ps = <0>;
33         rxd1-skew-ps = <0>;
34         rxd2-skew-ps = <0>;
35         rxd3-skew-ps = <0>;
36         txen-skew-ps = <0>;
37         txc-skew-ps = <2600>;
38         rxdv-skew-ps = <0>;
39         rxc-skew-ps = <2000>;
40 };
41
42 &i2c0 {
43         status = "okay";
44
45         rtc: rtc@68 {
46                 compatible = "stm,m41t82";
47                 reg = <0x68>;
48         };
49 };
50
51 &mmc0 {
52         status = "okay";
53         u-boot,dm-pre-reloc;
54 };
55
56 &qspi {
57         status = "okay";
58
59         flash0: n25q00@0 {
60                 #address-cells = <1>;
61                 #size-cells = <1>;
62                 compatible = "n25q00";
63                 reg = <0>;      /* chip select */
64                 spi-max-frequency = <50000000>;
65                 m25p,fast-read;
66                 page-size = <256>;
67                 block-size = <16>; /* 2^16, 64KB */
68                 read-delay = <4>;  /* delay value in read data capture register */
69                 tshsl-ns = <50>;
70                 tsd2d-ns = <50>;
71                 tchsh-ns = <4>;
72                 tslch-ns = <4>;
73         };
74 };