arch/arm/dts/sama7g5ek.dts

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 /*
   3  * sama7g5ek.dts - Device Tree file for SAMA7G5 EK
   4  *                 SAMA7G5 Evaluation Kit
   5  *
   6  *  Copyright (c) 2020, Microchip Technology Inc.
   7  *                2020, Eugen Hristev <eugen.hristev@microchip.com>
   8  *                2020, Claudiu Beznea <claudiu.beznea@microchip.com>
   9  */
  10 /dts-v1/;
  11 #include <dt-bindings/mfd/atmel-flexcom.h>
  12 #include "sama7g5.dtsi"
  13 #include "sama7g5-pinfunc.h"
  14 #include <dt-bindings/pinctrl/at91.h>
  15
  16 / {
  17         model = "Microchip SAMA7G5 Evaluation Kit";
  18         compatible = "microchip,sama7g5ek", "microchip,sama7g54", "microchip,sama7g5", "microchip,sama7";
  19
  20         aliases {
  21                 serial0 = &uart0;
  22                 i2c0 = &i2c1;
  23                 i2c1 = &i2c8;
  24         };
  25
  26         chosen {
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         clocks {
  31                 slow_xtal: slow_xtal {
  32                         clock-frequency = <32768>;
  33                 };
  34
  35                 main_xtal: main_xtal {
  36                         clock-frequency = <24000000>;
  37                 };
  38         };
  39
  40         ahb {
  41
  42                 apb {
  43                         sdmmc0: sdio-host@e1204000 {
  44                                 bus-width = <8>;
  45                                 non-removable;
  46                                 pinctrl-names = "default";
  47                                 pinctrl-0 = <&pinctrl_sdmmc0_cmd_data_default
  48                                              &pinctrl_sdmmc0_ck_rstn_ds_cd_default>;
  49                                 status = "okay";
  50                         };
  51
  52                         sdmmc1: sdio-host@e1208000 {
  53                                 bus-width = <4>;
  54                                 pinctrl-names = "default";
  55                                 pinctrl-0 = <&pinctrl_sdmmc1_cmd_data_default
  56                                              &pinctrl_sdmmc1_ck_cd_rstn_vddsel_default>;
  57                                 status = "okay";
  58                         };
  59
  60                         uart0: serial@e1824200 {
  61                                 pinctrl-names = "default";
  62                                 pinctrl-0 = <&pinctrl_flx3_default>;
  63                                 status = "okay";
  64                         };
  65                 };
  66         };
  67 };
  68
  69 &qspi0 {
  70         pinctrl-names = "default";
  71         pinctrl-0 = <&pinctrl_qspi>;
  72         status = "okay";
  73
  74         flash@0 {
  75                 #address-cells = <1>;
  76                 #size-cells = <1>;
  77                 compatible = "jedec,spi-nor";
  78                 reg = <0>;
  79                 spi-max-frequency = <133000000>;
  80                 spi-tx-bus-width = <8>;
  81                 spi-rx-bus-width = <8>;
  82                 m25p,fast-read;
  83
  84         };
  85 };
  86
  87 &flx1 {
  88         atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
  89         status = "okay";
  90 };
  91
  92 &i2c1 {
  93         pinctrl-names = "default";
  94         pinctrl-0 = <&pinctrl_flx1_default>;
  95         status = "okay";
  96 };
  97
  98 &flx8 {
  99         atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
 100         status = "okay";
 101
 102         i2c8: i2c@600 {
 103                 pinctrl-names = "default";
 104                 pinctrl-0 = <&pinctrl_i2c8_default>;
 105                 i2c-analog-filter;
 106                 i2c-digital-filter;
 107                 i2c-digital-filter-width-ns = <35>;
 108                 status = "okay";
 109
 110                 eeprom@52 {
 111                         compatible = "microchip,24aa02e48";
 112                         reg = <0x52>;
 113                         pagesize = <16>;
 114                 };
 115
 116                 eeprom@53 {
 117                         compatible = "microchip,24aa02e48";
 118                         reg = <0x53>;
 119                         pagesize = <16>;
 120                 };
 121         };
 122 };
 123
 124 &gmac0 {
 125         #address-cells = <1>;
 126         #size-cells = <0>;
 127         pinctrl-names = "default";
 128         pinctrl-0 = <&pinctrl_gmac0_default
 129                      &pinctrl_gmac0_mdio_default
 130                      &pinctrl_gmac0_txc_default>;
 131         phy-mode = "rgmii-id";
 132         status = "okay";
 133
 134         ethernet-phy@7 {
 135                 reg = <0x7>;
 136         };
 137 };
 138
 139 &gmac1 {
 140         #address-cells = <1>;
 141         #size-cells = <0>;
 142         pinctrl-names = "default";
 143         pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_mdio_default>;
 144         phy-mode = "rmii";
 145         status = "okay";
 146
 147         ethernet-phy@0 {
 148                 reg = <0x0>;
 149         };
 150 };
 151
 152 &pinctrl {
 153         pinctrl_flx1_default: flx1_default {
 154                 pinmux = <PIN_PC9__FLEXCOM1_IO0>,
 155                          <PIN_PC10__FLEXCOM1_IO1>;
 156                 bias-disable;
 157         };
 158
 159         pinctrl_flx3_default: flx3_default {
 160                 pinmux = <PIN_PD16__FLEXCOM3_IO0>,
 161                          <PIN_PD17__FLEXCOM3_IO1>;
 162                 bias-pull-up;
 163         };
 164
 165         pinctrl_i2c8_default: i2c8_default {
 166                 pinmux = <PIN_PC14__FLEXCOM8_IO0>,
 167                          <PIN_PC13__FLEXCOM8_IO1>;
 168                 bias-disable;
 169         };
 170
 171         pinctrl_qspi: qspi {
 172                 pinmux = <PIN_PB12__QSPI0_IO0>,
 173                          <PIN_PB11__QSPI0_IO1>,
 174                          <PIN_PB10__QSPI0_IO2>,
 175                          <PIN_PB9__QSPI0_IO3>,
 176                          <PIN_PB16__QSPI0_IO4>,
 177                          <PIN_PB17__QSPI0_IO5>,
 178                          <PIN_PB18__QSPI0_IO6>,
 179                          <PIN_PB19__QSPI0_IO7>,
 180                          <PIN_PB13__QSPI0_CS>,
 181                          <PIN_PB14__QSPI0_SCK>,
 182                          <PIN_PB15__QSPI0_SCKN>,
 183                          <PIN_PB20__QSPI0_DQS>,
 184                          <PIN_PB21__QSPI0_INT>;
 185                 bias-disable;
 186                 slew-rate = <0>;
 187                 atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>;
 188         };
 189
 190         pinctrl_sdmmc0_cmd_data_default: sdmmc0_cmd_data_default {
 191                 pinmux = <PIN_PA1__SDMMC0_CMD>,
 192                          <PIN_PA3__SDMMC0_DAT0>,
 193                          <PIN_PA4__SDMMC0_DAT1>,
 194                          <PIN_PA5__SDMMC0_DAT2>,
 195                          <PIN_PA6__SDMMC0_DAT3>,
 196                          <PIN_PA7__SDMMC0_DAT4>,
 197                          <PIN_PA8__SDMMC0_DAT5>,
 198                          <PIN_PA9__SDMMC0_DAT6>,
 199                          <PIN_PA10__SDMMC0_DAT7>;
 200                 bias-pull-up;
 201         };
 202
 203         pinctrl_sdmmc0_ck_rstn_ds_cd_default: sdmmc0_ck_rstn_ds_cd_default {
 204                 pinmux = <PIN_PA0__SDMMC0_CK>,
 205                          <PIN_PA2__SDMMC0_RSTN>,
 206                          <PIN_PA11__SDMMC0_DS>,
 207                          <PIN_PA14__SDMMC0_CD>;
 208                 bias-pull-up;
 209         };
 210
 211         pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default {
 212                 pinmux = <PIN_PB29__SDMMC1_CMD>,
 213                          <PIN_PB31__SDMMC1_DAT0>,
 214                          <PIN_PC0__SDMMC1_DAT1>,
 215                          <PIN_PC1__SDMMC1_DAT2>,
 216                          <PIN_PC2__SDMMC1_DAT3>;
 217                 bias-pull-up;
 218         };
 219
 220         pinctrl_sdmmc1_ck_cd_rstn_vddsel_default: sdmmc1_ck_cd_rstn_vddsel_default {
 221                 pinmux = <PIN_PB30__SDMMC1_CK>,
 222                          <PIN_PB28__SDMMC1_RSTN>,
 223                          <PIN_PC5__SDMMC1_1V8SEL>,
 224                          <PIN_PC4__SDMMC1_CD>;
 225                 bias-pull-up;
 226         };
 227
 228         pinctrl_gmac0_default: gmac0_default {
 229                 pinmux = <PIN_PA16__G0_TX0>,
 230                          <PIN_PA17__G0_TX1>,
 231                          <PIN_PA26__G0_TX2>,
 232                          <PIN_PA27__G0_TX3>,
 233                          <PIN_PA19__G0_RX0>,
 234                          <PIN_PA20__G0_RX1>,
 235                          <PIN_PA28__G0_RX2>,
 236                          <PIN_PA29__G0_RX3>,
 237                          <PIN_PA15__G0_TXEN>,
 238                          <PIN_PA30__G0_RXCK>,
 239                          <PIN_PA18__G0_RXDV>,
 240                          <PIN_PA25__G0_125CK>;
 241                 slew-rate = <0>;
 242                 bias-disable;
 243         };
 244
 245         pinctrl_gmac0_mdio_default: gmac0_mdio_default {
 246                 pinmux = <PIN_PA22__G0_MDC>,
 247                          <PIN_PA23__G0_MDIO>;
 248                 bias-disable;
 249         };
 250
 251         pinctrl_gmac0_txc_default: gmac0_txc_default {
 252                 pinmux = <PIN_PA24__G0_TXCK>;
 253                 slew-rate = <0>;
 254                 bias-pull-up;
 255         };
 256
 257         pinctrl_gmac1_default: gmac1_default {
 258                 pinmux = <PIN_PD30__G1_TXCK>,
 259                          <PIN_PD22__G1_TX0>,
 260                          <PIN_PD23__G1_TX1>,
 261                          <PIN_PD21__G1_TXEN>,
 262                          <PIN_PD25__G1_RX0>,
 263                          <PIN_PD26__G1_RX1>,
 264                          <PIN_PD27__G1_RXER>,
 265                          <PIN_PD24__G1_RXDV>;
 266                 slew-rate = <0>;
 267                 bias-disable;
 268         };
 269
 270         pinctrl_gmac1_mdio_default: gmac1_mdio_default {
 271                 pinmux = <PIN_PD28__G1_MDC>,
 272                          <PIN_PD29__G1_MDIO>;
 273                 bias-disable;
 274         };
 275 };