arch/arm/dts/sama7g5ek.dts

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 /*
   3  * sama7g5ek.dts - Device Tree file for SAMA7G5 EK
   4  *                 SAMA7G5 Evaluation Kit
   5  *
   6  *  Copyright (c) 2020, Microchip Technology Inc.
   7  *                2020, Eugen Hristev <eugen.hristev@microchip.com>
   8  *                2020, Claudiu Beznea <claudiu.beznea@microchip.com>
   9  */
  10 /dts-v1/;
  11 #include "sama7g5.dtsi"
  12 #include "sama7g5-pinfunc.h"
  13
  14 / {
  15         model = "Microchip SAMA7G5 Evaluation Kit";
  16         compatible = "microchip,sama7g5ek", "microchip,sama7g54", "microchip,sama7g5", "microchip,sama7";
  17
  18         aliases {
  19                 serial0 = &uart0;
  20                 i2c0 = &i2c1;
  21         };
  22
  23         chosen {
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         clocks {
  28                 slow_xtal: slow_xtal {
  29                         clock-frequency = <32768>;
  30                 };
  31
  32                 main_xtal: main_xtal {
  33                         clock-frequency = <24000000>;
  34                 };
  35         };
  36
  37         ahb {
  38
  39                 apb {
  40                         sdmmc0: sdio-host@e1204000 {
  41                                 bus-width = <8>;
  42                                 non-removable;
  43                                 pinctrl-names = "default";
  44                                 pinctrl-0 = <&pinctrl_sdmmc0_cmd_data_default
  45                                              &pinctrl_sdmmc0_ck_rstn_ds_cd_default>;
  46                                 status = "okay";
  47                         };
  48
  49                         sdmmc1: sdio-host@e1208000 {
  50                                 bus-width = <4>;
  51                                 pinctrl-names = "default";
  52                                 pinctrl-0 = <&pinctrl_sdmmc1_cmd_data_default
  53                                              &pinctrl_sdmmc1_ck_cd_rstn_vddsel_default>;
  54                                 status = "okay";
  55                         };
  56
  57                         uart0: serial@e1824200 {
  58                                 pinctrl-names = "default";
  59                                 pinctrl-0 = <&pinctrl_flx3_default>;
  60                                 status = "okay";
  61                         };
  62                 };
  63         };
  64 };
  65
  66 &flx1 {
  67         atmel,flexcom-mode = <3>;
  68         status = "okay";
  69 };
  70
  71 &i2c1 {
  72         pinctrl-names = "default";
  73         pinctrl-0 = <&pinctrl_flx1_default>;
  74         status = "okay";
  75
  76         eeprom@52 {
  77                 compatible = "microchip,24aa02e48";
  78                 reg = <0x52>;
  79                 pagesize = <16>;
  80         };
  81
  82         eeprom@53 {
  83                 compatible = "microchip,24aa02e48";
  84                 reg = <0x53>;
  85                 pagesize = <16>;
  86         };
  87 };
  88
  89 &gmac0 {
  90         #address-cells = <1>;
  91         #size-cells = <0>;
  92         pinctrl-names = "default";
  93         pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txc_default>;
  94         phy-mode = "rgmii-id";
  95         status = "okay";
  96
  97         ethernet-phy@7 {
  98                 reg = <0x7>;
  99         };
 100 };
 101
 102 &gmac1 {
 103         #address-cells = <1>;
 104         #size-cells = <0>;
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&pinctrl_gmac1_default>;
 107         phy-mode = "rmii";
 108         status = "okay";
 109
 110         ethernet-phy@0 {
 111                 reg = <0x0>;
 112         };
 113 };
 114
 115 &pinctrl {
 116         pinctrl_flx1_default: flx1_default {
 117                 pinmux = <PIN_PC9__FLEXCOM1_IO0>,
 118                          <PIN_PC10__FLEXCOM1_IO1>;
 119                 bias-disable;
 120         };
 121
 122         pinctrl_flx3_default: flx3_default {
 123                 pinmux = <PIN_PD16__FLEXCOM3_IO0>,
 124                          <PIN_PD17__FLEXCOM3_IO1>;
 125                 bias-pull-up;
 126         };
 127
 128         pinctrl_sdmmc0_cmd_data_default: sdmmc0_cmd_data_default {
 129                 pinmux = <PIN_PA1__SDMMC0_CMD>,
 130                          <PIN_PA3__SDMMC0_DAT0>,
 131                          <PIN_PA4__SDMMC0_DAT1>,
 132                          <PIN_PA5__SDMMC0_DAT2>,
 133                          <PIN_PA6__SDMMC0_DAT3>,
 134                          <PIN_PA7__SDMMC0_DAT4>,
 135                          <PIN_PA8__SDMMC0_DAT5>,
 136                          <PIN_PA9__SDMMC0_DAT6>,
 137                          <PIN_PA10__SDMMC0_DAT7>;
 138                 bias-pull-up;
 139         };
 140
 141         pinctrl_sdmmc0_ck_rstn_ds_cd_default: sdmmc0_ck_rstn_ds_cd_default {
 142                 pinmux = <PIN_PA0__SDMMC0_CK>,
 143                          <PIN_PA2__SDMMC0_RSTN>,
 144                          <PIN_PA11__SDMMC0_DS>,
 145                          <PIN_PA14__SDMMC0_CD>;
 146                 bias-pull-up;
 147         };
 148
 149         pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default {
 150                 pinmux = <PIN_PB29__SDMMC1_CMD>,
 151                          <PIN_PB31__SDMMC1_DAT0>,
 152                          <PIN_PC0__SDMMC1_DAT1>,
 153                          <PIN_PC1__SDMMC1_DAT2>,
 154                          <PIN_PC2__SDMMC1_DAT3>;
 155                 bias-pull-up;
 156         };
 157
 158         pinctrl_sdmmc1_ck_cd_rstn_vddsel_default: sdmmc1_ck_cd_rstn_vddsel_default {
 159                 pinmux = <PIN_PB30__SDMMC1_CK>,
 160                          <PIN_PB28__SDMMC1_RSTN>,
 161                          <PIN_PC5__SDMMC1_1V8SEL>,
 162                          <PIN_PC4__SDMMC1_CD>;
 163                 bias-pull-up;
 164         };
 165
 166         pinctrl_gmac0_default: gmac0_default {
 167                 pinmux = <PIN_PA16__G0_TX0>,
 168                          <PIN_PA17__G0_TX1>,
 169                          <PIN_PA26__G0_TX2>,
 170                          <PIN_PA27__G0_TX3>,
 171                          <PIN_PA19__G0_RX0>,
 172                          <PIN_PA20__G0_RX1>,
 173                          <PIN_PA28__G0_RX2>,
 174                          <PIN_PA29__G0_RX3>,
 175                          <PIN_PA15__G0_TXEN>,
 176                          <PIN_PA30__G0_RXCK>,
 177                          <PIN_PA18__G0_RXDV>,
 178                          <PIN_PA22__G0_MDC>,
 179                          <PIN_PA23__G0_MDIO>,
 180                          <PIN_PA25__G0_125CK>;
 181                 bias-disable;
 182         };
 183
 184         pinctrl_gmac0_txc_default: gmac0_txc_default {
 185                 pinmux = <PIN_PA24__G0_TXCK>;
 186                 bias-pull-up;
 187         };
 188
 189         pinctrl_gmac1_default: gmac1_default {
 190                 pinmux = <PIN_PD30__G1_TXCK>,
 191                          <PIN_PD22__G1_TX0>,
 192                          <PIN_PD23__G1_TX1>,
 193                          <PIN_PD21__G1_TXEN>,
 194                          <PIN_PD25__G1_RX0>,
 195                          <PIN_PD26__G1_RX1>,
 196                          <PIN_PD27__G1_RXER>,
 197                          <PIN_PD24__G1_RXDV>,
 198                          <PIN_PD28__G1_MDC>,
 199                          <PIN_PD29__G1_MDIO>;
 200                 bias-disable;
 201         };
 202 };