2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
48 compatible = "arm,cortex-a5";
54 compatible = "arm,cortex-a5-pmu";
55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
59 reg = <0x20000000 0x8000000>;
63 slow_xtal: slow_xtal {
64 compatible = "fixed-clock";
66 clock-frequency = <0>;
69 main_xtal: main_xtal {
70 compatible = "fixed-clock";
72 clock-frequency = <0>;
75 adc_op_clk: adc_op_clk{
76 compatible = "fixed-clock";
78 clock-frequency = <1000000>;
83 compatible = "mmio-sram";
84 reg = <0x00300000 0x20000>;
88 compatible = "simple-bus";
95 compatible = "simple-bus";
102 compatible = "atmel,hsmci";
103 reg = <0xf0000000 0x600>;
104 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
105 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
110 #address-cells = <1>;
112 clocks = <&mci0_clk>;
113 clock-names = "mci_clk";
117 #address-cells = <1>;
119 compatible = "atmel,at91rm9200-spi";
120 reg = <0xf0004000 0x100>;
121 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
122 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
123 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
124 dma-names = "tx", "rx";
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_spi0>;
127 clocks = <&spi0_clk>;
128 clock-names = "spi_clk";
133 compatible = "atmel,at91sam9g45-ssc";
134 reg = <0xf0008000 0x4000>;
135 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
136 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
137 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
138 dma-names = "tx", "rx";
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
141 clocks = <&ssc0_clk>;
142 clock-names = "pclk";
146 tcb0: timer@f0010000 {
147 compatible = "atmel,at91sam9x5-tcb";
148 reg = <0xf0010000 0x100>;
149 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
150 clocks = <&tcb0_clk>, <&clk32k>;
151 clock-names = "t0_clk", "slow_clk";
155 compatible = "atmel,at91sam9x5-i2c";
156 reg = <0xf0014000 0x4000>;
157 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
158 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
159 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
160 dma-names = "tx", "rx";
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_i2c0>;
163 #address-cells = <1>;
165 clocks = <&twi0_clk>;
170 compatible = "atmel,at91sam9x5-i2c";
171 reg = <0xf0018000 0x4000>;
172 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
173 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
174 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
175 dma-names = "tx", "rx";
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_i2c1>;
178 #address-cells = <1>;
180 clocks = <&twi1_clk>;
184 usart0: serial@f001c000 {
185 compatible = "atmel,at91sam9260-usart";
186 reg = <0xf001c000 0x100>;
187 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
188 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
189 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
190 dma-names = "tx", "rx";
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usart0>;
193 clocks = <&usart0_clk>;
194 clock-names = "usart";
198 usart1: serial@f0020000 {
199 compatible = "atmel,at91sam9260-usart";
200 reg = <0xf0020000 0x100>;
201 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
202 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
203 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
204 dma-names = "tx", "rx";
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_usart1>;
207 clocks = <&usart1_clk>;
208 clock-names = "usart";
212 uart0: serial@f0024000 {
213 compatible = "atmel,at91sam9260-usart";
214 reg = <0xf0024000 0x100>;
215 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_uart0>;
218 clocks = <&uart0_clk>;
219 clock-names = "usart";
224 compatible = "atmel,sama5d3-pwm";
225 reg = <0xf002c000 0x300>;
226 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
233 compatible = "atmel,at91sam9g45-isi";
234 reg = <0xf0034000 0x4000>;
235 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_isi_data_0_7>;
239 clock-names = "isi_clk";
244 compatible = "atmel,sama5d3-sfr", "syscon";
245 reg = <0xf0038000 0x60>;
249 compatible = "atmel,hsmci";
250 reg = <0xf8000000 0x600>;
251 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
252 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
257 #address-cells = <1>;
259 clocks = <&mci1_clk>;
260 clock-names = "mci_clk";
264 #address-cells = <1>;
266 compatible = "atmel,at91rm9200-spi";
267 reg = <0xf8008000 0x100>;
268 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
269 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
270 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
271 dma-names = "tx", "rx";
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_spi1>;
274 clocks = <&spi1_clk>;
275 clock-names = "spi_clk";
280 compatible = "atmel,at91sam9g45-ssc";
281 reg = <0xf800c000 0x4000>;
282 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
283 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
284 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
285 dma-names = "tx", "rx";
286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
288 clocks = <&ssc1_clk>;
289 clock-names = "pclk";
294 #address-cells = <1>;
296 compatible = "atmel,at91sam9x5-adc";
297 reg = <0xf8018000 0x100>;
298 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
299 pinctrl-names = "default";
317 clock-names = "adc_clk", "adc_op_clk";
318 atmel,adc-channels-used = <0xfff>;
319 atmel,adc-startup-time = <40>;
320 atmel,adc-use-external-triggers;
321 atmel,adc-vref = <3000>;
322 atmel,adc-res = <10 12>;
323 atmel,adc-sample-hold-time = <11>;
324 atmel,adc-res-names = "lowres", "highres";
329 trigger-name = "external-rising";
330 trigger-value = <0x1>;
335 trigger-name = "external-falling";
336 trigger-value = <0x2>;
341 trigger-name = "external-any";
342 trigger-value = <0x3>;
347 trigger-name = "continuous";
348 trigger-value = <0x6>;
353 compatible = "atmel,at91sam9x5-i2c";
354 reg = <0xf801c000 0x4000>;
355 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
356 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
357 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
358 dma-names = "tx", "rx";
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_i2c2>;
361 #address-cells = <1>;
363 clocks = <&twi2_clk>;
367 usart2: serial@f8020000 {
368 compatible = "atmel,at91sam9260-usart";
369 reg = <0xf8020000 0x100>;
370 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
371 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
372 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
373 dma-names = "tx", "rx";
374 pinctrl-names = "default";
375 pinctrl-0 = <&pinctrl_usart2>;
376 clocks = <&usart2_clk>;
377 clock-names = "usart";
381 usart3: serial@f8024000 {
382 compatible = "atmel,at91sam9260-usart";
383 reg = <0xf8024000 0x100>;
384 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
385 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
386 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
387 dma-names = "tx", "rx";
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_usart3>;
390 clocks = <&usart3_clk>;
391 clock-names = "usart";
396 compatible = "atmel,at91sam9g46-sha";
397 reg = <0xf8034000 0x100>;
398 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
399 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
402 clock-names = "sha_clk";
406 compatible = "atmel,at91sam9g46-aes";
407 reg = <0xf8038000 0x100>;
408 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
409 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
410 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
411 dma-names = "tx", "rx";
413 clock-names = "aes_clk";
417 compatible = "atmel,at91sam9g46-tdes";
418 reg = <0xf803c000 0x100>;
419 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
420 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
421 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
422 dma-names = "tx", "rx";
423 clocks = <&tdes_clk>;
424 clock-names = "tdes_clk";
428 compatible = "atmel,at91sam9g45-trng";
429 reg = <0xf8040000 0x100>;
430 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
431 clocks = <&trng_clk>;
434 dma0: dma-controller@ffffe600 {
435 compatible = "atmel,at91sam9g45-dma";
436 reg = <0xffffe600 0x200>;
437 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
439 clocks = <&dma0_clk>;
440 clock-names = "dma_clk";
443 dma1: dma-controller@ffffe800 {
444 compatible = "atmel,at91sam9g45-dma";
445 reg = <0xffffe800 0x200>;
446 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
448 clocks = <&dma1_clk>;
449 clock-names = "dma_clk";
452 ramc0: ramc@ffffea00 {
453 compatible = "atmel,sama5d3-ddramc";
454 reg = <0xffffea00 0x200>;
455 clocks = <&ddrck>, <&mpddr_clk>;
456 clock-names = "ddrck", "mpddr";
459 dbgu: serial@ffffee00 {
460 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
461 reg = <0xffffee00 0x200>;
462 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
463 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
464 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
465 dma-names = "tx", "rx";
466 pinctrl-names = "default";
467 pinctrl-0 = <&pinctrl_dbgu>;
468 clocks = <&dbgu_clk>;
469 clock-names = "usart";
473 aic: interrupt-controller@fffff000 {
474 #interrupt-cells = <3>;
475 compatible = "atmel,sama5d3-aic";
476 interrupt-controller;
477 reg = <0xfffff000 0x200>;
478 atmel,external-irqs = <47>;
483 #address-cells = <1>;
485 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
486 ranges = <0xfffff200 0xfffff200 0xa00>;
489 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
490 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
491 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
492 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
493 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
495 reg = <0xfffff200 0x100 /* pioA */
496 0xfffff400 0x100 /* pioB */
497 0xfffff600 0x100 /* pioC */
498 0xfffff800 0x100 /* pioD */
499 0xfffffa00 0x100 /* pioE */
502 /* shared pinctrl settings */
504 pinctrl_adc0_adtrg: adc0_adtrg {
506 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
508 pinctrl_adc0_ad0: adc0_ad0 {
510 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
512 pinctrl_adc0_ad1: adc0_ad1 {
514 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
516 pinctrl_adc0_ad2: adc0_ad2 {
518 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
520 pinctrl_adc0_ad3: adc0_ad3 {
522 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
524 pinctrl_adc0_ad4: adc0_ad4 {
526 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
528 pinctrl_adc0_ad5: adc0_ad5 {
530 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
532 pinctrl_adc0_ad6: adc0_ad6 {
534 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
536 pinctrl_adc0_ad7: adc0_ad7 {
538 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
540 pinctrl_adc0_ad8: adc0_ad8 {
542 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
544 pinctrl_adc0_ad9: adc0_ad9 {
546 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
548 pinctrl_adc0_ad10: adc0_ad10 {
550 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
552 pinctrl_adc0_ad11: adc0_ad11 {
554 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
560 pinctrl_dbgu: dbgu-0 {
563 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
564 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
569 pinctrl_i2c0: i2c0-0 {
571 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
572 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
577 pinctrl_i2c1: i2c1-0 {
579 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
580 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
585 pinctrl_i2c2: i2c2-0 {
587 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
588 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
593 pinctrl_isi_data_0_7: isi-0-data-0-7 {
595 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
596 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
597 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
598 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
599 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
600 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
601 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
602 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
603 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
604 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
605 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
608 pinctrl_isi_data_8_9: isi-0-data-8-9 {
610 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
611 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
614 pinctrl_isi_data_10_11: isi-0-data-10-11 {
616 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
617 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
623 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
626 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
627 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
628 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
630 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
633 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
634 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
635 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
637 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
640 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
641 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
642 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
643 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
649 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
652 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
653 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
654 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
656 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
659 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
660 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
661 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
666 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
668 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
669 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
674 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
676 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
678 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
680 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
682 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
684 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
686 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
688 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
691 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
693 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
695 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
697 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
699 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
701 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
703 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
705 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
707 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
709 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
711 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
713 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
716 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
718 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
720 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
722 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
724 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
726 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
728 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
730 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
733 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
735 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
737 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
739 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
741 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
743 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
745 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
747 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
753 pinctrl_spi0: spi0-0 {
756 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
757 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
758 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
764 pinctrl_spi1: spi1-0 {
767 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
768 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
769 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
774 pinctrl_ssc0_tx: ssc0_tx {
776 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
777 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
778 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
781 pinctrl_ssc0_rx: ssc0_rx {
783 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
784 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
785 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
790 pinctrl_ssc1_tx: ssc1_tx {
792 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
793 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
794 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
797 pinctrl_ssc1_rx: ssc1_rx {
799 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
800 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
801 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
806 pinctrl_uart0: uart0-0 {
808 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* conflicts with PWMFI2, ISI_D8 */
809 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with ISI_PCK */
814 pinctrl_uart1: uart1-0 {
816 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* conflicts with TWD0, ISI_VSYNC */
817 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* conflicts with TWCK0, ISI_HSYNC */
822 pinctrl_usart0: usart0-0 {
824 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
825 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
828 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
830 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
831 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
836 pinctrl_usart1: usart1-0 {
838 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
839 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
842 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
844 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
845 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
850 pinctrl_usart2: usart2-0 {
852 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
853 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
856 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
858 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
859 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
864 pinctrl_usart3: usart3-0 {
866 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
867 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
870 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
872 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
873 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
878 pioA: gpio@fffff200 {
879 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
880 reg = <0xfffff200 0x100>;
881 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
884 interrupt-controller;
885 #interrupt-cells = <2>;
886 clocks = <&pioA_clk>;
890 pioB: gpio@fffff400 {
891 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
892 reg = <0xfffff400 0x100>;
893 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
896 interrupt-controller;
897 #interrupt-cells = <2>;
898 clocks = <&pioB_clk>;
902 pioC: gpio@fffff600 {
903 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
904 reg = <0xfffff600 0x100>;
905 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
908 interrupt-controller;
909 #interrupt-cells = <2>;
910 clocks = <&pioC_clk>;
914 pioD: gpio@fffff800 {
915 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
916 reg = <0xfffff800 0x100>;
917 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
920 interrupt-controller;
921 #interrupt-cells = <2>;
922 clocks = <&pioD_clk>;
926 pioE: gpio@fffffa00 {
927 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
928 reg = <0xfffffa00 0x100>;
929 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
932 interrupt-controller;
933 #interrupt-cells = <2>;
934 clocks = <&pioE_clk>;
939 compatible = "atmel,sama5d3-pmc", "syscon";
940 reg = <0xfffffc00 0x120>;
941 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
942 interrupt-controller;
943 #address-cells = <1>;
945 #interrupt-cells = <1>;
948 main_rc_osc: main_rc_osc {
949 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
951 interrupt-parent = <&pmc>;
952 interrupts = <AT91_PMC_MOSCRCS>;
953 clock-frequency = <12000000>;
954 clock-accuracy = <50000000>;
958 compatible = "atmel,at91rm9200-clk-main-osc";
960 interrupt-parent = <&pmc>;
961 interrupts = <AT91_PMC_MOSCS>;
962 clocks = <&main_xtal>;
966 compatible = "atmel,at91sam9x5-clk-main";
968 interrupt-parent = <&pmc>;
969 interrupts = <AT91_PMC_MOSCSELS>;
970 clocks = <&main_rc_osc &main_osc>;
974 compatible = "atmel,sama5d3-clk-pll";
976 interrupt-parent = <&pmc>;
977 interrupts = <AT91_PMC_LOCKA>;
980 atmel,clk-input-range = <8000000 50000000>;
981 #atmel,pll-clk-output-range-cells = <4>;
982 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
986 compatible = "atmel,at91sam9x5-clk-plldiv";
992 compatible = "atmel,at91sam9x5-clk-utmi";
994 interrupt-parent = <&pmc>;
995 interrupts = <AT91_PMC_LOCKU>;
1002 compatible = "atmel,at91sam9x5-clk-master";
1004 interrupt-parent = <&pmc>;
1005 interrupts = <AT91_PMC_MCKRDY>;
1006 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
1007 atmel,clk-output-range = <0 166000000>;
1008 atmel,clk-divisors = <1 2 4 3>;
1009 u-boot,dm-pre-reloc;
1013 compatible = "atmel,at91sam9x5-clk-usb";
1015 clocks = <&plladiv>, <&utmi>;
1019 compatible = "atmel,at91sam9x5-clk-programmable";
1020 #address-cells = <1>;
1022 interrupt-parent = <&pmc>;
1023 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
1028 interrupts = <AT91_PMC_PCKRDY(0)>;
1034 interrupts = <AT91_PMC_PCKRDY(1)>;
1040 interrupts = <AT91_PMC_PCKRDY(2)>;
1045 compatible = "atmel,at91sam9x5-clk-smd";
1047 clocks = <&plladiv>, <&utmi>;
1051 compatible = "atmel,at91rm9200-clk-system";
1052 #address-cells = <1>;
1099 compatible = "atmel,at91sam9x5-clk-peripheral";
1100 #address-cells = <1>;
1103 u-boot,dm-pre-reloc;
1105 dbgu_clk: dbgu_clk@2 {
1106 u-boot,dm-pre-reloc;
1111 hsmc_clk: hsmc_clk@5 {
1116 pioA_clk: pioA_clk@6 {
1117 u-boot,dm-pre-reloc;
1122 pioB_clk: pioB_clk@7 {
1123 u-boot,dm-pre-reloc;
1128 pioC_clk: pioC_clk@8 {
1129 u-boot,dm-pre-reloc;
1134 pioD_clk: pioD_clk@9 {
1135 u-boot,dm-pre-reloc;
1140 pioE_clk: pioE_clk@10 {
1141 u-boot,dm-pre-reloc;
1146 usart0_clk: usart0_clk@12 {
1149 atmel,clk-output-range = <0 66000000>;
1152 usart1_clk: usart1_clk@13 {
1155 atmel,clk-output-range = <0 66000000>;
1158 usart2_clk: usart2_clk@14 {
1161 atmel,clk-output-range = <0 66000000>;
1164 usart3_clk: usart3_clk@15 {
1167 atmel,clk-output-range = <0 66000000>;
1170 uart0_clk: uart0_clk@16 {
1173 atmel,clk-output-range = <0 66000000>;
1176 twi0_clk: twi0_clk@18 {
1179 atmel,clk-output-range = <0 16625000>;
1182 twi1_clk: twi1_clk@19 {
1185 atmel,clk-output-range = <0 16625000>;
1188 twi2_clk: twi2_clk@20 {
1191 atmel,clk-output-range = <0 16625000>;
1194 mci0_clk: mci0_clk@21 {
1195 u-boot,dm-pre-reloc;
1200 mci1_clk: mci1_clk@22 {
1201 u-boot,dm-pre-reloc;
1206 spi0_clk: spi0_clk@24 {
1207 u-boot,dm-pre-reloc;
1210 atmel,clk-output-range = <0 133000000>;
1213 spi1_clk: spi1_clk@25 {
1214 u-boot,dm-pre-reloc;
1217 atmel,clk-output-range = <0 133000000>;
1220 tcb0_clk: tcb0_clk@26 {
1223 atmel,clk-output-range = <0 133000000>;
1226 pwm_clk: pwm_clk@28 {
1231 adc_clk: adc_clk@29 {
1234 atmel,clk-output-range = <0 66000000>;
1237 dma0_clk: dma0_clk@30 {
1242 dma1_clk: dma1_clk@31 {
1247 uhphs_clk: uhphs_clk@32 {
1252 udphs_clk: udphs_clk@33 {
1257 isi_clk: isi_clk@37 {
1262 ssc0_clk: ssc0_clk@38 {
1265 atmel,clk-output-range = <0 66000000>;
1268 ssc1_clk: ssc1_clk@39 {
1271 atmel,clk-output-range = <0 66000000>;
1274 sha_clk: sha_clk@42 {
1279 aes_clk: aes_clk@43 {
1284 tdes_clk: tdes_clk@44 {
1289 trng_clk: trng_clk@45 {
1294 fuse_clk: fuse_clk@48 {
1299 mpddr_clk: mpddr_clk@49 {
1307 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1308 reg = <0xfffffe00 0x10>;
1312 shutdown-controller@fffffe10 {
1313 compatible = "atmel,at91sam9x5-shdwc";
1314 reg = <0xfffffe10 0x10>;
1318 pit: timer@fffffe30 {
1319 compatible = "atmel,at91sam9260-pit";
1320 reg = <0xfffffe30 0xf>;
1321 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1326 compatible = "atmel,at91sam9260-wdt";
1327 reg = <0xfffffe40 0x10>;
1328 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1330 atmel,watchdog-type = "hardware";
1331 atmel,reset-type = "all";
1333 status = "disabled";
1337 compatible = "atmel,at91sam9x5-sckc";
1338 reg = <0xfffffe50 0x4>;
1340 slow_rc_osc: slow_rc_osc {
1341 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1343 clock-frequency = <32768>;
1344 clock-accuracy = <50000000>;
1345 atmel,startup-time-usec = <75>;
1348 slow_osc: slow_osc {
1349 compatible = "atmel,at91sam9x5-clk-slow-osc";
1351 clocks = <&slow_xtal>;
1352 atmel,startup-time-usec = <1200000>;
1356 compatible = "atmel,at91sam9x5-clk-slow";
1358 clocks = <&slow_rc_osc &slow_osc>;
1363 compatible = "atmel,at91rm9200-rtc";
1364 reg = <0xfffffeb0 0x30>;
1365 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1370 usb0: gadget@00500000 {
1371 #address-cells = <1>;
1373 compatible = "atmel,sama5d3-udc";
1374 reg = <0x00500000 0x100000
1376 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1377 clocks = <&udphs_clk>, <&utmi>;
1378 clock-names = "pclk", "hclk";
1379 status = "disabled";
1383 atmel,fifo-size = <64>;
1384 atmel,nb-banks = <1>;
1389 atmel,fifo-size = <1024>;
1390 atmel,nb-banks = <3>;
1397 atmel,fifo-size = <1024>;
1398 atmel,nb-banks = <3>;
1405 atmel,fifo-size = <1024>;
1406 atmel,nb-banks = <2>;
1412 atmel,fifo-size = <1024>;
1413 atmel,nb-banks = <2>;
1419 atmel,fifo-size = <1024>;
1420 atmel,nb-banks = <2>;
1426 atmel,fifo-size = <1024>;
1427 atmel,nb-banks = <2>;
1433 atmel,fifo-size = <1024>;
1434 atmel,nb-banks = <2>;
1440 atmel,fifo-size = <1024>;
1441 atmel,nb-banks = <2>;
1446 atmel,fifo-size = <1024>;
1447 atmel,nb-banks = <2>;
1452 atmel,fifo-size = <1024>;
1453 atmel,nb-banks = <2>;
1458 atmel,fifo-size = <1024>;
1459 atmel,nb-banks = <2>;
1464 atmel,fifo-size = <1024>;
1465 atmel,nb-banks = <2>;
1470 atmel,fifo-size = <1024>;
1471 atmel,nb-banks = <2>;
1476 atmel,fifo-size = <1024>;
1477 atmel,nb-banks = <2>;
1482 atmel,fifo-size = <1024>;
1483 atmel,nb-banks = <2>;
1487 usb1: ohci@00600000 {
1488 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1489 reg = <0x00600000 0x100000>;
1490 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1491 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1492 clock-names = "ohci_clk", "hclk", "uhpck";
1493 status = "disabled";
1496 usb2: ehci@00700000 {
1497 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1498 reg = <0x00700000 0x100000>;
1499 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1500 clocks = <&utmi>, <&uhphs_clk>;
1501 clock-names = "usb_clk", "ehci_clk";
1502 status = "disabled";
1505 nand0: nand@60000000 {
1506 compatible = "atmel,at91rm9200-nand";
1507 #address-cells = <1>;
1510 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1511 0xffffc070 0x00000490 /* SMC PMECC regs */
1512 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1513 0x00110000 0x00018000 /* ROM code */
1515 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1516 atmel,nand-addr-offset = <21>;
1517 atmel,nand-cmd-offset = <22>;
1519 pinctrl-names = "default";
1520 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1521 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1522 status = "disabled";
1525 compatible = "atmel,sama5d3-nfc";
1526 #address-cells = <1>;
1529 0x70000000 0x08000000 /* NFC Command Registers */
1530 0xffffc000 0x00000070 /* NFC HSMC regs */
1531 0x00200000 0x00100000 /* NFC SRAM banks */
1533 clocks = <&hsmc_clk>;
1538 onewire_tm: onewire {
1539 compatible = "w1-gpio";
1540 status = "disabled";