arch/arm/dts/sama5d2.dtsi

   1 #include "skeleton.dtsi"
   2 #include <dt-bindings/interrupt-controller/irq.h>
   3
   4 / {
   5         model = "Atmel SAMA5D2 family SoC";
   6         compatible = "atmel,sama5d2";
   7         interrupt-parent = <&aic>;
   8
   9         aliases {
  10                 spi0 = &spi0;
  11                 spi1 = &qspi0;
  12                 spi2 = &qspi1;
  13                 i2c0 = &i2c0;
  14                 i2c1 = &i2c1;
  15         };
  16
  17         clocks {
  18                 slow_xtal: slow_xtal {
  19                         compatible = "fixed-clock";
  20                         #clock-cells = <0>;
  21                         clock-frequency = <0>;
  22                 };
  23
  24                 main_xtal: main_xtal {
  25                         compatible = "fixed-clock";
  26                         #clock-cells = <0>;
  27                         clock-frequency = <0>;
  28                 };
  29         };
  30
  31         ahb {
  32                 compatible = "simple-bus";
  33                 #address-cells = <1>;
  34                 #size-cells = <1>;
  35                 bootph-all;
  36
  37                 nfc_sram: sram@100000 {
  38                         compatible = "mmio-sram";
  39                         no-memory-wc;
  40                         reg = <0x00100000 0x2400>;
  41                         #address-cells = <1>;
  42                         #size-cells = <1>;
  43                         ranges = <0 0x00100000 0x2400>;
  44                 };
  45
  46                 usb1: ohci@400000 {
  47                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  48                         reg = <0x00400000 0x100000>;
  49                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
  50                         clock-names = "ohci_clk", "hclk", "uhpck";
  51                         status = "disabled";
  52                 };
  53
  54                 usb2: ehci@500000 {
  55                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  56                         reg = <0x00500000 0x100000>;
  57                         clocks = <&utmi>, <&uhphs_clk>;
  58                         clock-names = "usb_clk", "ehci_clk";
  59                         status = "disabled";
  60                 };
  61
  62                 ebi: ebi@10000000 {
  63                         compatible = "atmel,sama5d3-ebi";
  64                         #address-cells = <2>;
  65                         #size-cells = <1>;
  66                         atmel,smc = <&hsmc>;
  67                         reg = <0x10000000 0x10000000
  68                                0x60000000 0x30000000>;
  69                         ranges = <0x0 0x0 0x10000000 0x10000000
  70                                   0x1 0x0 0x60000000 0x10000000
  71                                   0x2 0x0 0x70000000 0x10000000
  72                                   0x3 0x0 0x80000000 0x10000000>;
  73                         clocks = <&h32ck>;
  74                         status = "disabled";
  75
  76                         nand_controller: nand-controller {
  77                                 compatible = "atmel,sama5d3-nand-controller";
  78                                 atmel,nfc-sram = <&nfc_sram>;
  79                                 atmel,nfc-io = <&nfc_io>;
  80                                 ecc-engine = <&pmecc>;
  81                                 #address-cells = <2>;
  82                                 #size-cells = <1>;
  83                                 ranges;
  84                                 status = "disabled";
  85                         };
  86                 };
  87
  88                 sdmmc0: sdio-host@a0000000 {
  89                         compatible = "atmel,sama5d2-sdhci";
  90                         reg = <0xa0000000 0x300>;
  91                         clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
  92                         clock-names = "hclock", "multclk", "baseclk";
  93                         status = "disabled";
  94                 };
  95
  96                 sdmmc1: sdio-host@b0000000 {
  97                         compatible = "atmel,sama5d2-sdhci";
  98                         reg = <0xb0000000 0x300>;
  99                         clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
 100                         clock-names = "hclock", "multclk", "baseclk";
 101                         status = "disabled";
 102                 };
 103
 104                 nfc_io: nfc-io@c0000000 {
 105                         compatible = "atmel,sama5d3-nfc-io", "syscon";
 106                         reg = <0xc0000000 0x8000000>;
 107                 };
 108
 109                 apb {
 110                         compatible = "simple-bus";
 111                         #address-cells = <1>;
 112                         #size-cells = <1>;
 113                         bootph-all;
 114
 115                         hlcdc: hlcdc@f0000000 {
 116                                 compatible = "atmel,at91sam9x5-hlcdc";
 117                                 reg = <0xf0000000 0x2000>;
 118                                 clocks = <&lcdc_clk>;
 119                                 status = "disabled";
 120                         };
 121
 122                         pmc: clock-controller@f0014000 {
 123                                 compatible = "atmel,sama5d2-pmc", "syscon";
 124                                 reg = <0xf0014000 0x160>;
 125                                 #address-cells = <1>;
 126                                 #size-cells = <0>;
 127                                 bootph-all;
 128
 129                                 main: mainck {
 130                                         compatible = "atmel,at91sam9x5-clk-main";
 131                                         #clock-cells = <0>;
 132                                         bootph-all;
 133                                 };
 134
 135                                 plla: pllack@0 {
 136                                         compatible = "atmel,sama5d3-clk-pll";
 137                                         #clock-cells = <0>;
 138                                         clocks = <&main>;
 139                                         reg = <0>;
 140                                         atmel,clk-input-range = <12000000 12000000>;
 141                                         #atmel,pll-clk-output-range-cells = <4>;
 142                                         atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
 143                                         bootph-all;
 144                                 };
 145
 146                                 plladiv: plladivck {
 147                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 148                                         #clock-cells = <0>;
 149                                         clocks = <&plla>;
 150                                 };
 151
 152                                 audio_pll_frac: audiopll_fracck {
 153                                         compatible = "atmel,sama5d2-clk-audio-pll-frac";
 154                                         #clock-cells = <0>;
 155                                         clocks = <&main>;
 156                                 };
 157
 158                                 audio_pll_pad: audiopll_padck {
 159                                         compatible = "atmel,sama5d2-clk-audio-pll-pad";
 160                                         #clock-cells = <0>;
 161                                         clocks = <&audio_pll_frac>;
 162                                 };
 163
 164                                 audio_pll_pmc: audiopll_pmcck {
 165                                         compatible = "atmel,sama5d2-clk-audio-pll-pmc";
 166                                         #clock-cells = <0>;
 167                                         clocks = <&audio_pll_frac>;
 168                                 };
 169
 170                                 utmi: utmick {
 171                                         compatible = "atmel,at91sam9x5-clk-utmi";
 172                                         #clock-cells = <0>;
 173                                         clocks = <&main>;
 174                                         regmap-sfr = <&sfr>;
 175                                         bootph-all;
 176                                 };
 177
 178                                 mck: masterck {
 179                                         compatible = "atmel,at91sam9x5-clk-master";
 180                                         #clock-cells = <0>;
 181                                         clocks = <&main>, <&plladiv>, <&utmi>;
 182                                         atmel,clk-output-range = <124000000 166000000>;
 183                                         atmel,clk-divisors = <1 2 4 3>;
 184                                         bootph-all;
 185                                 };
 186
 187                                 h32ck: h32mxck {
 188                                         #clock-cells = <0>;
 189                                         compatible = "atmel,sama5d4-clk-h32mx";
 190                                         clocks = <&mck>;
 191                                         bootph-all;
 192                                 };
 193
 194                                 usb: usbck {
 195                                         compatible = "atmel,at91sam9x5-clk-usb";
 196                                         #clock-cells = <0>;
 197                                         clocks = <&plladiv>, <&utmi>;
 198                                 };
 199
 200                                 prog: progck {
 201                                         compatible = "atmel,at91sam9x5-clk-programmable";
 202                                         #address-cells = <1>;
 203                                         #size-cells = <0>;
 204                                         interrupt-parent = <&pmc>;
 205                                         clocks = <&main>, <&plladiv>, <&utmi>, <&mck>;
 206
 207                                         prog0: prog@0 {
 208                                                 #clock-cells = <0>;
 209                                                 reg = <0>;
 210                                         };
 211
 212                                         prog1: prog@1 {
 213                                                 #clock-cells = <0>;
 214                                                 reg = <1>;
 215                                         };
 216
 217                                         prog2: prog@2 {
 218                                                 #clock-cells = <0>;
 219                                                 reg = <2>;
 220                                         };
 221                                 };
 222
 223                                 systemck {
 224                                         compatible = "atmel,at91rm9200-clk-system";
 225                                         #address-cells = <1>;
 226                                         #size-cells = <0>;
 227
 228                                         ddrck: ddrck@2 {
 229                                                 #clock-cells = <0>;
 230                                                 reg = <2>;
 231                                                 clocks = <&mck>;
 232                                         };
 233
 234                                         lcdck: lcdck@3 {
 235                                                 #clock-cells = <0>;
 236                                                 reg = <3>;
 237                                                 clocks = <&mck>;
 238                                         };
 239
 240                                         uhpck: uhpck@6 {
 241                                                 #clock-cells = <0>;
 242                                                 reg = <6>;
 243                                                 clocks = <&usb>;
 244                                         };
 245
 246                                         udpck: udpck@7 {
 247                                                 #clock-cells = <0>;
 248                                                 reg = <7>;
 249                                                 clocks = <&usb>;
 250                                         };
 251
 252                                         pck0: pck0@8 {
 253                                                 #clock-cells = <0>;
 254                                                 reg = <8>;
 255                                                 clocks = <&prog0>;
 256                                         };
 257
 258                                         pck1: pck1@9 {
 259                                                 #clock-cells = <0>;
 260                                                 reg = <9>;
 261                                                 clocks = <&prog1>;
 262                                         };
 263
 264                                         pck2: pck2@10 {
 265                                                 #clock-cells = <0>;
 266                                                 reg = <10>;
 267                                                 clocks = <&prog2>;
 268                                         };
 269
 270                                         iscck: iscck@18 {
 271                                                 #clock-cells = <0>;
 272                                                 reg = <18>;
 273                                                 clocks = <&mck>;
 274                                         };
 275                                 };
 276
 277                                 periph32ck {
 278                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 279                                         #address-cells = <1>;
 280                                         #size-cells = <0>;
 281                                         clocks = <&h32ck>;
 282                                         bootph-all;
 283
 284                                         macb0_clk: macb0_clk@5 {
 285                                                 #clock-cells = <0>;
 286                                                 reg = <5>;
 287                                                 atmel,clk-output-range = <0 83000000>;
 288                                         };
 289
 290                                         tdes_clk: tdes_clk@11 {
 291                                                 #clock-cells = <0>;
 292                                                 reg = <11>;
 293                                                 atmel,clk-output-range = <0 83000000>;
 294                                         };
 295
 296                                         matrix1_clk: matrix1_clk@14 {
 297                                                 #clock-cells = <0>;
 298                                                 reg = <14>;
 299                                         };
 300
 301                                         hsmc_clk: hsmc_clk@17 {
 302                                                 #clock-cells = <0>;
 303                                                 reg = <17>;
 304                                         };
 305
 306                                         pioA_clk: pioA_clk@18 {
 307                                                 #clock-cells = <0>;
 308                                                 reg = <18>;
 309                                                 atmel,clk-output-range = <0 83000000>;
 310                                                 bootph-all;
 311                                         };
 312
 313                                         flx0_clk: flx0_clk@19 {
 314                                                 #clock-cells = <0>;
 315                                                 reg = <19>;
 316                                                 atmel,clk-output-range = <0 83000000>;
 317                                         };
 318
 319                                         flx1_clk: flx1_clk@20 {
 320                                                 #clock-cells = <0>;
 321                                                 reg = <20>;
 322                                                 atmel,clk-output-range = <0 83000000>;
 323                                         };
 324
 325                                         flx2_clk: flx2_clk@21 {
 326                                                 #clock-cells = <0>;
 327                                                 reg = <21>;
 328                                                 atmel,clk-output-range = <0 83000000>;
 329                                         };
 330
 331                                         flx3_clk: flx3_clk@22 {
 332                                                 #clock-cells = <0>;
 333                                                 reg = <22>;
 334                                                 atmel,clk-output-range = <0 83000000>;
 335                                         };
 336
 337                                         flx4_clk: flx4_clk@23 {
 338                                                 #clock-cells = <0>;
 339                                                 reg = <23>;
 340                                                 atmel,clk-output-range = <0 83000000>;
 341                                         };
 342
 343                                         uart0_clk: uart0_clk@24 {
 344                                                 #clock-cells = <0>;
 345                                                 reg = <24>;
 346                                                 atmel,clk-output-range = <0 83000000>;
 347                                                 bootph-all;
 348                                         };
 349
 350                                         uart1_clk: uart1_clk@25 {
 351                                                 #clock-cells = <0>;
 352                                                 reg = <25>;
 353                                                 atmel,clk-output-range = <0 83000000>;
 354                                                 bootph-all;
 355                                         };
 356
 357                                         uart2_clk: uart2_clk@26 {
 358                                                 #clock-cells = <0>;
 359                                                 reg = <26>;
 360                                                 atmel,clk-output-range = <0 83000000>;
 361                                                 bootph-all;
 362                                         };
 363
 364                                         uart3_clk: uart3_clk@27 {
 365                                                 #clock-cells = <0>;
 366                                                 reg = <27>;
 367                                                 atmel,clk-output-range = <0 83000000>;
 368                                         };
 369
 370                                         uart4_clk: uart4_clk@28 {
 371                                                 #clock-cells = <0>;
 372                                                 reg = <28>;
 373                                                 atmel,clk-output-range = <0 83000000>;
 374                                         };
 375
 376                                         twi0_clk: twi0_clk@29 {
 377                                                 reg = <29>;
 378                                                 #clock-cells = <0>;
 379                                                 atmel,clk-output-range = <0 83000000>;
 380                                         };
 381
 382                                         twi1_clk: twi1_clk@30 {
 383                                                 #clock-cells = <0>;
 384                                                 reg = <30>;
 385                                                 atmel,clk-output-range = <0 83000000>;
 386                                         };
 387
 388                                         spi0_clk: spi0_clk@33 {
 389                                                 #clock-cells = <0>;
 390                                                 reg = <33>;
 391                                                 atmel,clk-output-range = <0 83000000>;
 392                                                 bootph-all;
 393                                         };
 394
 395                                         spi1_clk: spi1_clk@34 {
 396                                                 #clock-cells = <0>;
 397                                                 reg = <34>;
 398                                                 atmel,clk-output-range = <0 83000000>;
 399                                         };
 400
 401                                         tcb0_clk: tcb0_clk@35 {
 402                                                 #clock-cells = <0>;
 403                                                 reg = <35>;
 404                                                 atmel,clk-output-range = <0 83000000>;
 405                                                 bootph-all;
 406                                         };
 407
 408                                         tcb1_clk: tcb1_clk@36 {
 409                                                 #clock-cells = <0>;
 410                                                 reg = <36>;
 411                                                 atmel,clk-output-range = <0 83000000>;
 412                                         };
 413
 414                                         pwm_clk: pwm_clk@38 {
 415                                                 #clock-cells = <0>;
 416                                                 reg = <38>;
 417                                                 atmel,clk-output-range = <0 83000000>;
 418                                         };
 419
 420                                         adc_clk: adc_clk@40 {
 421                                                 #clock-cells = <0>;
 422                                                 reg = <40>;
 423                                                 atmel,clk-output-range = <0 83000000>;
 424                                         };
 425
 426                                         uhphs_clk: uhphs_clk@41 {
 427                                                 #clock-cells = <0>;
 428                                                 reg = <41>;
 429                                                 atmel,clk-output-range = <0 83000000>;
 430                                         };
 431
 432                                         udphs_clk: udphs_clk@42 {
 433                                                 #clock-cells = <0>;
 434                                                 reg = <42>;
 435                                                 atmel,clk-output-range = <0 83000000>;
 436                                         };
 437
 438                                         ssc0_clk: ssc0_clk@43 {
 439                                                 #clock-cells = <0>;
 440                                                 reg = <43>;
 441                                                 atmel,clk-output-range = <0 83000000>;
 442                                         };
 443
 444                                         ssc1_clk: ssc1_clk@44 {
 445                                                 #clock-cells = <0>;
 446                                                 reg = <44>;
 447                                                 atmel,clk-output-range = <0 83000000>;
 448                                         };
 449
 450                                         trng_clk: trng_clk@47 {
 451                                                 #clock-cells = <0>;
 452                                                 reg = <47>;
 453                                                 atmel,clk-output-range = <0 83000000>;
 454                                         };
 455
 456                                         pdmic_clk: pdmic_clk@48 {
 457                                                 #clock-cells = <0>;
 458                                                 reg = <48>;
 459                                                 atmel,clk-output-range = <0 83000000>;
 460                                         };
 461
 462                                         i2s0_clk: i2s0_clk@54 {
 463                                                 #clock-cells = <0>;
 464                                                 reg = <54>;
 465                                                 atmel,clk-output-range = <0 83000000>;
 466                                         };
 467
 468                                         i2s1_clk: i2s1_clk@55 {
 469                                                 #clock-cells = <0>;
 470                                                 reg = <55>;
 471                                                 atmel,clk-output-range = <0 83000000>;
 472                                         };
 473
 474                                         can0_clk: can0_clk@56 {
 475                                                 #clock-cells = <0>;
 476                                                 reg = <56>;
 477                                                 atmel,clk-output-range = <0 83000000>;
 478                                         };
 479
 480                                         can1_clk: can1_clk@57 {
 481                                                 #clock-cells = <0>;
 482                                                 reg = <57>;
 483                                                 atmel,clk-output-range = <0 83000000>;
 484                                         };
 485
 486                                         classd_clk: classd_clk@59 {
 487                                                 #clock-cells = <0>;
 488                                                 reg = <59>;
 489                                                 atmel,clk-output-range = <0 83000000>;
 490                                         };
 491                                 };
 492
 493                                 periph64ck {
 494                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 495                                         #address-cells = <1>;
 496                                         #size-cells = <0>;
 497                                         clocks = <&mck>;
 498                                         bootph-all;
 499
 500                                         dma0_clk: dma0_clk@6 {
 501                                                 #clock-cells = <0>;
 502                                                 reg = <6>;
 503                                         };
 504
 505                                         dma1_clk: dma1_clk@7 {
 506                                                 #clock-cells = <0>;
 507                                                 reg = <7>;
 508                                         };
 509
 510                                         aes_clk: aes_clk@9 {
 511                                                 #clock-cells = <0>;
 512                                                 reg = <9>;
 513                                         };
 514
 515                                         aesb_clk: aesb_clk@10 {
 516                                                 #clock-cells = <0>;
 517                                                 reg = <10>;
 518                                         };
 519
 520                                         sha_clk: sha_clk@12 {
 521                                                 #clock-cells = <0>;
 522                                                 reg = <12>;
 523                                         };
 524
 525                                         mpddr_clk: mpddr_clk@13 {
 526                                                 #clock-cells = <0>;
 527                                                 reg = <13>;
 528                                         };
 529
 530                                         matrix0_clk: matrix0_clk@15 {
 531                                                 #clock-cells = <0>;
 532                                                 reg = <15>;
 533                                         };
 534
 535                                         sdmmc0_hclk: sdmmc0_hclk@31 {
 536                                                 #clock-cells = <0>;
 537                                                 reg = <31>;
 538                                                 bootph-all;
 539                                         };
 540
 541                                         sdmmc1_hclk: sdmmc1_hclk@32 {
 542                                                 #clock-cells = <0>;
 543                                                 reg = <32>;
 544                                                 bootph-all;
 545                                         };
 546
 547                                         lcdc_clk: lcdc_clk@45 {
 548                                                 #clock-cells = <0>;
 549                                                 reg = <45>;
 550                                         };
 551
 552                                         isc_clk: isc_clk@46 {
 553                                                 #clock-cells = <0>;
 554                                                 reg = <46>;
 555                                         };
 556
 557                                         qspi0_clk: qspi0_clk@52 {
 558                                                 #clock-cells = <0>;
 559                                                 reg = <52>;
 560                                                 bootph-all;
 561                                         };
 562
 563                                         qspi1_clk: qspi1_clk@53 {
 564                                                 #clock-cells = <0>;
 565                                                 reg = <53>;
 566                                                 bootph-all;
 567                                         };
 568                                 };
 569
 570                                 gck {
 571                                         compatible = "atmel,sama5d2-clk-generated";
 572                                         #address-cells = <1>;
 573                                         #size-cells = <0>;
 574                                         interrupt-parent = <&pmc>;
 575                                         clocks = <&main>, <&plla>, <&utmi>, <&mck>;
 576                                         bootph-all;
 577
 578                                         sdmmc0_gclk: sdmmc0_gclk@31 {
 579                                                 #clock-cells = <0>;
 580                                                 reg = <31>;
 581                                                 bootph-all;
 582                                         };
 583
 584                                         sdmmc1_gclk: sdmmc1_gclk@32 {
 585                                                 #clock-cells = <0>;
 586                                                 reg = <32>;
 587                                                 bootph-all;
 588                                         };
 589
 590                                         tcb0_gclk: tcb0_gclk@35 {
 591                                                 #clock-cells = <0>;
 592                                                 reg = <35>;
 593                                                 atmel,clk-output-range = <0 83000000>;
 594                                         };
 595
 596                                         tcb1_gclk: tcb1_gclk@36 {
 597                                                 #clock-cells = <0>;
 598                                                 reg = <36>;
 599                                                 atmel,clk-output-range = <0 83000000>;
 600                                         };
 601
 602                                         pwm_gclk: pwm_gclk@38 {
 603                                                 #clock-cells = <0>;
 604                                                 reg = <38>;
 605                                                 atmel,clk-output-range = <0 83000000>;
 606                                         };
 607
 608                                         pdmic_gclk: pdmic_gclk@48 {
 609                                                 #clock-cells = <0>;
 610                                                 reg = <48>;
 611                                         };
 612
 613                                         i2s0_gclk: i2s0_gclk@54 {
 614                                                 #clock-cells = <0>;
 615                                                 reg = <54>;
 616                                         };
 617
 618                                         i2s1_gclk: i2s1_gclk@55 {
 619                                                 #clock-cells = <0>;
 620                                                 reg = <55>;
 621                                         };
 622
 623                                         can0_gclk: can0_gclk@56 {
 624                                                 #clock-cells = <0>;
 625                                                 reg = <56>;
 626                                                 atmel,clk-output-range = <0 80000000>;
 627                                         };
 628
 629                                         can1_gclk: can1_gclk@57 {
 630                                                 #clock-cells = <0>;
 631                                                 reg = <57>;
 632                                                 atmel,clk-output-range = <0 80000000>;
 633                                         };
 634
 635                                         classd_gclk: classd_gclk@59 {
 636                                                 #clock-cells = <0>;
 637                                                 reg = <59>;
 638                                                 atmel,clk-output-range = <0 100000000>;
 639                                         };
 640                                 };
 641                         };
 642
 643                         qspi0: spi@f0020000 {
 644                                 compatible = "atmel,sama5d2-qspi";
 645                                 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
 646                                 reg-names = "qspi_base", "qspi_mmap";
 647                                 #address-cells = <1>;
 648                                 #size-cells = <0>;
 649                                 clocks = <&qspi0_clk>;
 650                                 status = "disabled";
 651                         };
 652
 653                         qspi1: spi@f0024000 {
 654                                 compatible = "atmel,sama5d2-qspi";
 655                                 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
 656                                 reg-names = "qspi_base", "qspi_mmap";
 657                                 #address-cells = <1>;
 658                                 #size-cells = <0>;
 659                                 clocks = <&qspi1_clk>;
 660                                 status = "disabled";
 661                         };
 662
 663                         spi0: spi@f8000000 {
 664                                 compatible = "atmel,at91rm9200-spi";
 665                                 reg = <0xf8000000 0x100>;
 666                                 clocks = <&spi0_clk>;
 667                                 clock-names = "spi_clk";
 668                                 #address-cells = <1>;
 669                                 #size-cells = <0>;
 670                                 status = "disabled";
 671                         };
 672
 673                         macb0: ethernet@f8008000 {
 674                                 compatible = "cdns,macb";
 675                                 reg = <0xf8008000 0x1000>;
 676                                 #address-cells = <1>;
 677                                 #size-cells = <0>;
 678                                 clocks = <&macb0_clk>, <&macb0_clk>;
 679                                 clock-names = "hclk", "pclk";
 680                                 status = "disabled";
 681                         };
 682
 683                         tcb0: timer@f800c000 {
 684                                 compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 685                                 reg = <0xf800c000 0x100>;
 686                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
 687                                 clocks = <&tcb0_clk>, <&tcb0_gclk>, <&clk32k>;
 688                                 clock-names = "t0_clk", "gclk", "slow_clk";
 689                                 #address-cells = <1>;
 690                                 #size-cells = <0>;
 691                                 bootph-all;
 692
 693                                 timer0: timer@0 {
 694                                         compatible = "atmel,tcb-timer";
 695                                         reg = <0>, <1>;
 696                                         bootph-all;
 697                                 };
 698                         };
 699
 700                         hsmc: hsmc@f8014000 {
 701                                 compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
 702                                 reg = <0xf8014000 0x1000>;
 703                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
 704                                 clocks = <&hsmc_clk>;
 705                                 #address-cells = <1>;
 706                                 #size-cells = <1>;
 707                                 ranges;
 708
 709                                 pmecc: ecc-engine@f8014070 {
 710                                         compatible = "atmel,sama5d2-pmecc";
 711                                         reg = <0xf8014070 0x490>,
 712                                               <0xf8014500 0x200>;
 713                                 };
 714                         };
 715
 716                         uart0: serial@f801c000 {
 717                                 compatible = "atmel,at91sam9260-usart";
 718                                 reg = <0xf801c000 0x100>;
 719                                 clocks = <&uart0_clk>;
 720                                 clock-names = "usart";
 721                                 status = "disabled";
 722                         };
 723
 724                         uart1: serial@f8020000 {
 725                                 compatible = "atmel,at91sam9260-usart";
 726                                 reg = <0xf8020000 0x100>;
 727                                 clocks = <&uart1_clk>;
 728                                 clock-names = "usart";
 729                                 status = "disabled";
 730                         };
 731
 732                         uart2: serial@f8024000 {
 733                                 compatible = "atmel,at91sam9260-usart";
 734                                 reg = <0xf8024000 0x100>;
 735                                 clocks = <&uart2_clk>;
 736                                 clock-names = "usart";
 737                                 status = "disabled";
 738                         };
 739
 740                         i2c0: i2c@f8028000 {
 741                                 compatible = "atmel,sama5d2-i2c";
 742                                 reg = <0xf8028000 0x100>;
 743                                 #address-cells = <1>;
 744                                 #size-cells = <0>;
 745                                 clocks = <&twi0_clk>;
 746                                 status = "disabled";
 747                         };
 748
 749                         pwm0: pwm@f802c000 {
 750                                 compatible = "atmel,sama5d2-pwm";
 751                                 reg = <0xf802c000 0x4000>;
 752                                 clocks = <&pwm_clk>;
 753                                 #pwm-cells = <3>;
 754                                 status = "disabled";
 755                         };
 756
 757                         sfr: sfr@f8030000 {
 758                                 compatible = "atmel,sama5d2-sfr", "syscon";
 759                                 reg = <0xf8030000 0x98>;
 760                         };
 761
 762                         reset_controller: reset-controller@f8048000 {
 763                                 compatible = "atmel,sama5d3-rstc";
 764                                 reg = <0xf8048000 0x10>;
 765                                 clocks = <&clk32k>;
 766                         };
 767
 768                         shutdown_controller: poweroff@f8048010 {
 769                                 compatible = "atmel,sama5d2-shdwc";
 770                                 reg = <0xf8048010 0x10>;
 771                                 clocks = <&clk32k>;
 772                                 #address-cells = <1>;
 773                                 #size-cells = <0>;
 774                                 atmel,wakeup-rtc-timer;
 775                         };
 776
 777                         pit: timer@f8048030 {
 778                                 compatible = "atmel,at91sam9260-pit";
 779                                 reg = <0xf8048030 0x10>;
 780                                 clocks = <&h32ck>;
 781                         };
 782
 783                         watchdog: watchdog@f8048040 {
 784                                 compatible = "atmel,sama5d4-wdt";
 785                                 reg = <0xf8048040 0x10>;
 786                                 clocks = <&clk32k>;
 787                                 status = "disabled";
 788                         };
 789
 790                         sckc@f8048050 {
 791                                 compatible = "atmel,at91sam9x5-sckc";
 792                                 reg = <0xf8048050 0x4>;
 793
 794                                 slow_rc_osc: slow_rc_osc {
 795                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 796                                         #clock-cells = <0>;
 797                                         clock-frequency = <32768>;
 798                                         clock-accuracy = <250000000>;
 799                                         atmel,startup-time-usec = <75>;
 800                                 };
 801
 802                                 slow_osc: slow_osc {
 803                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 804                                         #clock-cells = <0>;
 805                                         clocks = <&slow_xtal>;
 806                                         atmel,startup-time-usec = <1200000>;
 807                                 };
 808
 809                                 clk32k: slowck {
 810                                         compatible = "atmel,at91sam9x5-clk-slow";
 811                                         #clock-cells = <0>;
 812                                         clocks = <&slow_rc_osc &slow_osc>;
 813                                 };
 814                         };
 815
 816                         spi1: spi@fc000000 {
 817                                 compatible = "atmel,at91rm9200-spi";
 818                                 reg = <0xfc000000 0x100>;
 819                                 #address-cells = <1>;
 820                                 #size-cells = <0>;
 821                                 status = "disabled";
 822                         };
 823
 824                         uart3: serial@fc008000 {
 825                                 compatible = "atmel,at91sam9260-usart";
 826                                 reg = <0xfc008000 0x100>;
 827                                 clocks = <&uart3_clk>;
 828                                 clock-names = "usart";
 829                                 status = "disabled";
 830                         };
 831
 832                         uart4: serial@fc00c000 {
 833                                 compatible = "atmel,at91sam9260-usart";
 834                                 reg = <0xfc00c000 0x100>;
 835                                 clocks = <&uart4_clk>;
 836                                 clock-names = "usart";
 837                                 status = "disabled";
 838                         };
 839
 840                         flx4: flexcom@fc018000 {
 841                                 compatible = "atmel,sama5d2-flexcom";
 842                                 reg = <0xfc018000 0x200>;
 843                                 clocks = <&flx4_clk>;
 844                                 #address-cells = <1>;
 845                                 #size-cells = <1>;
 846                                 ranges = <0x0 0xfc018000 0x800>;
 847                                 status = "disabled";
 848
 849                                 i2c6: i2c@600 {
 850                                         compatible = "atmel,sama5d2-i2c";
 851                                         reg = <0x600 0x200>;
 852                                         #address-cells = <1>;
 853                                         #size-cells = <0>;
 854                                         clocks = <&flx4_clk>;
 855                                         clock-names = "i2c6_clk";
 856                                         status = "disabled";
 857                                 };
 858                         };
 859
 860                         aic: interrupt-controller@fc020000 {
 861                                 #interrupt-cells = <3>;
 862                                 compatible = "atmel,sama5d2-aic";
 863                                 interrupt-controller;
 864                                 reg = <0xfc020000 0x200>;
 865                                 atmel,external-irqs = <49>;
 866                         };
 867
 868                         i2c1: i2c@fc028000 {
 869                                 compatible = "atmel,sama5d2-i2c";
 870                                 reg = <0xfc028000 0x100>;
 871                                 #address-cells = <1>;
 872                                 #size-cells = <0>;
 873                                 clocks = <&twi1_clk>;
 874                                 status = "disabled";
 875                         };
 876
 877                         pioA: pinctrl@fc038000 {
 878                                 compatible = "atmel,sama5d2-pinctrl";
 879                                 reg = <0xfc038000 0x600>;
 880                                 clocks = <&pioA_clk>;
 881                                 gpio-controller;
 882                                 #gpio-cells = <2>;
 883                                 bootph-all;
 884                         };
 885                 };
 886         };
 887
 888         onewire_tm: onewire {
 889                 compatible = "w1-gpio";
 890                 status = "disabled";
 891         };
 892 };