Merge tag 'u-boot-rockchip-20201031' of https://gitlab.denx.de/u-boot/custodians...
[platform/kernel/u-boot.git] / arch / arm / dts / s5p4418.dtsi
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2020 Stefan Bosch <stefan_b@posteo.net>
4  *
5  * (C) Copyright 2016 Nexell
6  * Youngbok, Park <park@nexell.co.kr>
7  *
8  */
9
10 #include "skeleton.dtsi"
11
12 / {
13         #include "s5p4418-pinctrl.dtsi"
14
15         aliases {
16                 mmc0 = &mmc0;
17                 mmc1 = &mmc1;
18                 mmc2 = &mmc2;
19                 gmac = "/ethernet@c0060000";
20         };
21
22         mmc2:mmc@c0069000 {
23                 #address-cells = <1>;
24                 #size-cells = <0>;
25                 compatible = "nexell,nexell-dwmmc";
26                 reg = <0xc0069000 0x1000>;
27                 bus-width = <4>;
28                 index = <2>;
29                 max-frequency = <50000000>;
30                 pinctrl-names = "default";
31                 pinctrl-0 = <&mmc2_clk>, <&mmc2_cmd>, <&mmc2_bus4>;
32                 status = "disabled";
33         };
34
35         mmc1:mmc@c0068000 {
36                 #address-cells = <1>;
37                 #size-cells = <0>;
38                 compatible = "nexell,nexell-dwmmc";
39                 reg = <0xc0068000 0x1000>;
40                 bus-width = <4>;
41                 index = <1>;
42                 max-frequency = <50000000>;
43                 pinctrl-names = "default";
44                 pinctrl-0 = <&mmc1_clk>, <&mmc1_cmd>, <&mmc1_bus4>;
45                 status = "disabled";
46         };
47
48         mmc0:mmc@c0062000 {
49                 #address-cells = <1>;
50                 #size-cells = <0>;
51                 compatible = "nexell,nexell-dwmmc";
52                 reg = <0xc0062000 0x1000>;
53                 bus-width = <4>;
54                 index = <0>;
55                 max-frequency = <50000000>;
56                 pinctrl-names = "default";
57                 pinctrl-0 = <&mmc0_clk>, <&mmc0_cmd>, <&mmc0_bus4>;
58                 status = "disabled";
59         };
60
61         i2c0:i2c@c00a4000 {
62                 #address-cells = <1>;
63                 #size-cells = <0>;
64                 compatible = "nexell,s5pxx18-i2c";
65                 reg = <0xc00a4000 0x100>;
66                 clock-frequency = <100000>;
67                 pinctrl-names = "default";
68                 pinctrl-0 = <&i2c0_sda>, <&i2c0_scl>;
69                 status ="disabled";
70         };
71
72         i2c1:i2c@c00a5000 {
73                 #address-cells = <1>;
74                 #size-cells = <0>;
75                 compatible = "nexell,s5pxx18-i2c";
76                 reg = <0xc00a5000 0x100>;
77                 clock-frequency = <100000>;
78                 pinctrl-names = "default";
79                 pinctrl-0 = <&i2c1_sda>, <&i2c1_scl>;
80                 status ="disabled";
81         };
82
83         i2c2:i2c@c00a6000 {
84                 #address-cells = <1>;
85                 #size-cells = <0>;
86                 compatible = "nexell,s5pxx18-i2c";
87                 reg = <0xc00a6000 0x100>;
88                 clock-frequency = <100000>;
89                 pinctrl-names = "default";
90                 pinctrl-0 = <&i2c2_sda>, <&i2c2_scl>;
91                 status ="disabled";
92         };
93
94         dp0:dp@c0102800 {
95                 compatible = "nexell,nexell-display";
96                 reg = <0xc0102800 0x100>;
97                 index = <0>;
98                 u-boot,dm-pre-reloc;
99                 status = "disabled";
100         };
101
102         dp1:dp@c0102c00 {
103                 #address-cells = <1>;
104                 #size-cells = <0>;
105                 compatible = "nexell,nexell-display";
106                 reg = <0xc0102c00 0x100>;
107                 index = <1>;
108                 status = "disabled";
109         };
110
111         gpio_a:gpio@c001a000 {
112                 compatible = "nexell,nexell-gpio";
113                 reg = <0xc001a000 0x00000010>;
114                 altr,gpio-bank-width = <32>;
115                 gpio-bank-name = "gpio_a";
116                 gpio-controller;
117                 #gpio-cells = <2>;
118         };
119
120         gpio_b:gpio@c001b000 {
121                 compatible = "nexell,nexell-gpio";
122                 reg = <0xc001b000 0x00000010>;
123                 altr,gpio-bank-width = <32>;
124                 gpio-bank-name = "gpio_b";
125                 gpio-controller;
126                 #gpio-cells = <2>;
127         };
128
129         gpio_c:gpio@c001c000 {
130                 compatible = "nexell,nexell-gpio";
131                 reg = <0xc001c000 0x00000010>;
132                 nexell,gpio-bank-width = <32>;
133                 gpio-bank-name = "gpio_c";
134                 gpio-controller;
135                 #gpio-cells = <2>;
136         };
137
138         gpio_d:gpio@c001d000 {
139                 compatible = "nexell,nexell-gpio";
140                 reg = <0xc001d000 0x00000010>;
141                 nexell,gpio-bank-width = <32>;
142                 gpio-bank-name = "gpio_d";
143                 gpio-controller;
144                 #gpio-cells = <2>;
145         };
146
147         gpio_e:gpio@c001e000 {
148                 compatible = "nexell,nexell-gpio";
149                 reg = <0xc001e000 0x00000010>;
150                 nexell,gpio-bank-width = <32>;
151                 gpio-bank-name = "gpio_e";
152                 gpio-controller;
153                 #gpio-cells = <2>;
154         };
155
156         gpio_alv:gpio@c0010800 {
157                 compatible = "nexell,nexell-gpio";
158                 reg = <0xc0010800 0x00000010>;
159                 nexell,gpio-bank-width = <32>;
160                 gpio-bank-name = "gpio_alv";
161                 gpio-controller;
162                 #gpio-cells = <2>;
163         };
164
165         pinctrl@C0010000 {
166                 compatible = "nexell,s5pxx18-pinctrl";
167                 reg = <0xc0010000 0xf000>;
168                 u-boot,dm-pre-reloc;
169         };
170 };