1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
15 stdout-path = "serial2:1500000n8";
18 clkin_gmac: external-gmac-clock {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "clkin_gmac";
25 sdio_pwrseq: sdio-pwrseq {
26 compatible = "mmc-pwrseq-simple";
28 clock-names = "ext_clock";
29 pinctrl-names = "default";
30 pinctrl-0 = <&wifi_enable_h>;
31 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
35 compatible = "regulator-fixed";
36 regulator-name = "vcc12v_dcin";
39 regulator-min-microvolt = <12000000>;
40 regulator-max-microvolt = <12000000>;
44 compatible = "regulator-fixed";
45 regulator-name = "vcc5v0_sys";
48 regulator-min-microvolt = <5000000>;
49 regulator-max-microvolt = <5000000>;
50 vin-supply = <&vcc12v_dcin>;
54 compatible = "regulator-fixed";
55 regulator-name = "vcc_0v9";
58 regulator-min-microvolt = <900000>;
59 regulator-max-microvolt = <900000>;
60 vin-supply = <&vcc3v3_sys>;
63 vcc3v3_pcie: vcc3v3-pcie-regulator {
64 compatible = "regulator-fixed";
66 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&pcie_pwr_en>;
69 regulator-name = "vcc3v3_pcie";
72 vin-supply = <&vcc5v0_sys>;
75 vcc3v3_sys: vcc3v3-sys {
76 compatible = "regulator-fixed";
77 regulator-name = "vcc3v3_sys";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 vin-supply = <&vcc5v0_sys>;
85 vcc5v0_host: vcc5v0-host-regulator {
86 compatible = "regulator-fixed";
88 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&vcc5v0_host_en>;
91 regulator-name = "vcc5v0_host";
93 vin-supply = <&vcc5v0_sys>;
96 vcc5v0_typec: vcc5v0-typec-regulator {
97 compatible = "regulator-fixed";
99 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&vcc5v0_typec_en>;
102 regulator-name = "vcc5v0_typec";
104 vin-supply = <&vcc5v0_sys>;
107 vcc_lan: vcc3v3-phy-regulator {
108 compatible = "regulator-fixed";
109 regulator-name = "vcc_lan";
112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <3300000>;
115 regulator-state-mem {
116 regulator-off-in-suspend;
121 compatible = "pwm-regulator";
122 pwms = <&pwm2 0 25000 1>;
123 regulator-name = "vdd_log";
126 regulator-min-microvolt = <800000>;
127 regulator-max-microvolt = <1400000>;
128 vin-supply = <&vcc5v0_sys>;
133 cpu-supply = <&vdd_cpu_l>;
137 cpu-supply = <&vdd_cpu_l>;
141 cpu-supply = <&vdd_cpu_l>;
145 cpu-supply = <&vdd_cpu_l>;
149 cpu-supply = <&vdd_cpu_b>;
153 cpu-supply = <&vdd_cpu_b>;
161 assigned-clocks = <&cru SCLK_RMII_SRC>;
162 assigned-clock-parents = <&clkin_gmac>;
163 clock_in_out = "input";
164 phy-supply = <&vcc_lan>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&rgmii_pins>;
168 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
169 snps,reset-active-low;
170 snps,reset-delays-us = <0 10000 50000>;
177 mali-supply = <&vdd_gpu>;
182 ddc-i2c-bus = <&i2c3>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&hdmi_cec>;
193 clock-frequency = <400000>;
194 i2c-scl-rising-time-ns = <168>;
195 i2c-scl-falling-time-ns = <4>;
199 compatible = "rockchip,rk808";
201 interrupt-parent = <&gpio1>;
202 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
204 clock-output-names = "xin32k", "rk808-clkout2";
205 pinctrl-names = "default";
206 pinctrl-0 = <&pmic_int_l>;
207 rockchip,system-power-controller;
210 vcc1-supply = <&vcc5v0_sys>;
211 vcc2-supply = <&vcc5v0_sys>;
212 vcc3-supply = <&vcc5v0_sys>;
213 vcc4-supply = <&vcc5v0_sys>;
214 vcc6-supply = <&vcc5v0_sys>;
215 vcc7-supply = <&vcc5v0_sys>;
216 vcc8-supply = <&vcc3v3_sys>;
217 vcc9-supply = <&vcc5v0_sys>;
218 vcc10-supply = <&vcc5v0_sys>;
219 vcc11-supply = <&vcc5v0_sys>;
220 vcc12-supply = <&vcc3v3_sys>;
221 vddio-supply = <&vcc_1v8>;
224 vdd_center: DCDC_REG1 {
225 regulator-name = "vdd_center";
228 regulator-min-microvolt = <750000>;
229 regulator-max-microvolt = <1350000>;
230 regulator-ramp-delay = <6001>;
231 regulator-state-mem {
232 regulator-off-in-suspend;
236 vdd_cpu_l: DCDC_REG2 {
237 regulator-name = "vdd_cpu_l";
240 regulator-min-microvolt = <750000>;
241 regulator-max-microvolt = <1350000>;
242 regulator-ramp-delay = <6001>;
243 regulator-state-mem {
244 regulator-off-in-suspend;
249 regulator-name = "vcc_ddr";
252 regulator-state-mem {
253 regulator-on-in-suspend;
258 regulator-name = "vcc_1v8";
261 regulator-min-microvolt = <1800000>;
262 regulator-max-microvolt = <1800000>;
263 regulator-state-mem {
264 regulator-on-in-suspend;
265 regulator-suspend-microvolt = <1800000>;
269 vcc1v8_codec: LDO_REG1 {
270 regulator-name = "vcc1v8_codec";
273 regulator-min-microvolt = <1800000>;
274 regulator-max-microvolt = <1800000>;
275 regulator-state-mem {
276 regulator-off-in-suspend;
280 vcc1v8_hdmi: LDO_REG2 {
281 regulator-name = "vcc1v8_hdmi";
284 regulator-min-microvolt = <1800000>;
285 regulator-max-microvolt = <1800000>;
286 regulator-state-mem {
287 regulator-off-in-suspend;
292 regulator-name = "vcca_1v8";
295 regulator-min-microvolt = <1800000>;
296 regulator-max-microvolt = <1800000>;
297 regulator-state-mem {
298 regulator-on-in-suspend;
299 regulator-suspend-microvolt = <1800000>;
304 regulator-name = "vcc_sdio";
307 regulator-min-microvolt = <3000000>;
308 regulator-max-microvolt = <3000000>;
309 regulator-state-mem {
310 regulator-on-in-suspend;
311 regulator-suspend-microvolt = <3000000>;
315 vcca3v0_codec: LDO_REG5 {
316 regulator-name = "vcca3v0_codec";
319 regulator-min-microvolt = <3000000>;
320 regulator-max-microvolt = <3000000>;
321 regulator-state-mem {
322 regulator-off-in-suspend;
327 regulator-name = "vcc_1v5";
330 regulator-min-microvolt = <1500000>;
331 regulator-max-microvolt = <1500000>;
332 regulator-state-mem {
333 regulator-on-in-suspend;
334 regulator-suspend-microvolt = <1500000>;
338 vcc0v9_hdmi: LDO_REG7 {
339 regulator-name = "vcc0v9_hdmi";
342 regulator-min-microvolt = <900000>;
343 regulator-max-microvolt = <900000>;
344 regulator-state-mem {
345 regulator-off-in-suspend;
350 regulator-name = "vcc_3v0";
353 regulator-min-microvolt = <3000000>;
354 regulator-max-microvolt = <3000000>;
355 regulator-state-mem {
356 regulator-on-in-suspend;
357 regulator-suspend-microvolt = <3000000>;
361 vcc_cam: SWITCH_REG1 {
362 regulator-name = "vcc_cam";
365 regulator-min-microvolt = <3300000>;
366 regulator-max-microvolt = <3300000>;
367 regulator-state-mem {
368 regulator-off-in-suspend;
372 vcc_mipi: SWITCH_REG2 {
373 regulator-name = "vcc_mipi";
376 regulator-min-microvolt = <3300000>;
377 regulator-max-microvolt = <3300000>;
378 regulator-state-mem {
379 regulator-off-in-suspend;
385 vdd_cpu_b: regulator@40 {
386 compatible = "silergy,syr827";
388 fcs,suspend-voltage-selector = <1>;
389 pinctrl-names = "default";
390 pinctrl-0 = <&vsel1_gpio>;
391 regulator-name = "vdd_cpu_b";
392 regulator-min-microvolt = <712500>;
393 regulator-max-microvolt = <1500000>;
394 regulator-ramp-delay = <1000>;
397 vin-supply = <&vcc5v0_sys>;
399 regulator-state-mem {
400 regulator-off-in-suspend;
404 vdd_gpu: regulator@41 {
405 compatible = "silergy,syr828";
407 fcs,suspend-voltage-selector = <1>;
408 pinctrl-names = "default";
409 pinctrl-0 = <&vsel2_gpio>;
410 regulator-name = "vdd_gpu";
411 regulator-min-microvolt = <712500>;
412 regulator-max-microvolt = <1500000>;
413 regulator-ramp-delay = <1000>;
416 vin-supply = <&vcc5v0_sys>;
418 regulator-state-mem {
419 regulator-off-in-suspend;
425 i2c-scl-rising-time-ns = <300>;
426 i2c-scl-falling-time-ns = <15>;
431 i2c-scl-rising-time-ns = <450>;
432 i2c-scl-falling-time-ns = <15>;
437 i2c-scl-rising-time-ns = <600>;
438 i2c-scl-falling-time-ns = <20>;
443 rockchip,playback-channels = <8>;
444 rockchip,capture-channels = <8>;
449 rockchip,playback-channels = <2>;
450 rockchip,capture-channels = <2>;
461 bt656-supply = <&vcc_3v0>;
462 audio-supply = <&vcc_3v0>;
463 sdmmc-supply = <&vcc_sdio>;
464 gpio1830-supply = <&vcc_3v0>;
470 pmu1830-supply = <&vcc_3v0>;
478 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
479 max-link-speed = <2>;
481 pinctrl-0 = <&pcie_clkreqnb_cpm>;
482 pinctrl-names = "default";
483 vpcie0v9-supply = <&vcc_0v9>;
484 vpcie1v8-supply = <&vcc_1v8>;
485 vpcie3v3-supply = <&vcc3v3_pcie>;
491 bt_enable_h: bt-enable-h {
492 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
495 bt_host_wake_l: bt-host-wake-l {
496 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
499 bt_wake_l: bt-wake-l {
500 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
505 pcie_pwr_en: pcie-pwr-en {
506 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
511 sdio0_bus4: sdio0-bus4 {
512 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
513 <2 RK_PC5 1 &pcfg_pull_up_20ma>,
514 <2 RK_PC6 1 &pcfg_pull_up_20ma>,
515 <2 RK_PC7 1 &pcfg_pull_up_20ma>;
518 sdio0_cmd: sdio0-cmd {
519 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
522 sdio0_clk: sdio0-clk {
523 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
528 pmic_int_l: pmic-int-l {
529 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
532 vsel1_gpio: vsel1-gpio {
533 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
536 vsel2_gpio: vsel2-gpio {
537 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
542 vcc5v0_typec_en: vcc5v0-typec-en {
543 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
548 vcc5v0_host_en: vcc5v0-host-en {
549 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
554 wifi_enable_h: wifi-enable-h {
555 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
558 wifi_host_wake_l: wifi-host-wake-l {
559 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
571 vref-supply = <&vcc_1v8>;
575 #address-cells = <1>;
578 clock-frequency = <50000000>;
581 keep-power-in-suspend;
582 mmc-pwrseq = <&sdio_pwrseq>;
584 pinctrl-names = "default";
585 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
593 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
595 max-frequency = <150000000>;
596 pinctrl-names = "default";
597 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
604 mmc-hs400-enhanced-strobe;
620 /* tshut mode 0:CRU 1:GPIO */
621 rockchip,hw-tshut-mode = <1>;
622 /* tshut polarity 0:LOW 1:HIGH */
623 rockchip,hw-tshut-polarity = <1>;
629 u2phy0_otg: otg-port {
633 u2phy0_host: host-port {
634 phy-supply = <&vcc5v0_host>;
642 u2phy1_otg: otg-port {
646 u2phy1_host: host-port {
647 phy-supply = <&vcc5v0_host>;
653 pinctrl-names = "default";
654 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;