2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
14 model = "Rockchip RK3399 Evaluation Board";
15 compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
16 "google,rk3399evb-rev2";
22 vdd_center: vdd-center {
23 compatible = "pwm-regulator";
24 pwms = <&pwm3 0 25000 1>;
25 regulator-name = "vdd_center";
26 regulator-min-microvolt = <800000>;
27 regulator-max-microvolt = <1400000>;
28 regulator-init-microvolt = <950000>;
35 compatible = "regulator-fixed";
36 regulator-name = "vccsys";
41 vcc3v3_sys: vcc3v3-sys {
42 compatible = "regulator-fixed";
43 regulator-name = "vcc3v3_sys";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
50 vcc_phy: vcc-phy-regulator {
51 compatible = "regulator-fixed";
52 regulator-name = "vcc_phy";
57 vcc5v0_host: vcc5v0-host-en {
58 compatible = "regulator-fixed";
59 regulator-name = "vcc5v0_host";
60 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
63 clkin_gmac: external-gmac-clock {
64 compatible = "fixed-clock";
65 clock-frequency = <125000000>;
66 clock-output-names = "clkin_gmac";
70 backlight: backlight {
71 compatible = "pwm-backlight";
72 power-supply = <&vccsys>;
73 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
77 16 17 18 19 20 21 22 23
78 24 25 26 27 28 29 30 31
79 32 33 34 35 36 37 38 39
80 40 41 42 43 44 45 46 47
81 48 49 50 51 52 53 54 55
82 56 57 58 59 60 61 62 63
83 64 65 66 67 68 69 70 71
84 72 73 74 75 76 77 78 79
85 80 81 82 83 84 85 86 87
86 88 89 90 91 92 93 94 95
87 96 97 98 99 100 101 102 103
88 104 105 106 107 108 109 110 111
89 112 113 114 115 116 117 118 119
90 120 121 122 123 124 125 126 127
91 128 129 130 131 132 133 134 135
92 136 137 138 139 140 141 142 143
93 144 145 146 147 148 149 150 151
94 152 153 154 155 156 157 158 159
95 160 161 162 163 164 165 166 167
96 168 169 170 171 172 173 174 175
97 176 177 178 179 180 181 182 183
98 184 185 186 187 188 189 190 191
99 192 193 194 195 196 197 198 199
100 200 201 202 203 204 205 206 207
101 208 209 210 211 212 213 214 215
102 216 217 218 219 220 221 222 223
103 224 225 226 227 228 229 230 231
104 232 233 234 235 236 237 238 239
105 240 241 242 243 244 245 246 247
106 248 249 250 251 252 253 254 255>;
107 default-brightness-level = <200>;
108 pwms = <&pwm0 0 25000 0>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&pwm0_pin>;
111 pwm-delay-us = <10000>;
116 compatible = "simple-panel";
117 power-supply = <&vcc33_lcd>;
118 backlight = <&backlight>;
119 /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
148 mmc-hs400-enhanced-strobe;
166 rockchip,vbus-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
179 rockchip,vbus-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
185 clock-frequency = <400000>;
186 i2c-scl-falling-time-ns = <50>;
187 i2c-scl-rising-time-ns = <100>;
191 compatible = "rockchip,rk808";
192 clock-output-names = "xin32k", "wifibt_32kin";
193 interrupt-parent = <&gpio0>;
194 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pmic_int_l>;
198 rockchip,system-power-controller;
203 vcc12-supply = <&vcc3v3_sys>;
206 vcc33_lcd: SWITCH_REG2 {
209 regulator-name = "vcc33_lcd";
217 rockchip,panel = <&panel>;
220 bits-per-pixel = <24>;
221 clock-frequency = <160000000>;
222 hfront-porch = <120>;
233 pixelclk-active = <0>;
240 pmic_int_l: pmic-int-l {
242 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
245 pmic_dvs2: pmic-dvs2 {
247 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
253 phy-supply = <&vcc_phy>;
255 clock_in_out = "input";
256 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
257 snps,reset-active-low;
258 snps,reset-delays-us = <0 10000 50000>;
259 assigned-clocks = <&cru SCLK_RMII_SRC>;
260 assigned-clock-parents = <&clkin_gmac>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&rgmii_pins>;
269 phy-supply = <&vcc_phy>;
271 clock_in_out = "input";
272 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
273 snps,reset-active-low;
274 snps,reset-delays-us = <0 10000 50000>;
275 assigned-clocks = <&cru SCLK_RMII_SRC>;
276 assigned-clock-parents = <&clkin_gmac>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&rgmii_pins>;