arch/arm/dts/rk3368-lion-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
   4  */
   5
   6 / {
   7         config {
   8                 u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
   9                 u-boot,mmc-env-offset = <0x4000>;      /* @  16KB */
  10         };
  11
  12         chosen {
  13                 stdout-path = "serial0:115200n8";
  14                 u-boot,spl-boot-order = &emmc, &sdmmc;
  15         };
  16
  17         smbios {
  18                 compatible = "u-boot,sysinfo-smbios";
  19
  20                 smbios {
  21                         system {
  22                                 manufacturer = "rockchip";
  23                                 product = "sheep_rk3368";
  24                         };
  25
  26                         baseboard {
  27                                 manufacturer = "rockchip";
  28                                 product = "sheep_rk3368";
  29                         };
  30
  31                         chassis {
  32                                 manufacturer = "rockchip";
  33                                 product = "sheep_rk3368";
  34                         };
  35                 };
  36         };
  37 };
  38
  39 &pinctrl {
  40         u-boot,dm-pre-reloc;
  41 };
  42
  43 &service_msch {
  44         u-boot,dm-pre-reloc;
  45 };
  46
  47 &dmc {
  48         u-boot,dm-pre-reloc;
  49
  50         /*
  51          * Validation of throughput using SPEC2000 shows the following
  52          * relative performance for the different memory schedules:
  53          *  - CBDR: 30.1
  54          *  - CBRD: 29.8
  55          *  - CRBD: 29.9
  56          * Note that the best performance for any given application workload
  57          * may vary from the default configured here (e.g. 164.gzip is fastest
  58          * with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD).
  59          *
  60          * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
  61          * details on the 'rockchip,memory-schedule' property and how it
  62          * affects the physical-address to device-address mapping.
  63          */
  64         rockchip,memory-schedule = <DMC_MSCH_CBDR>;
  65         rockchip,ddr-frequency = <800000000>;
  66         rockchip,ddr-speed-bin = <DDR3_1600K>;
  67
  68         status = "okay";
  69 };
  70
  71 &pmugrf {
  72         u-boot,dm-pre-reloc;
  73 };
  74
  75 &sgrf {
  76         u-boot,dm-pre-reloc;
  77 };
  78
  79 &cru {
  80         u-boot,dm-pre-reloc;
  81 };
  82
  83 &grf {
  84         u-boot,dm-pre-reloc;
  85 };
  86
  87 &uart0 {
  88         u-boot,dm-pre-reloc;
  89 };
  90
  91 &emmc {
  92         u-boot,dm-spl;
  93 };
  94
  95 &sdmmc {
  96         u-boot,dm-spl;
  97 };
  98
  99 &spi1 {
 100         u-boot,dm-spl;
 101
 102         spiflash: w25q32dw@0 {
 103                 u-boot,dm-spl;
 104         };
 105 };
 106
 107 &timer0 {
 108         u-boot,dm-pre-reloc;
 109         clock-frequency = <24000000>;
 110         status = "okay";
 111 };
 112
 113