1 // SPDX-License-Identifier: GPL-2.0
3 * Google Veyron Jerry Rev 3+ board device tree source
5 * Copyright 2014 Google, Inc
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "cros-ec-sbs.dtsi"
13 model = "Google Jerry";
14 compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
15 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
16 "google,veyron-jerry-rev3", "google,veyron-jerry",
17 "google,veyron", "rockchip,rk3288";
23 panel_regulator: panel-regulator {
24 compatible = "regulator-fixed";
26 gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
27 pinctrl-names = "default";
28 pinctrl-0 = <&lcd_enable_h>;
29 regulator-name = "panel_regulator";
30 vin-supply = <&vcc33_sys>;
33 vcc18_lcd: vcc18-lcd {
34 compatible = "regulator-fixed";
36 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&avdd_1v8_disp_en>;
39 regulator-name = "vcc18_lcd";
42 vin-supply = <&vcc18_wl>;
45 backlight_regulator: backlight-regulator {
46 compatible = "regulator-fixed";
48 gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
49 pinctrl-names = "default";
50 pinctrl-0 = <&bl_pwr_en>;
51 regulator-name = "backlight_regulator";
52 vin-supply = <&vcc33_sys>;
53 startup-delay-us = <15000>;
57 compatible = "rockchip,audio-max98090-jerry";
64 sound-dai = <&max98090 0>;
71 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
76 power-supply = <&backlight_regulator>;
80 power-supply= <&panel_regulator>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
86 dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
87 <&gpio7 15 GPIO_ACTIVE_HIGH>;
93 regulator-min-microvolt = <1800000>;
94 regulator-max-microvolt = <1800000>;
95 regulator-name = "mic_vcc";
96 regulator-suspend-mem-disabled;
102 pinctrl-names = "default";
103 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
110 gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&drv_5v>;
117 gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
118 pinctrl-names = "default";
119 pinctrl-0 = <&vcc50_hdmi_en>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&edp_hpd>;
129 bl_pwr_en: bl_pwr_en {
130 rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
136 rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
141 /* Make sure eMMC is not in reset */
142 emmc_deassert_reset: emmc-deassert-reset {
143 rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
148 vcc50_hdmi_en: vcc50-hdmi-en {
149 rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
154 lcd_enable_h: lcd-en {
155 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
158 avdd_1v8_disp_en: avdd-1v8-disp-en {
159 rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
165 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
169 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
178 * Trackpad pin control is shared between Elan and Synaptics devices
179 * so we have to pull it up to the bus level.
181 pinctrl-names = "default";
182 pinctrl-0 = <&i2c4_xfer &trackpad_int>;
185 compatible = "elan,i2c_touchpad";
186 interrupt-parent = <&gpio7>;
187 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
189 * Remove the inherited pinctrl settings to avoid clashing
190 * with bus-wide ones.
192 /delete-property/pinctrl-names;
193 /delete-property/pinctrl-0;
195 vcc-supply = <&vcc33_io>;
200 compatible = "hid-over-i2c";
201 interrupt-parent = <&gpio7>;
202 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
204 hid-descr-addr = <0x0020>;
205 vcc-supply = <&vcc33_io>;