1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the r8a77995 SoC
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2017 Glider bvba
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
14 compatible = "renesas,r8a77995";
19 compatible = "arm,psci-1.0", "arm,psci-0.2";
28 compatible = "arm,cortex-a53", "arm,armv8";
31 power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
32 next-level-cache = <&L2_CA53>;
33 enable-method = "psci";
36 L2_CA53: cache-controller-1 {
38 power-domains = <&sysc R8A77995_PD_CA53_SCU>;
45 compatible = "fixed-clock";
47 /* This value must be overridden by the board */
48 clock-frequency = <0>;
51 /* External CAN clock - to be overridden by boards that provide it */
53 compatible = "fixed-clock";
55 clock-frequency = <0>;
59 compatible = "arm,cortex-a53-pmu";
60 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
64 compatible = "fixed-clock";
66 clock-frequency = <0>;
70 compatible = "simple-bus";
71 interrupt-parent = <&gic>;
76 gic: interrupt-controller@f1010000 {
77 compatible = "arm,gic-400";
78 #interrupt-cells = <3>;
81 reg = <0x0 0xf1010000 0 0x1000>,
82 <0x0 0xf1020000 0 0x20000>,
83 <0x0 0xf1040000 0 0x20000>,
84 <0x0 0xf1060000 0 0x20000>;
85 interrupts = <GIC_PPI 9
86 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
87 clocks = <&cpg CPG_MOD 408>;
89 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
93 rwdt: watchdog@e6020000 {
94 compatible = "renesas,r8a77995-wdt",
95 "renesas,rcar-gen3-wdt";
96 reg = <0 0xe6020000 0 0x0c>;
97 clocks = <&cpg CPG_MOD 402>;
98 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
103 ipmmu_vi0: mmu@febd0000 {
104 compatible = "renesas,ipmmu-r8a77995";
105 reg = <0 0xfebd0000 0 0x1000>;
106 renesas,ipmmu-main = <&ipmmu_mm 14>;
111 ipmmu_vp0: mmu@fe990000 {
112 compatible = "renesas,ipmmu-r8a77995";
113 reg = <0 0xfe990000 0 0x1000>;
114 renesas,ipmmu-main = <&ipmmu_mm 16>;
119 ipmmu_vc0: mmu@fe6b0000 {
120 compatible = "renesas,ipmmu-r8a77995";
121 reg = <0 0xfe6b0000 0 0x1000>;
122 renesas,ipmmu-main = <&ipmmu_mm 12>;
127 ipmmu_pv0: mmu@fd800000 {
128 compatible = "renesas,ipmmu-r8a77995";
129 reg = <0 0xfd800000 0 0x1000>;
130 renesas,ipmmu-main = <&ipmmu_mm 6>;
135 ipmmu_hc: mmu@e6570000 {
136 compatible = "renesas,ipmmu-r8a77995";
137 reg = <0 0xe6570000 0 0x1000>;
138 renesas,ipmmu-main = <&ipmmu_mm 2>;
143 ipmmu_rt: mmu@ffc80000 {
144 compatible = "renesas,ipmmu-r8a77995";
145 reg = <0 0xffc80000 0 0x1000>;
146 renesas,ipmmu-main = <&ipmmu_mm 10>;
151 ipmmu_mp: mmu@ec670000 {
152 compatible = "renesas,ipmmu-r8a77995";
153 reg = <0 0xec670000 0 0x1000>;
154 renesas,ipmmu-main = <&ipmmu_mm 4>;
159 ipmmu_ds0: mmu@e6740000 {
160 compatible = "renesas,ipmmu-r8a77995";
161 reg = <0 0xe6740000 0 0x1000>;
162 renesas,ipmmu-main = <&ipmmu_mm 0>;
167 ipmmu_ds1: mmu@e7740000 {
168 compatible = "renesas,ipmmu-r8a77995";
169 reg = <0 0xe7740000 0 0x1000>;
170 renesas,ipmmu-main = <&ipmmu_mm 1>;
175 ipmmu_mm: mmu@e67b0000 {
176 compatible = "renesas,ipmmu-r8a77995";
177 reg = <0 0xe67b0000 0 0x1000>;
178 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
179 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
185 cpg: clock-controller@e6150000 {
186 compatible = "renesas,r8a77995-cpg-mssr";
187 reg = <0 0xe6150000 0 0x1000>;
188 clocks = <&extal_clk>;
189 clock-names = "extal";
191 #power-domain-cells = <0>;
195 rst: reset-controller@e6160000 {
196 compatible = "renesas,r8a77995-rst";
197 reg = <0 0xe6160000 0 0x0200>;
200 pfc: pin-controller@e6060000 {
201 compatible = "renesas,pfc-r8a77995";
202 reg = <0 0xe6060000 0 0x508>;
205 prr: chipid@fff00044 {
206 compatible = "renesas,prr";
207 reg = <0 0xfff00044 0 4>;
210 sysc: system-controller@e6180000 {
211 compatible = "renesas,r8a77995-sysc";
212 reg = <0 0xe6180000 0 0x0400>;
213 #power-domain-cells = <1>;
216 intc_ex: interrupt-controller@e61c0000 {
217 compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
218 #interrupt-cells = <2>;
219 interrupt-controller;
220 reg = <0 0xe61c0000 0 0x200>;
221 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
222 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
223 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
224 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
225 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
226 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
227 clocks = <&cpg CPG_MOD 407>;
228 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
232 dmac0: dma-controller@e6700000 {
233 compatible = "renesas,dmac-r8a77995",
235 reg = <0 0xe6700000 0 0x10000>;
236 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
237 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
238 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
239 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
240 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
241 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
242 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
243 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
244 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
245 interrupt-names = "error",
246 "ch0", "ch1", "ch2", "ch3",
247 "ch4", "ch5", "ch6", "ch7";
248 clocks = <&cpg CPG_MOD 219>;
250 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
256 dmac1: dma-controller@e7300000 {
257 compatible = "renesas,dmac-r8a77995",
259 reg = <0 0xe7300000 0 0x10000>;
260 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
261 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
262 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
263 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
264 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
265 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
266 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
267 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
268 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
269 interrupt-names = "error",
270 "ch0", "ch1", "ch2", "ch3",
271 "ch4", "ch5", "ch6", "ch7";
272 clocks = <&cpg CPG_MOD 218>;
274 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
280 dmac2: dma-controller@e7310000 {
281 compatible = "renesas,dmac-r8a77995",
283 reg = <0 0xe7310000 0 0x10000>;
284 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
285 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
286 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
287 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
288 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
289 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
290 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
291 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
292 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
293 interrupt-names = "error",
294 "ch0", "ch1", "ch2", "ch3",
295 "ch4", "ch5", "ch6", "ch7";
296 clocks = <&cpg CPG_MOD 217>;
298 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
304 gpio0: gpio@e6050000 {
305 compatible = "renesas,gpio-r8a77995",
306 "renesas,rcar-gen3-gpio",
308 reg = <0 0xe6050000 0 0x50>;
309 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
312 gpio-ranges = <&pfc 0 0 9>;
313 #interrupt-cells = <2>;
314 interrupt-controller;
315 clocks = <&cpg CPG_MOD 912>;
316 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
320 gpio1: gpio@e6051000 {
321 compatible = "renesas,gpio-r8a77995",
322 "renesas,rcar-gen3-gpio",
324 reg = <0 0xe6051000 0 0x50>;
325 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
328 gpio-ranges = <&pfc 0 32 32>;
329 #interrupt-cells = <2>;
330 interrupt-controller;
331 clocks = <&cpg CPG_MOD 911>;
332 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
336 gpio2: gpio@e6052000 {
337 compatible = "renesas,gpio-r8a77995",
338 "renesas,rcar-gen3-gpio",
340 reg = <0 0xe6052000 0 0x50>;
341 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
344 gpio-ranges = <&pfc 0 64 32>;
345 #interrupt-cells = <2>;
346 interrupt-controller;
347 clocks = <&cpg CPG_MOD 910>;
348 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
352 gpio3: gpio@e6053000 {
353 compatible = "renesas,gpio-r8a77995",
354 "renesas,rcar-gen3-gpio",
356 reg = <0 0xe6053000 0 0x50>;
357 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
360 gpio-ranges = <&pfc 0 96 10>;
361 #interrupt-cells = <2>;
362 interrupt-controller;
363 clocks = <&cpg CPG_MOD 909>;
364 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
368 gpio4: gpio@e6054000 {
369 compatible = "renesas,gpio-r8a77995",
370 "renesas,rcar-gen3-gpio",
372 reg = <0 0xe6054000 0 0x50>;
373 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
376 gpio-ranges = <&pfc 0 128 32>;
377 #interrupt-cells = <2>;
378 interrupt-controller;
379 clocks = <&cpg CPG_MOD 908>;
380 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
384 gpio5: gpio@e6055000 {
385 compatible = "renesas,gpio-r8a77995",
386 "renesas,rcar-gen3-gpio",
388 reg = <0 0xe6055000 0 0x50>;
389 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
392 gpio-ranges = <&pfc 0 160 21>;
393 #interrupt-cells = <2>;
394 interrupt-controller;
395 clocks = <&cpg CPG_MOD 907>;
396 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
400 gpio6: gpio@e6055400 {
401 compatible = "renesas,gpio-r8a77995",
402 "renesas,rcar-gen3-gpio",
404 reg = <0 0xe6055400 0 0x50>;
405 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
408 gpio-ranges = <&pfc 0 192 14>;
409 #interrupt-cells = <2>;
410 interrupt-controller;
411 clocks = <&cpg CPG_MOD 906>;
412 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
417 compatible = "renesas,can-r8a77995",
418 "renesas,rcar-gen3-can";
419 reg = <0 0xe6c30000 0 0x1000>;
420 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
421 clocks = <&cpg CPG_MOD 916>,
422 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
424 clock-names = "clkp1", "clkp2", "can_clk";
425 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
426 assigned-clock-rates = <40000000>;
427 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
433 compatible = "renesas,can-r8a77995",
434 "renesas,rcar-gen3-can";
435 reg = <0 0xe6c38000 0 0x1000>;
436 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
437 clocks = <&cpg CPG_MOD 915>,
438 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
440 clock-names = "clkp1", "clkp2", "can_clk";
441 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
442 assigned-clock-rates = <40000000>;
443 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
448 canfd: can@e66c0000 {
449 compatible = "renesas,r8a77995-canfd",
450 "renesas,rcar-gen3-canfd";
451 reg = <0 0xe66c0000 0 0x8000>;
452 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
453 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
454 clocks = <&cpg CPG_MOD 914>,
455 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
457 clock-names = "fck", "canfd", "can_clk";
458 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
459 assigned-clock-rates = <40000000>;
460 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
473 avb: ethernet@e6800000 {
474 compatible = "renesas,etheravb-r8a77995",
475 "renesas,etheravb-rcar-gen3";
476 reg = <0 0xe6800000 0 0x800>;
477 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
478 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
481 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
482 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
483 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
484 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
485 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
486 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
487 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
488 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
489 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
490 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
491 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
492 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
493 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
496 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
497 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
498 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
499 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
500 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
501 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
502 interrupt-names = "ch0", "ch1", "ch2", "ch3",
503 "ch4", "ch5", "ch6", "ch7",
504 "ch8", "ch9", "ch10", "ch11",
505 "ch12", "ch13", "ch14", "ch15",
506 "ch16", "ch17", "ch18", "ch19",
507 "ch20", "ch21", "ch22", "ch23",
509 clocks = <&cpg CPG_MOD 812>;
510 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
513 iommus = <&ipmmu_ds0 16>;
514 #address-cells = <1>;
519 scif2: serial@e6e88000 {
520 compatible = "renesas,scif-r8a77995",
521 "renesas,rcar-gen3-scif", "renesas,scif";
522 reg = <0 0xe6e88000 0 64>;
523 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
524 clocks = <&cpg CPG_MOD 310>,
525 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
527 clock-names = "fck", "brg_int", "scif_clk";
528 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
529 <&dmac2 0x13>, <&dmac2 0x12>;
530 dma-names = "tx", "rx", "tx", "rx";
531 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
537 #address-cells = <1>;
539 compatible = "renesas,i2c-r8a77995",
540 "renesas,rcar-gen3-i2c";
541 reg = <0 0xe6500000 0 0x40>;
542 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
543 clocks = <&cpg CPG_MOD 931>;
544 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
546 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
547 <&dmac2 0x91>, <&dmac2 0x90>;
548 dma-names = "tx", "rx", "tx", "rx";
549 i2c-scl-internal-delay-ns = <6>;
554 #address-cells = <1>;
556 compatible = "renesas,i2c-r8a77995",
557 "renesas,rcar-gen3-i2c";
558 reg = <0 0xe6508000 0 0x40>;
559 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
560 clocks = <&cpg CPG_MOD 930>;
561 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
563 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
564 <&dmac2 0x93>, <&dmac2 0x92>;
565 dma-names = "tx", "rx", "tx", "rx";
566 i2c-scl-internal-delay-ns = <6>;
571 #address-cells = <1>;
573 compatible = "renesas,i2c-r8a77995",
574 "renesas,rcar-gen3-i2c";
575 reg = <0 0xe6510000 0 0x40>;
576 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
577 clocks = <&cpg CPG_MOD 929>;
578 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
580 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
581 <&dmac2 0x95>, <&dmac2 0x94>;
582 dma-names = "tx", "rx", "tx", "rx";
583 i2c-scl-internal-delay-ns = <6>;
588 #address-cells = <1>;
590 compatible = "renesas,i2c-r8a77995",
591 "renesas,rcar-gen3-i2c";
592 reg = <0 0xe66d0000 0 0x40>;
593 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
594 clocks = <&cpg CPG_MOD 928>;
595 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
597 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
598 dma-names = "tx", "rx";
599 i2c-scl-internal-delay-ns = <6>;
604 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
605 reg = <0 0xe6e30000 0 0x8>;
607 clocks = <&cpg CPG_MOD 523>;
608 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
614 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
615 reg = <0 0xe6e31000 0 0x8>;
617 clocks = <&cpg CPG_MOD 523>;
618 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
624 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
625 reg = <0 0xe6e32000 0 0x8>;
627 clocks = <&cpg CPG_MOD 523>;
628 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
634 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
635 reg = <0 0xe6e33000 0 0x8>;
637 clocks = <&cpg CPG_MOD 523>;
638 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
644 compatible = "renesas,sdhi-r8a77995",
645 "renesas,rcar-gen3-sdhi";
646 reg = <0 0xee140000 0 0x2000>;
647 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
648 clocks = <&cpg CPG_MOD 312>;
649 max-frequency = <200000000>;
650 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
655 ehci0: usb@ee080100 {
656 compatible = "generic-ehci";
657 reg = <0 0xee080100 0 0x100>;
658 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
659 clocks = <&cpg CPG_MOD 703>;
662 companion = <&ohci0>;
663 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
668 ohci0: usb@ee080000 {
669 compatible = "generic-ohci";
670 reg = <0 0xee080000 0 0x100>;
671 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
672 clocks = <&cpg CPG_MOD 703>;
675 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
680 usb2_phy0: usb-phy@ee080200 {
681 compatible = "renesas,usb2-phy-r8a77995",
682 "renesas,rcar-gen3-usb2-phy";
683 reg = <0 0xee080200 0 0x700>;
684 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
685 clocks = <&cpg CPG_MOD 703>;
686 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
692 vspbs: vsp@fe960000 {
693 compatible = "renesas,vsp2";
694 reg = <0 0xfe960000 0 0x8000>;
695 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
696 clocks = <&cpg CPG_MOD 627>;
697 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
699 renesas,fcp = <&fcpvb0>;
702 fcpvb0: fcp@fe96f000 {
703 compatible = "renesas,fcpv";
704 reg = <0 0xfe96f000 0 0x200>;
705 clocks = <&cpg CPG_MOD 607>;
706 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
708 iommus = <&ipmmu_vp0 5>;
711 vspd0: vsp@fea20000 {
712 compatible = "renesas,vsp2";
713 reg = <0 0xfea20000 0 0x8000>;
714 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
715 clocks = <&cpg CPG_MOD 623>;
716 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
718 renesas,fcp = <&fcpvd0>;
721 fcpvd0: fcp@fea27000 {
722 compatible = "renesas,fcpv";
723 reg = <0 0xfea27000 0 0x200>;
724 clocks = <&cpg CPG_MOD 603>;
725 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
727 iommus = <&ipmmu_vi0 8>;
730 vspd1: vsp@fea28000 {
731 compatible = "renesas,vsp2";
732 reg = <0 0xfea28000 0 0x8000>;
733 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
734 clocks = <&cpg CPG_MOD 622>;
735 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
737 renesas,fcp = <&fcpvd1>;
740 fcpvd1: fcp@fea2f000 {
741 compatible = "renesas,fcpv";
742 reg = <0 0xfea2f000 0 0x200>;
743 clocks = <&cpg CPG_MOD 602>;
744 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
746 iommus = <&ipmmu_vi0 9>;
749 du: display@feb00000 {
750 compatible = "renesas,du-r8a77995";
751 reg = <0 0xfeb00000 0 0x80000>;
752 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
754 clocks = <&cpg CPG_MOD 724>,
756 clock-names = "du.0", "du.1";
757 vsps = <&vspd0 0 &vspd1 0>;
761 #address-cells = <1>;
766 du_out_rgb: endpoint {
772 du_out_lvds0: endpoint {
778 du_out_lvds1: endpoint {
784 rpc: rpc@0xee200000 {
785 compatible = "renesas,rpc-r8a77995", "renesas,rpc";
786 reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
787 clocks = <&cpg CPG_MOD 917>;
794 compatible = "arm,armv8-timer";
795 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
796 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
797 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
798 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;