arch/arm/dts/r8a77990-ebisu.dts

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Device Tree Source for the ebisu board
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 /dts-v1/;
   9 #include "r8a77990.dtsi"
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 / {
  13         model = "Renesas Ebisu board based on r8a77990";
  14         compatible = "renesas,ebisu", "renesas,r8a77990";
  15
  16         aliases {
  17                 serial0 = &scif2;
  18                 ethernet0 = &avb;
  19         };
  20
  21         chosen {
  22                 bootargs = "ignore_loglevel";
  23                 stdout-path = "serial0:115200n8";
  24         };
  25
  26         memory@48000000 {
  27                 device_type = "memory";
  28                 /* first 128MB is reserved for secure area. */
  29                 reg = <0x0 0x48000000 0x0 0x38000000>;
  30         };
  31
  32         reg_1p8v: regulator0 {
  33                 compatible = "regulator-fixed";
  34                 regulator-name = "fixed-1.8V";
  35                 regulator-min-microvolt = <1800000>;
  36                 regulator-max-microvolt = <1800000>;
  37                 regulator-boot-on;
  38                 regulator-always-on;
  39         };
  40
  41         reg_3p3v: regulator1 {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "fixed-3.3V";
  44                 regulator-min-microvolt = <3300000>;
  45                 regulator-max-microvolt = <3300000>;
  46                 regulator-boot-on;
  47                 regulator-always-on;
  48         };
  49
  50         vcc_sdhi0: regulator-vcc-sdhi0 {
  51                 compatible = "regulator-fixed";
  52
  53                 regulator-name = "SDHI0 Vcc";
  54                 regulator-min-microvolt = <3300000>;
  55                 regulator-max-microvolt = <3300000>;
  56
  57                 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
  58                 enable-active-high;
  59         };
  60
  61         vccq_sdhi0: regulator-vccq-sdhi0 {
  62                 compatible = "regulator-gpio";
  63
  64                 regulator-name = "SDHI0 VccQ";
  65                 regulator-min-microvolt = <1800000>;
  66                 regulator-max-microvolt = <3300000>;
  67
  68                 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
  69                 gpios-states = <1>;
  70                 states = <3300000 1
  71                           1800000 0>;
  72         };
  73
  74         vcc_sdhi1: regulator-vcc-sdhi1 {
  75                 compatible = "regulator-fixed";
  76
  77                 regulator-name = "SDHI1 Vcc";
  78                 regulator-min-microvolt = <3300000>;
  79                 regulator-max-microvolt = <3300000>;
  80
  81                 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  82                 enable-active-high;
  83         };
  84
  85         vccq_sdhi1: regulator-vccq-sdhi1 {
  86                 compatible = "regulator-gpio";
  87
  88                 regulator-name = "SDHI1 VccQ";
  89                 regulator-min-microvolt = <1800000>;
  90                 regulator-max-microvolt = <3300000>;
  91
  92                 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
  93                 gpios-states = <1>;
  94                 states = <3300000 1
  95                           1800000 0>;
  96         };
  97 };
  98
  99 &avb {
 100         pinctrl-0 = <&avb_pins>;
 101         pinctrl-names = "default";
 102         renesas,no-ether-link;
 103         phy-handle = <&phy0>;
 104         phy-mode = "rgmii-txid";
 105         status = "okay";
 106
 107         phy0: ethernet-phy@0 {
 108                 rxc-skew-ps = <1500>;
 109                 reg = <0>;
 110                 interrupt-parent = <&gpio2>;
 111                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 112                 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
 113         };
 114 };
 115
 116 &ehci0 {
 117         status = "okay";
 118 };
 119
 120 &extal_clk {
 121         clock-frequency = <48000000>;
 122 };
 123
 124 &pfc {
 125         pinctrl-0 = <&scif_clk_pins>;
 126         pinctrl-names = "default";
 127
 128         avb_pins: avb {
 129                 mux {
 130                         groups = "avb_link", "avb_mii";
 131                         function = "avb";
 132                 };
 133         };
 134
 135         scif2_pins: scif2 {
 136                 groups = "scif2_data_a";
 137                 function = "scif2";
 138         };
 139
 140         scif_clk_pins: scif_clk {
 141                 groups = "scif_clk_a";
 142                 function = "scif_clk";
 143         };
 144
 145         sdhi0_pins: sd0 {
 146                 groups = "sdhi0_data4", "sdhi0_ctrl";
 147                 function = "sdhi0";
 148                 power-source = <3300>;
 149         };
 150
 151         sdhi0_pins_uhs: sd0_uhs {
 152                 groups = "sdhi0_data4", "sdhi0_ctrl";
 153                 function = "sdhi0";
 154                 power-source = <1800>;
 155         };
 156
 157         sdhi1_pins: sd1 {
 158                 groups = "sdhi1_data4", "sdhi1_ctrl";
 159                 function = "sdhi1";
 160                 power-source = <3300>;
 161         };
 162
 163         sdhi1_pins_uhs: sd1_uhs {
 164                 groups = "sdhi1_data4", "sdhi1_ctrl";
 165                 function = "sdhi1";
 166                 power-source = <1800>;
 167         };
 168
 169         sdhi3_pins: sd2 {
 170                 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
 171                 function = "sdhi3";
 172                 power-source = <1800>;
 173         };
 174
 175         sdhi3_pins_uhs: sd2_uhs {
 176                 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
 177                 function = "sdhi3";
 178                 power-source = <1800>;
 179         };
 180
 181         usb0_pins: usb0 {
 182                 groups = "usb0";
 183                 function = "usb0";
 184         };
 185 };
 186
 187 &usb2_phy0 {
 188         pinctrl-0 = <&usb0_pins>;
 189         pinctrl-name = "default";
 190
 191         status = "okay";
 192 };
 193
 194 &sdhi0 {
 195         /* full size SD */
 196         pinctrl-0 = <&sdhi0_pins>;
 197         pinctrl-1 = <&sdhi0_pins_uhs>;
 198         pinctrl-names = "default", "state_uhs";
 199
 200         vmmc-supply = <&vcc_sdhi0>;
 201         vqmmc-supply = <&vccq_sdhi0>;
 202         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 203         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 204         bus-width = <4>;
 205         sd-uhs-sdr12;
 206         sd-uhs-sdr25;
 207         sd-uhs-sdr50;
 208         sd-uhs-sdr104;
 209         status = "okay";
 210         max-frequency = <208000000>;
 211 };
 212
 213 &sdhi1 {
 214         /* microSD */
 215         pinctrl-0 = <&sdhi1_pins>;
 216         pinctrl-1 = <&sdhi1_pins_uhs>;
 217         pinctrl-names = "default", "state_uhs";
 218
 219         vmmc-supply = <&vcc_sdhi1>;
 220         vqmmc-supply = <&vccq_sdhi1>;
 221         cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
 222         bus-width = <4>;
 223         sd-uhs-sdr12;
 224         sd-uhs-sdr25;
 225         sd-uhs-sdr50;
 226         sd-uhs-sdr104;
 227         status = "okay";
 228         max-frequency = <208000000>;
 229 };
 230
 231 &sdhi3 {
 232         /* used for on-board 8bit eMMC */
 233         pinctrl-0 = <&sdhi3_pins>;
 234         pinctrl-1 = <&sdhi3_pins_uhs>;
 235         pinctrl-names = "default", "state_uhs";
 236
 237         vmmc-supply = <&reg_3p3v>;
 238         vqmmc-supply = <&reg_1p8v>;
 239         bus-width = <8>;
 240         mmc-hs200-1_8v;
 241         mmc-hs400-1_8v;
 242         non-removable;
 243         status = "okay";
 244 };
 245
 246 &scif2 {
 247         pinctrl-0 = <&scif2_pins>;
 248         pinctrl-names = "default";
 249
 250         status = "okay";
 251 };