ed758d1c01931aec08dfe1fa3bb2f34b205c536a
[platform/kernel/u-boot.git] / arch / arm / dts / r8a7796.dtsi
1 /*
2  * Device Tree Source for the r8a7796 SoC
3  *
4  * Copyright (C) 2016 Renesas Electronics Corp.
5  *
6  * SPDX-License-Identifier:     GPL-2.0
7  */
8
9 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7796-sysc.h>
12
13 #define CPG_AUDIO_CLK_I         R8A7796_CLK_S0D4
14
15 / {
16         compatible = "renesas,r8a7796";
17         #address-cells = <2>;
18         #size-cells = <2>;
19
20         aliases {
21                 i2c0 = &i2c0;
22                 i2c1 = &i2c1;
23                 i2c2 = &i2c2;
24                 i2c3 = &i2c3;
25                 i2c4 = &i2c4;
26                 i2c5 = &i2c5;
27                 i2c6 = &i2c6;
28                 i2c7 = &i2c_dvfs;
29         };
30
31         psci {
32                 compatible = "arm,psci-1.0", "arm,psci-0.2";
33                 method = "smc";
34         };
35
36         cpus {
37                 #address-cells = <1>;
38                 #size-cells = <0>;
39
40                 a57_0: cpu@0 {
41                         compatible = "arm,cortex-a57", "arm,armv8";
42                         reg = <0x0>;
43                         device_type = "cpu";
44                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
45                         next-level-cache = <&L2_CA57>;
46                         enable-method = "psci";
47                 };
48
49                 a57_1: cpu@1 {
50                         compatible = "arm,cortex-a57","arm,armv8";
51                         reg = <0x1>;
52                         device_type = "cpu";
53                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
54                         next-level-cache = <&L2_CA57>;
55                         enable-method = "psci";
56                 };
57
58                 a53_0: cpu@100 {
59                         compatible = "arm,cortex-a53", "arm,armv8";
60                         reg = <0x100>;
61                         device_type = "cpu";
62                         power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
63                         next-level-cache = <&L2_CA53>;
64                         enable-method = "psci";
65                 };
66
67                 a53_1: cpu@101 {
68                         compatible = "arm,cortex-a53","arm,armv8";
69                         reg = <0x101>;
70                         device_type = "cpu";
71                         power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
72                         next-level-cache = <&L2_CA53>;
73                         enable-method = "psci";
74                 };
75
76                 a53_2: cpu@102 {
77                         compatible = "arm,cortex-a53","arm,armv8";
78                         reg = <0x102>;
79                         device_type = "cpu";
80                         power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
81                         next-level-cache = <&L2_CA53>;
82                         enable-method = "psci";
83                 };
84
85                 a53_3: cpu@103 {
86                         compatible = "arm,cortex-a53","arm,armv8";
87                         reg = <0x103>;
88                         device_type = "cpu";
89                         power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
90                         next-level-cache = <&L2_CA53>;
91                         enable-method = "psci";
92                 };
93
94                 L2_CA57: cache-controller-0 {
95                         compatible = "cache";
96                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
97                         cache-unified;
98                         cache-level = <2>;
99                 };
100
101                 L2_CA53: cache-controller-1 {
102                         compatible = "cache";
103                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
104                         cache-unified;
105                         cache-level = <2>;
106                 };
107         };
108
109         extal_clk: extal {
110                 compatible = "fixed-clock";
111                 #clock-cells = <0>;
112                 /* This value must be overridden by the board */
113                 clock-frequency = <0>;
114                 u-boot,dm-pre-reloc;
115         };
116
117         extalr_clk: extalr {
118                 compatible = "fixed-clock";
119                 #clock-cells = <0>;
120                 /* This value must be overridden by the board */
121                 clock-frequency = <0>;
122                 u-boot,dm-pre-reloc;
123         };
124
125         /*
126          * The external audio clocks are configured as 0 Hz fixed frequency
127          * clocks by default.
128          * Boards that provide audio clocks should override them.
129          */
130         audio_clk_a: audio_clk_a {
131                 compatible = "fixed-clock";
132                 #clock-cells = <0>;
133                 clock-frequency = <0>;
134         };
135
136         audio_clk_b: audio_clk_b {
137                 compatible = "fixed-clock";
138                 #clock-cells = <0>;
139                 clock-frequency = <0>;
140         };
141
142         audio_clk_c: audio_clk_c {
143                 compatible = "fixed-clock";
144                 #clock-cells = <0>;
145                 clock-frequency = <0>;
146         };
147
148         /* External CAN clock - to be overridden by boards that provide it */
149         can_clk: can {
150                 compatible = "fixed-clock";
151                 #clock-cells = <0>;
152                 clock-frequency = <0>;
153         };
154
155         /* External SCIF clock - to be overridden by boards that provide it */
156         scif_clk: scif {
157                 compatible = "fixed-clock";
158                 #clock-cells = <0>;
159                 clock-frequency = <0>;
160         };
161
162         /* External PCIe clock - can be overridden by the board */
163         pcie_bus_clk: pcie_bus {
164                 compatible = "fixed-clock";
165                 #clock-cells = <0>;
166                 clock-frequency = <0>;
167         };
168
169         soc {
170                 compatible = "simple-bus";
171                 interrupt-parent = <&gic>;
172                 #address-cells = <2>;
173                 #size-cells = <2>;
174                 ranges;
175                 u-boot,dm-pre-reloc;
176
177                 gic: interrupt-controller@f1010000 {
178                         compatible = "arm,gic-400";
179                         #interrupt-cells = <3>;
180                         #address-cells = <0>;
181                         interrupt-controller;
182                         reg = <0x0 0xf1010000 0 0x1000>,
183                               <0x0 0xf1020000 0 0x20000>,
184                               <0x0 0xf1040000 0 0x20000>,
185                               <0x0 0xf1060000 0 0x20000>;
186                         interrupts = <GIC_PPI 9
187                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
188                         clocks = <&cpg CPG_MOD 408>;
189                         clock-names = "clk";
190                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
191                         resets = <&cpg 408>;
192                 };
193
194                 timer {
195                         compatible = "arm,armv8-timer";
196                         interrupts = <GIC_PPI 13
197                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
198                                      <GIC_PPI 14
199                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
200                                      <GIC_PPI 11
201                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
202                                      <GIC_PPI 10
203                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
204                 };
205
206                 wdt0: watchdog@e6020000 {
207                         compatible = "renesas,r8a7796-wdt",
208                                      "renesas,rcar-gen3-wdt";
209                         reg = <0 0xe6020000 0 0x0c>;
210                         clocks = <&cpg CPG_MOD 402>;
211                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
212                         resets = <&cpg 402>;
213                         status = "disabled";
214                 };
215
216                 gpio0: gpio@e6050000 {
217                         compatible = "renesas,gpio-r8a7796",
218                                      "renesas,gpio-rcar";
219                         reg = <0 0xe6050000 0 0x50>;
220                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
221                         #gpio-cells = <2>;
222                         gpio-controller;
223                         gpio-ranges = <&pfc 0 0 16>;
224                         #interrupt-cells = <2>;
225                         interrupt-controller;
226                         clocks = <&cpg CPG_MOD 912>;
227                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
228                         resets = <&cpg 912>;
229                 };
230
231                 gpio1: gpio@e6051000 {
232                         compatible = "renesas,gpio-r8a7796",
233                                      "renesas,gpio-rcar";
234                         reg = <0 0xe6051000 0 0x50>;
235                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
236                         #gpio-cells = <2>;
237                         gpio-controller;
238                         gpio-ranges = <&pfc 0 32 29>;
239                         #interrupt-cells = <2>;
240                         interrupt-controller;
241                         clocks = <&cpg CPG_MOD 911>;
242                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
243                         resets = <&cpg 911>;
244                 };
245
246                 gpio2: gpio@e6052000 {
247                         compatible = "renesas,gpio-r8a7796",
248                                      "renesas,gpio-rcar";
249                         reg = <0 0xe6052000 0 0x50>;
250                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
251                         #gpio-cells = <2>;
252                         gpio-controller;
253                         gpio-ranges = <&pfc 0 64 15>;
254                         #interrupt-cells = <2>;
255                         interrupt-controller;
256                         clocks = <&cpg CPG_MOD 910>;
257                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
258                         resets = <&cpg 910>;
259                 };
260
261                 gpio3: gpio@e6053000 {
262                         compatible = "renesas,gpio-r8a7796",
263                                      "renesas,gpio-rcar";
264                         reg = <0 0xe6053000 0 0x50>;
265                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
266                         #gpio-cells = <2>;
267                         gpio-controller;
268                         gpio-ranges = <&pfc 0 96 16>;
269                         #interrupt-cells = <2>;
270                         interrupt-controller;
271                         clocks = <&cpg CPG_MOD 909>;
272                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
273                         resets = <&cpg 909>;
274                 };
275
276                 gpio4: gpio@e6054000 {
277                         compatible = "renesas,gpio-r8a7796",
278                                      "renesas,gpio-rcar";
279                         reg = <0 0xe6054000 0 0x50>;
280                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
281                         #gpio-cells = <2>;
282                         gpio-controller;
283                         gpio-ranges = <&pfc 0 128 18>;
284                         #interrupt-cells = <2>;
285                         interrupt-controller;
286                         clocks = <&cpg CPG_MOD 908>;
287                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
288                         resets = <&cpg 908>;
289                 };
290
291                 gpio5: gpio@e6055000 {
292                         compatible = "renesas,gpio-r8a7796",
293                                      "renesas,gpio-rcar";
294                         reg = <0 0xe6055000 0 0x50>;
295                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
296                         #gpio-cells = <2>;
297                         gpio-controller;
298                         gpio-ranges = <&pfc 0 160 26>;
299                         #interrupt-cells = <2>;
300                         interrupt-controller;
301                         clocks = <&cpg CPG_MOD 907>;
302                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
303                         resets = <&cpg 907>;
304                 };
305
306                 gpio6: gpio@e6055400 {
307                         compatible = "renesas,gpio-r8a7796",
308                                      "renesas,gpio-rcar";
309                         reg = <0 0xe6055400 0 0x50>;
310                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
311                         #gpio-cells = <2>;
312                         gpio-controller;
313                         gpio-ranges = <&pfc 0 192 32>;
314                         #interrupt-cells = <2>;
315                         interrupt-controller;
316                         clocks = <&cpg CPG_MOD 906>;
317                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
318                         resets = <&cpg 906>;
319                 };
320
321                 gpio7: gpio@e6055800 {
322                         compatible = "renesas,gpio-r8a7796",
323                                      "renesas,gpio-rcar";
324                         reg = <0 0xe6055800 0 0x50>;
325                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
326                         #gpio-cells = <2>;
327                         gpio-controller;
328                         gpio-ranges = <&pfc 0 224 4>;
329                         #interrupt-cells = <2>;
330                         interrupt-controller;
331                         clocks = <&cpg CPG_MOD 905>;
332                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
333                         resets = <&cpg 905>;
334                 };
335
336                 pfc: pin-controller@e6060000 {
337                         compatible = "renesas,pfc-r8a7796";
338                         reg = <0 0xe6060000 0 0x50c>;
339                 };
340
341                 pmu_a57 {
342                         compatible = "arm,cortex-a57-pmu";
343                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
344                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
345                         interrupt-affinity = <&a57_0>,
346                                              <&a57_1>;
347                 };
348
349                 pmu_a53 {
350                         compatible = "arm,cortex-a53-pmu";
351                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
352                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
353                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
354                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
355                         interrupt-affinity = <&a53_0>,
356                                              <&a53_1>,
357                                              <&a53_2>,
358                                              <&a53_3>;
359                 };
360
361                 cpg: clock-controller@e6150000 {
362                         compatible = "renesas,r8a7796-cpg-mssr";
363                         reg = <0 0xe6150000 0 0x1000>;
364                         clocks = <&extal_clk>, <&extalr_clk>;
365                         clock-names = "extal", "extalr";
366                         #clock-cells = <2>;
367                         #power-domain-cells = <0>;
368                         #reset-cells = <1>;
369                         u-boot,dm-pre-reloc;
370                 };
371
372                 rst: reset-controller@e6160000 {
373                         compatible = "renesas,r8a7796-rst";
374                         reg = <0 0xe6160000 0 0x0200>;
375                 };
376
377                 prr: chipid@fff00044 {
378                         compatible = "renesas,prr";
379                         reg = <0 0xfff00044 0 4>;
380                         u-boot,dm-pre-reloc;
381                 };
382
383                 sysc: system-controller@e6180000 {
384                         compatible = "renesas,r8a7796-sysc";
385                         reg = <0 0xe6180000 0 0x0400>;
386                         #power-domain-cells = <1>;
387                 };
388
389                 i2c_dvfs: i2c@e60b0000 {
390                         #address-cells = <1>;
391                         #size-cells = <0>;
392                         compatible = "renesas,iic-r8a7796",
393                                      "renesas,rcar-gen3-iic",
394                                      "renesas,rmobile-iic";
395                         reg = <0 0xe60b0000 0 0x425>;
396                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
397                         clocks = <&cpg CPG_MOD 926>;
398                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
399                         resets = <&cpg 926>;
400                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
401                         dma-names = "tx", "rx";
402                         status = "disabled";
403                 };
404
405                 pwm0: pwm@e6e30000 {
406                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
407                         reg = <0 0xe6e30000 0 8>;
408                         #pwm-cells = <2>;
409                         clocks = <&cpg CPG_MOD 523>;
410                         resets = <&cpg 523>;
411                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
412                         status = "disabled";
413                 };
414
415                 pwm1: pwm@e6e31000 {
416                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
417                         reg = <0 0xe6e31000 0 8>;
418                         #pwm-cells = <2>;
419                         clocks = <&cpg CPG_MOD 523>;
420                         resets = <&cpg 523>;
421                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
422                         status = "disabled";
423                 };
424
425                 pwm2: pwm@e6e32000 {
426                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
427                         reg = <0 0xe6e32000 0 8>;
428                         #pwm-cells = <2>;
429                         clocks = <&cpg CPG_MOD 523>;
430                         resets = <&cpg 523>;
431                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
432                         status = "disabled";
433                 };
434
435                 pwm3: pwm@e6e33000 {
436                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
437                         reg = <0 0xe6e33000 0 8>;
438                         #pwm-cells = <2>;
439                         clocks = <&cpg CPG_MOD 523>;
440                         resets = <&cpg 523>;
441                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
442                         status = "disabled";
443                 };
444
445                 pwm4: pwm@e6e34000 {
446                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
447                         reg = <0 0xe6e34000 0 8>;
448                         #pwm-cells = <2>;
449                         clocks = <&cpg CPG_MOD 523>;
450                         resets = <&cpg 523>;
451                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
452                         status = "disabled";
453                 };
454
455                 pwm5: pwm@e6e35000 {
456                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
457                         reg = <0 0xe6e35000 0 8>;
458                         #pwm-cells = <2>;
459                         clocks = <&cpg CPG_MOD 523>;
460                         resets = <&cpg 523>;
461                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
462                         status = "disabled";
463                 };
464
465                 pwm6: pwm@e6e36000 {
466                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
467                         reg = <0 0xe6e36000 0 8>;
468                         #pwm-cells = <2>;
469                         clocks = <&cpg CPG_MOD 523>;
470                         resets = <&cpg 523>;
471                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
472                         status = "disabled";
473                 };
474
475                 i2c0: i2c@e6500000 {
476                         #address-cells = <1>;
477                         #size-cells = <0>;
478                         compatible = "renesas,i2c-r8a7796",
479                                      "renesas,rcar-gen3-i2c";
480                         reg = <0 0xe6500000 0 0x40>;
481                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
482                         clocks = <&cpg CPG_MOD 931>;
483                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
484                         resets = <&cpg 931>;
485                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
486                                <&dmac2 0x91>, <&dmac2 0x90>;
487                         dma-names = "tx", "rx", "tx", "rx";
488                         i2c-scl-internal-delay-ns = <110>;
489                         status = "disabled";
490                 };
491
492                 i2c1: i2c@e6508000 {
493                         #address-cells = <1>;
494                         #size-cells = <0>;
495                         compatible = "renesas,i2c-r8a7796",
496                                      "renesas,rcar-gen3-i2c";
497                         reg = <0 0xe6508000 0 0x40>;
498                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
499                         clocks = <&cpg CPG_MOD 930>;
500                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
501                         resets = <&cpg 930>;
502                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
503                                <&dmac2 0x93>, <&dmac2 0x92>;
504                         dma-names = "tx", "rx", "tx", "rx";
505                         i2c-scl-internal-delay-ns = <6>;
506                         status = "disabled";
507                 };
508
509                 i2c2: i2c@e6510000 {
510                         #address-cells = <1>;
511                         #size-cells = <0>;
512                         compatible = "renesas,i2c-r8a7796",
513                                      "renesas,rcar-gen3-i2c";
514                         reg = <0 0xe6510000 0 0x40>;
515                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
516                         clocks = <&cpg CPG_MOD 929>;
517                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
518                         resets = <&cpg 929>;
519                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
520                                <&dmac2 0x95>, <&dmac2 0x94>;
521                         dma-names = "tx", "rx", "tx", "rx";
522                         i2c-scl-internal-delay-ns = <6>;
523                         status = "disabled";
524                 };
525
526                 i2c3: i2c@e66d0000 {
527                         #address-cells = <1>;
528                         #size-cells = <0>;
529                         compatible = "renesas,i2c-r8a7796",
530                                      "renesas,rcar-gen3-i2c";
531                         reg = <0 0xe66d0000 0 0x40>;
532                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
533                         clocks = <&cpg CPG_MOD 928>;
534                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
535                         resets = <&cpg 928>;
536                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
537                         dma-names = "tx", "rx";
538                         i2c-scl-internal-delay-ns = <110>;
539                         status = "disabled";
540                 };
541
542                 i2c4: i2c@e66d8000 {
543                         #address-cells = <1>;
544                         #size-cells = <0>;
545                         compatible = "renesas,i2c-r8a7796",
546                                      "renesas,rcar-gen3-i2c";
547                         reg = <0 0xe66d8000 0 0x40>;
548                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
549                         clocks = <&cpg CPG_MOD 927>;
550                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
551                         resets = <&cpg 927>;
552                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
553                         dma-names = "tx", "rx";
554                         i2c-scl-internal-delay-ns = <110>;
555                         status = "disabled";
556                 };
557
558                 i2c5: i2c@e66e0000 {
559                         #address-cells = <1>;
560                         #size-cells = <0>;
561                         compatible = "renesas,i2c-r8a7796",
562                                      "renesas,rcar-gen3-i2c";
563                         reg = <0 0xe66e0000 0 0x40>;
564                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
565                         clocks = <&cpg CPG_MOD 919>;
566                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
567                         resets = <&cpg 919>;
568                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
569                         dma-names = "tx", "rx";
570                         i2c-scl-internal-delay-ns = <110>;
571                         status = "disabled";
572                 };
573
574                 i2c6: i2c@e66e8000 {
575                         #address-cells = <1>;
576                         #size-cells = <0>;
577                         compatible = "renesas,i2c-r8a7796",
578                                      "renesas,rcar-gen3-i2c";
579                         reg = <0 0xe66e8000 0 0x40>;
580                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
581                         clocks = <&cpg CPG_MOD 918>;
582                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
583                         resets = <&cpg 918>;
584                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
585                         dma-names = "tx", "rx";
586                         i2c-scl-internal-delay-ns = <6>;
587                         status = "disabled";
588                 };
589
590                 can0: can@e6c30000 {
591                         compatible = "renesas,can-r8a7796",
592                                      "renesas,rcar-gen3-can";
593                         reg = <0 0xe6c30000 0 0x1000>;
594                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
595                         clocks = <&cpg CPG_MOD 916>,
596                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
597                                <&can_clk>;
598                         clock-names = "clkp1", "clkp2", "can_clk";
599                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
600                         assigned-clock-rates = <40000000>;
601                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
602                         resets = <&cpg 916>;
603                         status = "disabled";
604                 };
605
606                 can1: can@e6c38000 {
607                         compatible = "renesas,can-r8a7796",
608                                      "renesas,rcar-gen3-can";
609                         reg = <0 0xe6c38000 0 0x1000>;
610                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
611                         clocks = <&cpg CPG_MOD 915>,
612                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
613                                <&can_clk>;
614                         clock-names = "clkp1", "clkp2", "can_clk";
615                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
616                         assigned-clock-rates = <40000000>;
617                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
618                         resets = <&cpg 915>;
619                         status = "disabled";
620                 };
621
622                 canfd: can@e66c0000 {
623                         compatible = "renesas,r8a7796-canfd",
624                                      "renesas,rcar-gen3-canfd";
625                         reg = <0 0xe66c0000 0 0x8000>;
626                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
627                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
628                         clocks = <&cpg CPG_MOD 914>,
629                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
630                                <&can_clk>;
631                         clock-names = "fck", "canfd", "can_clk";
632                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
633                         assigned-clock-rates = <40000000>;
634                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
635                         resets = <&cpg 914>;
636                         status = "disabled";
637
638                         channel0 {
639                                 status = "disabled";
640                         };
641
642                         channel1 {
643                                 status = "disabled";
644                         };
645                 };
646
647                 drif00: rif@e6f40000 {
648                         compatible = "renesas,r8a7796-drif",
649                                      "renesas,rcar-gen3-drif";
650                         reg = <0 0xe6f40000 0 0x64>;
651                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
652                         clocks = <&cpg CPG_MOD 515>;
653                         clock-names = "fck";
654                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
655                         dma-names = "rx", "rx";
656                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
657                         resets = <&cpg 515>;
658                         renesas,bonding = <&drif01>;
659                         status = "disabled";
660                 };
661
662                 drif01: rif@e6f50000 {
663                         compatible = "renesas,r8a7796-drif",
664                                      "renesas,rcar-gen3-drif";
665                         reg = <0 0xe6f50000 0 0x64>;
666                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
667                         clocks = <&cpg CPG_MOD 514>;
668                         clock-names = "fck";
669                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
670                         dma-names = "rx", "rx";
671                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
672                         resets = <&cpg 514>;
673                         renesas,bonding = <&drif00>;
674                         status = "disabled";
675                 };
676
677                 drif10: rif@e6f60000 {
678                         compatible = "renesas,r8a7796-drif",
679                                      "renesas,rcar-gen3-drif";
680                         reg = <0 0xe6f60000 0 0x64>;
681                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
682                         clocks = <&cpg CPG_MOD 513>;
683                         clock-names = "fck";
684                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
685                         dma-names = "rx", "rx";
686                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
687                         resets = <&cpg 513>;
688                         renesas,bonding = <&drif11>;
689                         status = "disabled";
690                 };
691
692                 drif11: rif@e6f70000 {
693                         compatible = "renesas,r8a7796-drif",
694                                      "renesas,rcar-gen3-drif";
695                         reg = <0 0xe6f70000 0 0x64>;
696                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
697                         clocks = <&cpg CPG_MOD 512>;
698                         clock-names = "fck";
699                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
700                         dma-names = "rx", "rx";
701                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
702                         resets = <&cpg 512>;
703                         renesas,bonding = <&drif10>;
704                         status = "disabled";
705                 };
706
707                 drif20: rif@e6f80000 {
708                         compatible = "renesas,r8a7796-drif",
709                                      "renesas,rcar-gen3-drif";
710                         reg = <0 0xe6f80000 0 0x64>;
711                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
712                         clocks = <&cpg CPG_MOD 511>;
713                         clock-names = "fck";
714                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
715                         dma-names = "rx", "rx";
716                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
717                         resets = <&cpg 511>;
718                         renesas,bonding = <&drif21>;
719                         status = "disabled";
720                 };
721
722                 drif21: rif@e6f90000 {
723                         compatible = "renesas,r8a7796-drif",
724                                      "renesas,rcar-gen3-drif";
725                         reg = <0 0xe6f90000 0 0x64>;
726                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
727                         clocks = <&cpg CPG_MOD 510>;
728                         clock-names = "fck";
729                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
730                         dma-names = "rx", "rx";
731                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
732                         resets = <&cpg 510>;
733                         renesas,bonding = <&drif20>;
734                         status = "disabled";
735                 };
736
737                 drif30: rif@e6fa0000 {
738                         compatible = "renesas,r8a7796-drif",
739                                      "renesas,rcar-gen3-drif";
740                         reg = <0 0xe6fa0000 0 0x64>;
741                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
742                         clocks = <&cpg CPG_MOD 509>;
743                         clock-names = "fck";
744                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
745                         dma-names = "rx", "rx";
746                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
747                         resets = <&cpg 509>;
748                         renesas,bonding = <&drif31>;
749                         status = "disabled";
750                 };
751
752                 drif31: rif@e6fb0000 {
753                         compatible = "renesas,r8a7796-drif",
754                                      "renesas,rcar-gen3-drif";
755                         reg = <0 0xe6fb0000 0 0x64>;
756                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
757                         clocks = <&cpg CPG_MOD 508>;
758                         clock-names = "fck";
759                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
760                         dma-names = "rx", "rx";
761                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
762                         resets = <&cpg 508>;
763                         renesas,bonding = <&drif30>;
764                         status = "disabled";
765                 };
766
767                 avb: ethernet@e6800000 {
768                         compatible = "renesas,etheravb-r8a7796",
769                                      "renesas,etheravb-rcar-gen3";
770                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
771                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
772                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
773                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
774                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
775                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
776                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
777                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
778                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
779                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
780                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
781                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
782                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
783                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
784                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
785                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
786                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
787                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
788                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
789                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
790                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
791                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
792                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
793                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
794                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
795                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
796                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
797                                           "ch4", "ch5", "ch6", "ch7",
798                                           "ch8", "ch9", "ch10", "ch11",
799                                           "ch12", "ch13", "ch14", "ch15",
800                                           "ch16", "ch17", "ch18", "ch19",
801                                           "ch20", "ch21", "ch22", "ch23",
802                                           "ch24";
803                         clocks = <&cpg CPG_MOD 812>;
804                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
805                         resets = <&cpg 812>;
806                         phy-mode = "rgmii-txid";
807                         #address-cells = <1>;
808                         #size-cells = <0>;
809                         status = "disabled";
810                 };
811
812                 hscif0: serial@e6540000 {
813                         compatible = "renesas,hscif-r8a7796",
814                                      "renesas,rcar-gen3-hscif",
815                                      "renesas,hscif";
816                         reg = <0 0xe6540000 0 0x60>;
817                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
818                         clocks = <&cpg CPG_MOD 520>,
819                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
820                                  <&scif_clk>;
821                         clock-names = "fck", "brg_int", "scif_clk";
822                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
823                                <&dmac2 0x31>, <&dmac2 0x30>;
824                         dma-names = "tx", "rx", "tx", "rx";
825                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
826                         resets = <&cpg 520>;
827                         status = "disabled";
828                 };
829
830                 hscif1: serial@e6550000 {
831                         compatible = "renesas,hscif-r8a7796",
832                                      "renesas,rcar-gen3-hscif",
833                                      "renesas,hscif";
834                         reg = <0 0xe6550000 0 0x60>;
835                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
836                         clocks = <&cpg CPG_MOD 519>,
837                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
838                                  <&scif_clk>;
839                         clock-names = "fck", "brg_int", "scif_clk";
840                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
841                                <&dmac2 0x33>, <&dmac2 0x32>;
842                         dma-names = "tx", "rx", "tx", "rx";
843                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
844                         resets = <&cpg 519>;
845                         status = "disabled";
846                 };
847
848                 hscif2: serial@e6560000 {
849                         compatible = "renesas,hscif-r8a7796",
850                                      "renesas,rcar-gen3-hscif",
851                                      "renesas,hscif";
852                         reg = <0 0xe6560000 0 0x60>;
853                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
854                         clocks = <&cpg CPG_MOD 518>,
855                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
856                                  <&scif_clk>;
857                         clock-names = "fck", "brg_int", "scif_clk";
858                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
859                                <&dmac2 0x35>, <&dmac2 0x34>;
860                         dma-names = "tx", "rx", "tx", "rx";
861                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
862                         resets = <&cpg 518>;
863                         status = "disabled";
864                 };
865
866                 hscif3: serial@e66a0000 {
867                         compatible = "renesas,hscif-r8a7796",
868                                      "renesas,rcar-gen3-hscif",
869                                      "renesas,hscif";
870                         reg = <0 0xe66a0000 0 0x60>;
871                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
872                         clocks = <&cpg CPG_MOD 517>,
873                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
874                                  <&scif_clk>;
875                         clock-names = "fck", "brg_int", "scif_clk";
876                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
877                         dma-names = "tx", "rx";
878                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
879                         resets = <&cpg 517>;
880                         status = "disabled";
881                 };
882
883                 hscif4: serial@e66b0000 {
884                         compatible = "renesas,hscif-r8a7796",
885                                      "renesas,rcar-gen3-hscif",
886                                      "renesas,hscif";
887                         reg = <0 0xe66b0000 0 0x60>;
888                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
889                         clocks = <&cpg CPG_MOD 516>,
890                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
891                                  <&scif_clk>;
892                         clock-names = "fck", "brg_int", "scif_clk";
893                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
894                         dma-names = "tx", "rx";
895                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
896                         resets = <&cpg 516>;
897                         status = "disabled";
898                 };
899
900                 scif0: serial@e6e60000 {
901                         compatible = "renesas,scif-r8a7796",
902                                      "renesas,rcar-gen3-scif", "renesas,scif";
903                         reg = <0 0xe6e60000 0 64>;
904                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
905                         clocks = <&cpg CPG_MOD 207>,
906                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
907                                  <&scif_clk>;
908                         clock-names = "fck", "brg_int", "scif_clk";
909                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
910                                <&dmac2 0x51>, <&dmac2 0x50>;
911                         dma-names = "tx", "rx", "tx", "rx";
912                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
913                         resets = <&cpg 207>;
914                         status = "disabled";
915                 };
916
917                 scif1: serial@e6e68000 {
918                         compatible = "renesas,scif-r8a7796",
919                                      "renesas,rcar-gen3-scif", "renesas,scif";
920                         reg = <0 0xe6e68000 0 64>;
921                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
922                         clocks = <&cpg CPG_MOD 206>,
923                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
924                                  <&scif_clk>;
925                         clock-names = "fck", "brg_int", "scif_clk";
926                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
927                                <&dmac2 0x53>, <&dmac2 0x52>;
928                         dma-names = "tx", "rx", "tx", "rx";
929                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
930                         resets = <&cpg 206>;
931                         status = "disabled";
932                 };
933
934                 scif2: serial@e6e88000 {
935                         compatible = "renesas,scif-r8a7796",
936                                      "renesas,rcar-gen3-scif", "renesas,scif";
937                         reg = <0 0xe6e88000 0 64>;
938                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
939                         clocks = <&cpg CPG_MOD 310>,
940                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
941                                  <&scif_clk>;
942                         clock-names = "fck", "brg_int", "scif_clk";
943                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
944                         resets = <&cpg 310>;
945                         status = "disabled";
946                 };
947
948                 scif3: serial@e6c50000 {
949                         compatible = "renesas,scif-r8a7796",
950                                      "renesas,rcar-gen3-scif", "renesas,scif";
951                         reg = <0 0xe6c50000 0 64>;
952                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
953                         clocks = <&cpg CPG_MOD 204>,
954                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
955                                  <&scif_clk>;
956                         clock-names = "fck", "brg_int", "scif_clk";
957                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
958                         dma-names = "tx", "rx";
959                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
960                         resets = <&cpg 204>;
961                         status = "disabled";
962                 };
963
964                 scif4: serial@e6c40000 {
965                         compatible = "renesas,scif-r8a7796",
966                                      "renesas,rcar-gen3-scif", "renesas,scif";
967                         reg = <0 0xe6c40000 0 64>;
968                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
969                         clocks = <&cpg CPG_MOD 203>,
970                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
971                                  <&scif_clk>;
972                         clock-names = "fck", "brg_int", "scif_clk";
973                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
974                         dma-names = "tx", "rx";
975                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
976                         resets = <&cpg 203>;
977                         status = "disabled";
978                 };
979
980                 scif5: serial@e6f30000 {
981                         compatible = "renesas,scif-r8a7796",
982                                      "renesas,rcar-gen3-scif", "renesas,scif";
983                         reg = <0 0xe6f30000 0 64>;
984                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
985                         clocks = <&cpg CPG_MOD 202>,
986                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
987                                  <&scif_clk>;
988                         clock-names = "fck", "brg_int", "scif_clk";
989                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
990                                <&dmac2 0x5b>, <&dmac2 0x5a>;
991                         dma-names = "tx", "rx", "tx", "rx";
992                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
993                         resets = <&cpg 202>;
994                         status = "disabled";
995                 };
996
997                 msiof0: spi@e6e90000 {
998                         compatible = "renesas,msiof-r8a7796",
999                                      "renesas,rcar-gen3-msiof";
1000                         reg = <0 0xe6e90000 0 0x0064>;
1001                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1002                         clocks = <&cpg CPG_MOD 211>;
1003                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1004                                <&dmac2 0x41>, <&dmac2 0x40>;
1005                         dma-names = "tx", "rx", "tx", "rx";
1006                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1007                         resets = <&cpg 211>;
1008                         #address-cells = <1>;
1009                         #size-cells = <0>;
1010                         status = "disabled";
1011                 };
1012
1013                 msiof1: spi@e6ea0000 {
1014                         compatible = "renesas,msiof-r8a7796",
1015                                      "renesas,rcar-gen3-msiof";
1016                         reg = <0 0xe6ea0000 0 0x0064>;
1017                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1018                         clocks = <&cpg CPG_MOD 210>;
1019                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1020                                <&dmac2 0x43>, <&dmac2 0x42>;
1021                         dma-names = "tx", "rx", "tx", "rx";
1022                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1023                         resets = <&cpg 210>;
1024                         #address-cells = <1>;
1025                         #size-cells = <0>;
1026                         status = "disabled";
1027                 };
1028
1029                 msiof2: spi@e6c00000 {
1030                         compatible = "renesas,msiof-r8a7796",
1031                                      "renesas,rcar-gen3-msiof";
1032                         reg = <0 0xe6c00000 0 0x0064>;
1033                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1034                         clocks = <&cpg CPG_MOD 209>;
1035                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1036                         dma-names = "tx", "rx";
1037                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1038                         resets = <&cpg 209>;
1039                         #address-cells = <1>;
1040                         #size-cells = <0>;
1041                         status = "disabled";
1042                 };
1043
1044                 msiof3: spi@e6c10000 {
1045                         compatible = "renesas,msiof-r8a7796",
1046                                      "renesas,rcar-gen3-msiof";
1047                         reg = <0 0xe6c10000 0 0x0064>;
1048                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1049                         clocks = <&cpg CPG_MOD 208>;
1050                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1051                         dma-names = "tx", "rx";
1052                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1053                         resets = <&cpg 208>;
1054                         #address-cells = <1>;
1055                         #size-cells = <0>;
1056                         status = "disabled";
1057                 };
1058
1059                 dmac0: dma-controller@e6700000 {
1060                         compatible = "renesas,dmac-r8a7796",
1061                                      "renesas,rcar-dmac";
1062                         reg = <0 0xe6700000 0 0x10000>;
1063                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
1064                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
1065                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
1066                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
1067                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
1068                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
1069                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
1070                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
1071                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
1072                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
1073                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
1074                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
1075                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
1076                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
1077                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
1078                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
1079                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
1080                         interrupt-names = "error",
1081                                         "ch0", "ch1", "ch2", "ch3",
1082                                         "ch4", "ch5", "ch6", "ch7",
1083                                         "ch8", "ch9", "ch10", "ch11",
1084                                         "ch12", "ch13", "ch14", "ch15";
1085                         clocks = <&cpg CPG_MOD 219>;
1086                         clock-names = "fck";
1087                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1088                         resets = <&cpg 219>;
1089                         #dma-cells = <1>;
1090                         dma-channels = <16>;
1091                 };
1092
1093                 dmac1: dma-controller@e7300000 {
1094                         compatible = "renesas,dmac-r8a7796",
1095                                      "renesas,rcar-dmac";
1096                         reg = <0 0xe7300000 0 0x10000>;
1097                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
1098                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
1099                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
1100                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
1101                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
1102                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
1103                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
1104                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
1105                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
1106                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
1107                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
1108                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
1109                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
1110                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
1111                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
1112                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
1113                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1114                         interrupt-names = "error",
1115                                         "ch0", "ch1", "ch2", "ch3",
1116                                         "ch4", "ch5", "ch6", "ch7",
1117                                         "ch8", "ch9", "ch10", "ch11",
1118                                         "ch12", "ch13", "ch14", "ch15";
1119                         clocks = <&cpg CPG_MOD 218>;
1120                         clock-names = "fck";
1121                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1122                         resets = <&cpg 218>;
1123                         #dma-cells = <1>;
1124                         dma-channels = <16>;
1125                 };
1126
1127                 dmac2: dma-controller@e7310000 {
1128                         compatible = "renesas,dmac-r8a7796",
1129                                      "renesas,rcar-dmac";
1130                         reg = <0 0xe7310000 0 0x10000>;
1131                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
1132                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
1133                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
1134                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
1135                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
1136                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
1137                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
1138                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
1139                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
1140                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
1141                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
1142                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
1143                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
1144                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
1145                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
1146                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
1147                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1148                         interrupt-names = "error",
1149                                         "ch0", "ch1", "ch2", "ch3",
1150                                         "ch4", "ch5", "ch6", "ch7",
1151                                         "ch8", "ch9", "ch10", "ch11",
1152                                         "ch12", "ch13", "ch14", "ch15";
1153                         clocks = <&cpg CPG_MOD 217>;
1154                         clock-names = "fck";
1155                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1156                         resets = <&cpg 217>;
1157                         #dma-cells = <1>;
1158                         dma-channels = <16>;
1159                 };
1160
1161                 audma0: dma-controller@ec700000 {
1162                         compatible = "renesas,dmac-r8a7796",
1163                                      "renesas,rcar-dmac";
1164                         reg = <0 0xec700000 0 0x10000>;
1165                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1166                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1167                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1168                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1169                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1170                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1171                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1172                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1173                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1174                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1175                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1176                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1177                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1178                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1179                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1180                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1181                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1182                         interrupt-names = "error",
1183                                         "ch0", "ch1", "ch2", "ch3",
1184                                         "ch4", "ch5", "ch6", "ch7",
1185                                         "ch8", "ch9", "ch10", "ch11",
1186                                         "ch12", "ch13", "ch14", "ch15";
1187                         clocks = <&cpg CPG_MOD 502>;
1188                         clock-names = "fck";
1189                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1190                         resets = <&cpg 502>;
1191                         #dma-cells = <1>;
1192                         dma-channels = <16>;
1193                 };
1194
1195                 audma1: dma-controller@ec720000 {
1196                         compatible = "renesas,dmac-r8a7796",
1197                                      "renesas,rcar-dmac";
1198                         reg = <0 0xec720000 0 0x10000>;
1199                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1200                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1201                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1202                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1203                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1204                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1205                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1206                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1207                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1208                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1209                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1210                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1211                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1212                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1213                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1214                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1215                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1216                         interrupt-names = "error",
1217                                         "ch0", "ch1", "ch2", "ch3",
1218                                         "ch4", "ch5", "ch6", "ch7",
1219                                         "ch8", "ch9", "ch10", "ch11",
1220                                         "ch12", "ch13", "ch14", "ch15";
1221                         clocks = <&cpg CPG_MOD 501>;
1222                         clock-names = "fck";
1223                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1224                         resets = <&cpg 501>;
1225                         #dma-cells = <1>;
1226                         dma-channels = <16>;
1227                 };
1228
1229                 usb_dmac0: dma-controller@e65a0000 {
1230                         compatible = "renesas,r8a7796-usb-dmac",
1231                                      "renesas,usb-dmac";
1232                         reg = <0 0xe65a0000 0 0x100>;
1233                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1234                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1235                         interrupt-names = "ch0", "ch1";
1236                         clocks = <&cpg CPG_MOD 330>;
1237                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1238                         resets = <&cpg 330>;
1239                         #dma-cells = <1>;
1240                         dma-channels = <2>;
1241                 };
1242
1243                 usb_dmac1: dma-controller@e65b0000 {
1244                         compatible = "renesas,r8a7796-usb-dmac",
1245                                      "renesas,usb-dmac";
1246                         reg = <0 0xe65b0000 0 0x100>;
1247                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1248                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1249                         interrupt-names = "ch0", "ch1";
1250                         clocks = <&cpg CPG_MOD 331>;
1251                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1252                         resets = <&cpg 331>;
1253                         #dma-cells = <1>;
1254                         dma-channels = <2>;
1255                 };
1256
1257                 hsusb: usb@e6590000 {
1258                         compatible = "renesas,usbhs-r8a7796",
1259                                      "renesas,rcar-gen3-usbhs";
1260                         reg = <0 0xe6590000 0 0x100>;
1261                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1262                         clocks = <&cpg CPG_MOD 704>;
1263                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1264                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1265                         dma-names = "ch0", "ch1", "ch2", "ch3";
1266                         renesas,buswait = <11>;
1267                         phys = <&usb2_phy0>;
1268                         phy-names = "usb";
1269                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1270                         resets = <&cpg 704>;
1271                         status = "disabled";
1272                 };
1273
1274                 xhci0: usb@ee000000 {
1275                         compatible = "renesas,xhci-r8a7796",
1276                                      "renesas,rcar-gen3-xhci";
1277                         reg = <0 0xee000000 0 0xc00>;
1278                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1279                         clocks = <&cpg CPG_MOD 328>;
1280                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1281                         resets = <&cpg 328>;
1282                         status = "disabled";
1283                 };
1284
1285                 ohci0: usb@ee080000 {
1286                         compatible = "generic-ohci";
1287                         reg = <0 0xee080000 0 0x100>;
1288                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1289                         clocks = <&cpg CPG_MOD 703>;
1290                         phys = <&usb2_phy0>;
1291                         phy-names = "usb";
1292                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1293                         resets = <&cpg 703>;
1294                         status = "disabled";
1295                 };
1296
1297                 ehci0: usb@ee080100 {
1298                         compatible = "generic-ehci";
1299                         reg = <0 0xee080100 0 0x100>;
1300                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1301                         clocks = <&cpg CPG_MOD 703>;
1302                         phys = <&usb2_phy0>;
1303                         phy-names = "usb";
1304                         companion= <&ohci0>;
1305                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1306                         resets = <&cpg 703>;
1307                         status = "disabled";
1308                 };
1309
1310                 usb2_phy0: usb-phy@ee080200 {
1311                         compatible = "renesas,usb2-phy-r8a7796",
1312                                      "renesas,rcar-gen3-usb2-phy";
1313                         reg = <0 0xee080200 0 0x700>;
1314                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1315                         clocks = <&cpg CPG_MOD 703>;
1316                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1317                         resets = <&cpg 703>;
1318                         #phy-cells = <0>;
1319                         status = "disabled";
1320                 };
1321
1322                 ohci1: usb@ee0a0000 {
1323                         compatible = "generic-ohci";
1324                         reg = <0 0xee0a0000 0 0x100>;
1325                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1326                         clocks = <&cpg CPG_MOD 702>;
1327                         phys = <&usb2_phy1>;
1328                         phy-names = "usb";
1329                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1330                         resets = <&cpg 702>;
1331                         status = "disabled";
1332                 };
1333
1334                 ehci1: usb@ee0a0100 {
1335                         compatible = "generic-ehci";
1336                         reg = <0 0xee0a0100 0 0x100>;
1337                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1338                         clocks = <&cpg CPG_MOD 702>;
1339                         phys = <&usb2_phy1>;
1340                         phy-names = "usb";
1341                         companion= <&ohci1>;
1342                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1343                         resets = <&cpg 702>;
1344                         status = "disabled";
1345                 };
1346
1347                 usb2_phy1: usb-phy@ee0a0200 {
1348                         compatible = "renesas,usb2-phy-r8a7796",
1349                                      "renesas,rcar-gen3-usb2-phy";
1350                         reg = <0 0xee0a0200 0 0x700>;
1351                         clocks = <&cpg CPG_MOD 702>;
1352                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1353                         resets = <&cpg 702>;
1354                         #phy-cells = <0>;
1355                         status = "disabled";
1356                 };
1357
1358                 sdhi0: sd@ee100000 {
1359                         compatible = "renesas,sdhi-r8a7796";
1360                         reg = <0 0xee100000 0 0x2000>;
1361                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1362                         clocks = <&cpg CPG_MOD 314>;
1363                         max-frequency = <200000000>;
1364                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1365                         resets = <&cpg 314>;
1366                         status = "disabled";
1367                 };
1368
1369                 sdhi1: sd@ee120000 {
1370                         compatible = "renesas,sdhi-r8a7796";
1371                         reg = <0 0xee120000 0 0x2000>;
1372                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1373                         clocks = <&cpg CPG_MOD 313>;
1374                         max-frequency = <200000000>;
1375                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1376                         resets = <&cpg 313>;
1377                         status = "disabled";
1378                 };
1379
1380                 sdhi2: sd@ee140000 {
1381                         compatible = "renesas,sdhi-r8a7796";
1382                         reg = <0 0xee140000 0 0x2000>;
1383                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1384                         clocks = <&cpg CPG_MOD 312>;
1385                         max-frequency = <200000000>;
1386                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1387                         resets = <&cpg 312>;
1388                         status = "disabled";
1389                 };
1390
1391                 sdhi3: sd@ee160000 {
1392                         compatible = "renesas,sdhi-r8a7796";
1393                         reg = <0 0xee160000 0 0x2000>;
1394                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1395                         clocks = <&cpg CPG_MOD 311>;
1396                         max-frequency = <200000000>;
1397                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1398                         resets = <&cpg 311>;
1399                         status = "disabled";
1400                 };
1401
1402                 tsc: thermal@e6198000 {
1403                         compatible = "renesas,r8a7796-thermal";
1404                         reg = <0 0xe6198000 0 0x68>,
1405                               <0 0xe61a0000 0 0x5c>,
1406                               <0 0xe61a8000 0 0x5c>;
1407                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1408                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1409                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1410                         clocks = <&cpg CPG_MOD 522>;
1411                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1412                         resets = <&cpg 522>;
1413                         #thermal-sensor-cells = <1>;
1414                         status = "okay";
1415                 };
1416
1417                 thermal-zones {
1418                         sensor_thermal1: sensor-thermal1 {
1419                                 polling-delay-passive = <250>;
1420                                 polling-delay = <1000>;
1421                                 thermal-sensors = <&tsc 0>;
1422
1423                                 trips {
1424                                         sensor1_crit: sensor1-crit {
1425                                                 temperature = <120000>;
1426                                                 hysteresis = <2000>;
1427                                                 type = "critical";
1428                                         };
1429                                 };
1430                         };
1431
1432                         sensor_thermal2: sensor-thermal2 {
1433                                 polling-delay-passive = <250>;
1434                                 polling-delay = <1000>;
1435                                 thermal-sensors = <&tsc 1>;
1436
1437                                 trips {
1438                                         sensor2_crit: sensor2-crit {
1439                                                 temperature = <120000>;
1440                                                 hysteresis = <2000>;
1441                                                 type = "critical";
1442                                         };
1443                                 };
1444                         };
1445
1446                         sensor_thermal3: sensor-thermal3 {
1447                                 polling-delay-passive = <250>;
1448                                 polling-delay = <1000>;
1449                                 thermal-sensors = <&tsc 2>;
1450
1451                                 trips {
1452                                         sensor3_crit: sensor3-crit {
1453                                                 temperature = <120000>;
1454                                                 hysteresis = <2000>;
1455                                                 type = "critical";
1456                                         };
1457                                 };
1458                         };
1459                 };
1460
1461                 rcar_sound: sound@ec500000 {
1462                         /*
1463                          * #sound-dai-cells is required
1464                          *
1465                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1466                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1467                          */
1468                         /*
1469                          * #clock-cells is required for audio_clkout0/1/2/3
1470                          *
1471                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1472                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1473                          */
1474                         compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1475                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1476                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1477                                 <0 0xec540000 0 0x1000>, /* SSIU */
1478                                 <0 0xec541000 0 0x280>,  /* SSI */
1479                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1480                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1481
1482                         clocks = <&cpg CPG_MOD 1005>,
1483                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1484                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1485                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1486                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1487                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1488                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1489                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1490                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1491                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1492                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1493                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1494                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1495                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1496                                  <&audio_clk_a>, <&audio_clk_b>,
1497                                  <&audio_clk_c>,
1498                                  <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1499                         clock-names = "ssi-all",
1500                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1501                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1502                                       "ssi.1", "ssi.0",
1503                                       "src.9", "src.8", "src.7", "src.6",
1504                                       "src.5", "src.4", "src.3", "src.2",
1505                                       "src.1", "src.0",
1506                                       "mix.1", "mix.0",
1507                                       "ctu.1", "ctu.0",
1508                                       "dvc.0", "dvc.1",
1509                                       "clk_a", "clk_b", "clk_c", "clk_i";
1510                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1511                         resets = <&cpg 1005>,
1512                                  <&cpg 1006>, <&cpg 1007>,
1513                                  <&cpg 1008>, <&cpg 1009>,
1514                                  <&cpg 1010>, <&cpg 1011>,
1515                                  <&cpg 1012>, <&cpg 1013>,
1516                                  <&cpg 1014>, <&cpg 1015>;
1517                         reset-names = "ssi-all",
1518                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1519                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1520                                       "ssi.1", "ssi.0";
1521                         status = "disabled";
1522
1523                         rcar_sound,dvc {
1524                                 dvc0: dvc-0 {
1525                                         dmas = <&audma1 0xbc>;
1526                                         dma-names = "tx";
1527                                 };
1528                                 dvc1: dvc-1 {
1529                                         dmas = <&audma1 0xbe>;
1530                                         dma-names = "tx";
1531                                 };
1532                         };
1533
1534                         rcar_sound,mix {
1535                                 mix0: mix-0 { };
1536                                 mix1: mix-1 { };
1537                         };
1538
1539                         rcar_sound,ctu {
1540                                 ctu00: ctu-0 { };
1541                                 ctu01: ctu-1 { };
1542                                 ctu02: ctu-2 { };
1543                                 ctu03: ctu-3 { };
1544                                 ctu10: ctu-4 { };
1545                                 ctu11: ctu-5 { };
1546                                 ctu12: ctu-6 { };
1547                                 ctu13: ctu-7 { };
1548                         };
1549
1550                         rcar_sound,src {
1551                                 src0: src-0 {
1552                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1553                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1554                                         dma-names = "rx", "tx";
1555                                 };
1556                                 src1: src-1 {
1557                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1558                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1559                                         dma-names = "rx", "tx";
1560                                 };
1561                                 src2: src-2 {
1562                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1563                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1564                                         dma-names = "rx", "tx";
1565                                 };
1566                                 src3: src-3 {
1567                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1568                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1569                                         dma-names = "rx", "tx";
1570                                 };
1571                                 src4: src-4 {
1572                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1573                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1574                                         dma-names = "rx", "tx";
1575                                 };
1576                                 src5: src-5 {
1577                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1578                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1579                                         dma-names = "rx", "tx";
1580                                 };
1581                                 src6: src-6 {
1582                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1583                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1584                                         dma-names = "rx", "tx";
1585                                 };
1586                                 src7: src-7 {
1587                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1588                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1589                                         dma-names = "rx", "tx";
1590                                 };
1591                                 src8: src-8 {
1592                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1593                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1594                                         dma-names = "rx", "tx";
1595                                 };
1596                                 src9: src-9 {
1597                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1598                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1599                                         dma-names = "rx", "tx";
1600                                 };
1601                         };
1602
1603                         rcar_sound,ssi {
1604                                 ssi0: ssi-0 {
1605                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1606                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1607                                         dma-names = "rx", "tx", "rxu", "txu";
1608                                 };
1609                                 ssi1: ssi-1 {
1610                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1611                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1612                                         dma-names = "rx", "tx", "rxu", "txu";
1613                                 };
1614                                 ssi2: ssi-2 {
1615                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1616                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1617                                         dma-names = "rx", "tx", "rxu", "txu";
1618                                 };
1619                                 ssi3: ssi-3 {
1620                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1621                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1622                                         dma-names = "rx", "tx", "rxu", "txu";
1623                                 };
1624                                 ssi4: ssi-4 {
1625                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1626                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1627                                         dma-names = "rx", "tx", "rxu", "txu";
1628                                 };
1629                                 ssi5: ssi-5 {
1630                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1631                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1632                                         dma-names = "rx", "tx", "rxu", "txu";
1633                                 };
1634                                 ssi6: ssi-6 {
1635                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1636                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1637                                         dma-names = "rx", "tx", "rxu", "txu";
1638                                 };
1639                                 ssi7: ssi-7 {
1640                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1641                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1642                                         dma-names = "rx", "tx", "rxu", "txu";
1643                                 };
1644                                 ssi8: ssi-8 {
1645                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1646                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1647                                         dma-names = "rx", "tx", "rxu", "txu";
1648                                 };
1649                                 ssi9: ssi-9 {
1650                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1651                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1652                                         dma-names = "rx", "tx", "rxu", "txu";
1653                                 };
1654                         };
1655                 };
1656
1657                 pciec0: pcie@fe000000 {
1658                         /* placeholder */
1659                 };
1660
1661                 pciec1: pcie@ee800000 {
1662                         /* placeholder */
1663                 };
1664
1665                 fcpf0: fcp@fe950000 {
1666                         compatible = "renesas,fcpf";
1667                         reg = <0 0xfe950000 0 0x200>;
1668                         clocks = <&cpg CPG_MOD 615>;
1669                         power-domains = <&sysc R8A7796_PD_A3VC>;
1670                         resets = <&cpg 615>;
1671                 };
1672
1673                 vspb: vsp@fe960000 {
1674                         compatible = "renesas,vsp2";
1675                         reg = <0 0xfe960000 0 0x8000>;
1676                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1677                         clocks = <&cpg CPG_MOD 626>;
1678                         power-domains = <&sysc R8A7796_PD_A3VC>;
1679                         resets = <&cpg 626>;
1680
1681                         renesas,fcp = <&fcpvb0>;
1682                 };
1683
1684                 fcpvb0: fcp@fe96f000 {
1685                         compatible = "renesas,fcpv";
1686                         reg = <0 0xfe96f000 0 0x200>;
1687                         clocks = <&cpg CPG_MOD 607>;
1688                         power-domains = <&sysc R8A7796_PD_A3VC>;
1689                         resets = <&cpg 607>;
1690                 };
1691
1692                 vspi0: vsp@fe9a0000 {
1693                         compatible = "renesas,vsp2";
1694                         reg = <0 0xfe9a0000 0 0x8000>;
1695                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1696                         clocks = <&cpg CPG_MOD 631>;
1697                         power-domains = <&sysc R8A7796_PD_A3VC>;
1698                         resets = <&cpg 631>;
1699
1700                         renesas,fcp = <&fcpvi0>;
1701                 };
1702
1703                 fcpvi0: fcp@fe9af000 {
1704                         compatible = "renesas,fcpv";
1705                         reg = <0 0xfe9af000 0 0x200>;
1706                         clocks = <&cpg CPG_MOD 611>;
1707                         power-domains = <&sysc R8A7796_PD_A3VC>;
1708                         resets = <&cpg 611>;
1709                 };
1710
1711                 vspd0: vsp@fea20000 {
1712                         compatible = "renesas,vsp2";
1713                         reg = <0 0xfea20000 0 0x4000>;
1714                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1715                         clocks = <&cpg CPG_MOD 623>;
1716                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1717                         resets = <&cpg 623>;
1718
1719                         renesas,fcp = <&fcpvd0>;
1720                 };
1721
1722                 fcpvd0: fcp@fea27000 {
1723                         compatible = "renesas,fcpv";
1724                         reg = <0 0xfea27000 0 0x200>;
1725                         clocks = <&cpg CPG_MOD 603>;
1726                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1727                         resets = <&cpg 603>;
1728                 };
1729
1730                 vspd1: vsp@fea28000 {
1731                         compatible = "renesas,vsp2";
1732                         reg = <0 0xfea28000 0 0x4000>;
1733                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1734                         clocks = <&cpg CPG_MOD 622>;
1735                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1736                         resets = <&cpg 622>;
1737
1738                         renesas,fcp = <&fcpvd1>;
1739                 };
1740
1741                 fcpvd1: fcp@fea2f000 {
1742                         compatible = "renesas,fcpv";
1743                         reg = <0 0xfea2f000 0 0x200>;
1744                         clocks = <&cpg CPG_MOD 602>;
1745                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1746                         resets = <&cpg 602>;
1747                 };
1748
1749                 vspd2: vsp@fea30000 {
1750                         compatible = "renesas,vsp2";
1751                         reg = <0 0xfea30000 0 0x4000>;
1752                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1753                         clocks = <&cpg CPG_MOD 621>;
1754                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1755                         resets = <&cpg 621>;
1756
1757                         renesas,fcp = <&fcpvd2>;
1758                 };
1759
1760                 fcpvd2: fcp@fea37000 {
1761                         compatible = "renesas,fcpv";
1762                         reg = <0 0xfea37000 0 0x200>;
1763                         clocks = <&cpg CPG_MOD 601>;
1764                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1765                         resets = <&cpg 601>;
1766                 };
1767
1768                 hdmi0: hdmi@fead0000 {
1769                         compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
1770                         reg = <0 0xfead0000 0 0x10000>;
1771                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1772                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
1773                         clock-names = "iahb", "isfr";
1774                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1775                         resets = <&cpg 729>;
1776                         status = "disabled";
1777
1778                         ports {
1779                                 #address-cells = <1>;
1780                                 #size-cells = <0>;
1781                                 port@0 {
1782                                         reg = <0>;
1783                                         dw_hdmi0_in: endpoint {
1784                                                 remote-endpoint = <&du_out_hdmi0>;
1785                                         };
1786                                 };
1787                                 port@1 {
1788                                         reg = <1>;
1789                                 };
1790                         };
1791                 };
1792
1793                 du: display@feb00000 {
1794                         compatible = "renesas,du-r8a7796";
1795                         reg = <0 0xfeb00000 0 0x70000>,
1796                               <0 0xfeb90000 0 0x14>;
1797                         reg-names = "du", "lvds.0";
1798                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1799                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1800                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1801                         clocks = <&cpg CPG_MOD 724>,
1802                                  <&cpg CPG_MOD 723>,
1803                                  <&cpg CPG_MOD 722>,
1804                                  <&cpg CPG_MOD 727>;
1805                         clock-names = "du.0", "du.1", "du.2", "lvds.0";
1806                         status = "disabled";
1807
1808                         vsps = <&vspd0 &vspd1 &vspd2>;
1809
1810                         ports {
1811                                 #address-cells = <1>;
1812                                 #size-cells = <0>;
1813
1814                                 port@0 {
1815                                         reg = <0>;
1816                                         du_out_rgb: endpoint {
1817                                         };
1818                                 };
1819                                 port@1 {
1820                                         reg = <1>;
1821                                         du_out_hdmi0: endpoint {
1822                                                 remote-endpoint = <&dw_hdmi0_in>;
1823                                         };
1824                                 };
1825                                 port@2 {
1826                                         reg = <2>;
1827                                         du_out_lvds0: endpoint {
1828                                         };
1829                                 };
1830                         };
1831                 };
1832
1833                 imr-lx4@fe860000 {
1834                         compatible = "renesas,r8a7796-imr-lx4",
1835                                      "renesas,imr-lx4";
1836                         reg = <0 0xfe860000 0 0x2000>;
1837                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
1838                         clocks = <&cpg CPG_MOD 823>;
1839                         power-domains = <&sysc R8A7796_PD_A3VC>;
1840                         resets = <&cpg 823>;
1841                 };
1842
1843                 imr-lx4@fe870000 {
1844                         compatible = "renesas,r8a7796-imr-lx4",
1845                                      "renesas,imr-lx4";
1846                         reg = <0 0xfe870000 0 0x2000>;
1847                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
1848                         clocks = <&cpg CPG_MOD 822>;
1849                         power-domains = <&sysc R8A7796_PD_A3VC>;
1850                         resets = <&cpg 822>;
1851                 };
1852         };
1853 };