arch/arm/dts/r8a7796.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7796 SoC
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7796-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7796_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7796";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         /*
  31          * The external audio clocks are configured as 0 Hz fixed frequency
  32          * clocks by default.
  33          * Boards that provide audio clocks should override them.
  34          */
  35         audio_clk_a: audio_clk_a {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         audio_clk_b: audio_clk_b {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         audio_clk_c: audio_clk_c {
  48                 compatible = "fixed-clock";
  49                 #clock-cells = <0>;
  50                 clock-frequency = <0>;
  51         };
  52
  53         /* External CAN clock - to be overridden by boards that provide it */
  54         can_clk: can {
  55                 compatible = "fixed-clock";
  56                 #clock-cells = <0>;
  57                 clock-frequency = <0>;
  58         };
  59
  60         cluster0_opp: opp_table0 {
  61                 compatible = "operating-points-v2";
  62                 opp-shared;
  63
  64                 opp-500000000 {
  65                         opp-hz = /bits/ 64 <500000000>;
  66                         opp-microvolt = <820000>;
  67                         clock-latency-ns = <300000>;
  68                 };
  69                 opp-1000000000 {
  70                         opp-hz = /bits/ 64 <1000000000>;
  71                         opp-microvolt = <820000>;
  72                         clock-latency-ns = <300000>;
  73                 };
  74                 opp-1500000000 {
  75                         opp-hz = /bits/ 64 <1500000000>;
  76                         opp-microvolt = <820000>;
  77                         clock-latency-ns = <300000>;
  78                 };
  79                 opp-1600000000 {
  80                         opp-hz = /bits/ 64 <1600000000>;
  81                         opp-microvolt = <900000>;
  82                         clock-latency-ns = <300000>;
  83                         turbo-mode;
  84                 };
  85                 opp-1700000000 {
  86                         opp-hz = /bits/ 64 <1700000000>;
  87                         opp-microvolt = <900000>;
  88                         clock-latency-ns = <300000>;
  89                         turbo-mode;
  90                 };
  91                 opp-1800000000 {
  92                         opp-hz = /bits/ 64 <1800000000>;
  93                         opp-microvolt = <960000>;
  94                         clock-latency-ns = <300000>;
  95                         turbo-mode;
  96                 };
  97         };
  98
  99         cluster1_opp: opp_table1 {
 100                 compatible = "operating-points-v2";
 101                 opp-shared;
 102
 103                 opp-800000000 {
 104                         opp-hz = /bits/ 64 <800000000>;
 105                         opp-microvolt = <820000>;
 106                         clock-latency-ns = <300000>;
 107                 };
 108                 opp-1000000000 {
 109                         opp-hz = /bits/ 64 <1000000000>;
 110                         opp-microvolt = <820000>;
 111                         clock-latency-ns = <300000>;
 112                 };
 113                 opp-1200000000 {
 114                         opp-hz = /bits/ 64 <1200000000>;
 115                         opp-microvolt = <820000>;
 116                         clock-latency-ns = <300000>;
 117                 };
 118                 opp-1300000000 {
 119                         opp-hz = /bits/ 64 <1300000000>;
 120                         opp-microvolt = <820000>;
 121                         clock-latency-ns = <300000>;
 122                         turbo-mode;
 123                 };
 124         };
 125
 126         cpus {
 127                 #address-cells = <1>;
 128                 #size-cells = <0>;
 129
 130                 a57_0: cpu@0 {
 131                         compatible = "arm,cortex-a57", "arm,armv8";
 132                         reg = <0x0>;
 133                         device_type = "cpu";
 134                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
 135                         next-level-cache = <&L2_CA57>;
 136                         enable-method = "psci";
 137                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z>;
 138                         operating-points-v2 = <&cluster0_opp>;
 139                         #cooling-cells = <2>;
 140                 };
 141
 142                 a57_1: cpu@1 {
 143                         compatible = "arm,cortex-a57", "arm,armv8";
 144                         reg = <0x1>;
 145                         device_type = "cpu";
 146                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
 147                         next-level-cache = <&L2_CA57>;
 148                         enable-method = "psci";
 149                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z>;
 150                         operating-points-v2 = <&cluster0_opp>;
 151                         #cooling-cells = <2>;
 152                 };
 153
 154                 a53_0: cpu@100 {
 155                         compatible = "arm,cortex-a53", "arm,armv8";
 156                         reg = <0x100>;
 157                         device_type = "cpu";
 158                         power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
 159                         next-level-cache = <&L2_CA53>;
 160                         enable-method = "psci";
 161                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
 162                         operating-points-v2 = <&cluster1_opp>;
 163                 };
 164
 165                 a53_1: cpu@101 {
 166                         compatible = "arm,cortex-a53", "arm,armv8";
 167                         reg = <0x101>;
 168                         device_type = "cpu";
 169                         power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
 170                         next-level-cache = <&L2_CA53>;
 171                         enable-method = "psci";
 172                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
 173                         operating-points-v2 = <&cluster1_opp>;
 174                 };
 175
 176                 a53_2: cpu@102 {
 177                         compatible = "arm,cortex-a53", "arm,armv8";
 178                         reg = <0x102>;
 179                         device_type = "cpu";
 180                         power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
 181                         next-level-cache = <&L2_CA53>;
 182                         enable-method = "psci";
 183                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
 184                         operating-points-v2 = <&cluster1_opp>;
 185                 };
 186
 187                 a53_3: cpu@103 {
 188                         compatible = "arm,cortex-a53", "arm,armv8";
 189                         reg = <0x103>;
 190                         device_type = "cpu";
 191                         power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
 192                         next-level-cache = <&L2_CA53>;
 193                         enable-method = "psci";
 194                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
 195                         operating-points-v2 = <&cluster1_opp>;
 196                 };
 197
 198                 L2_CA57: cache-controller-0 {
 199                         compatible = "cache";
 200                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
 201                         cache-unified;
 202                         cache-level = <2>;
 203                 };
 204
 205                 L2_CA53: cache-controller-1 {
 206                         compatible = "cache";
 207                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
 208                         cache-unified;
 209                         cache-level = <2>;
 210                 };
 211         };
 212
 213         extal_clk: extal {
 214                 compatible = "fixed-clock";
 215                 #clock-cells = <0>;
 216                 /* This value must be overridden by the board */
 217                 clock-frequency = <0>;
 218         };
 219
 220         extalr_clk: extalr {
 221                 compatible = "fixed-clock";
 222                 #clock-cells = <0>;
 223                 /* This value must be overridden by the board */
 224                 clock-frequency = <0>;
 225         };
 226
 227         /* External PCIe clock - can be overridden by the board */
 228         pcie_bus_clk: pcie_bus {
 229                 compatible = "fixed-clock";
 230                 #clock-cells = <0>;
 231                 clock-frequency = <0>;
 232         };
 233
 234         pmu_a53 {
 235                 compatible = "arm,cortex-a53-pmu";
 236                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 237                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 238                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 239                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 240                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 241         };
 242
 243         pmu_a57 {
 244                 compatible = "arm,cortex-a57-pmu";
 245                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 246                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 247                 interrupt-affinity = <&a57_0>, <&a57_1>;
 248         };
 249
 250         psci {
 251                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 252                 method = "smc";
 253         };
 254
 255         /* External SCIF clock - to be overridden by boards that provide it */
 256         scif_clk: scif {
 257                 compatible = "fixed-clock";
 258                 #clock-cells = <0>;
 259                 clock-frequency = <0>;
 260         };
 261
 262         soc: soc {
 263                 compatible = "simple-bus";
 264                 interrupt-parent = <&gic>;
 265                 #address-cells = <2>;
 266                 #size-cells = <2>;
 267                 ranges;
 268
 269                 rwdt: watchdog@e6020000 {
 270                         compatible = "renesas,r8a7796-wdt",
 271                                      "renesas,rcar-gen3-wdt";
 272                         reg = <0 0xe6020000 0 0x0c>;
 273                         clocks = <&cpg CPG_MOD 402>;
 274                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 275                         resets = <&cpg 402>;
 276                         status = "disabled";
 277                 };
 278
 279                 gpio0: gpio@e6050000 {
 280                         compatible = "renesas,gpio-r8a7796",
 281                                      "renesas,rcar-gen3-gpio";
 282                         reg = <0 0xe6050000 0 0x50>;
 283                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 284                         #gpio-cells = <2>;
 285                         gpio-controller;
 286                         gpio-ranges = <&pfc 0 0 16>;
 287                         #interrupt-cells = <2>;
 288                         interrupt-controller;
 289                         clocks = <&cpg CPG_MOD 912>;
 290                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 291                         resets = <&cpg 912>;
 292                 };
 293
 294                 gpio1: gpio@e6051000 {
 295                         compatible = "renesas,gpio-r8a7796",
 296                                      "renesas,rcar-gen3-gpio";
 297                         reg = <0 0xe6051000 0 0x50>;
 298                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 299                         #gpio-cells = <2>;
 300                         gpio-controller;
 301                         gpio-ranges = <&pfc 0 32 29>;
 302                         #interrupt-cells = <2>;
 303                         interrupt-controller;
 304                         clocks = <&cpg CPG_MOD 911>;
 305                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 306                         resets = <&cpg 911>;
 307                 };
 308
 309                 gpio2: gpio@e6052000 {
 310                         compatible = "renesas,gpio-r8a7796",
 311                                      "renesas,rcar-gen3-gpio";
 312                         reg = <0 0xe6052000 0 0x50>;
 313                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 314                         #gpio-cells = <2>;
 315                         gpio-controller;
 316                         gpio-ranges = <&pfc 0 64 15>;
 317                         #interrupt-cells = <2>;
 318                         interrupt-controller;
 319                         clocks = <&cpg CPG_MOD 910>;
 320                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 321                         resets = <&cpg 910>;
 322                 };
 323
 324                 gpio3: gpio@e6053000 {
 325                         compatible = "renesas,gpio-r8a7796",
 326                                      "renesas,rcar-gen3-gpio";
 327                         reg = <0 0xe6053000 0 0x50>;
 328                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 329                         #gpio-cells = <2>;
 330                         gpio-controller;
 331                         gpio-ranges = <&pfc 0 96 16>;
 332                         #interrupt-cells = <2>;
 333                         interrupt-controller;
 334                         clocks = <&cpg CPG_MOD 909>;
 335                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 336                         resets = <&cpg 909>;
 337                 };
 338
 339                 gpio4: gpio@e6054000 {
 340                         compatible = "renesas,gpio-r8a7796",
 341                                      "renesas,rcar-gen3-gpio";
 342                         reg = <0 0xe6054000 0 0x50>;
 343                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 344                         #gpio-cells = <2>;
 345                         gpio-controller;
 346                         gpio-ranges = <&pfc 0 128 18>;
 347                         #interrupt-cells = <2>;
 348                         interrupt-controller;
 349                         clocks = <&cpg CPG_MOD 908>;
 350                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 351                         resets = <&cpg 908>;
 352                 };
 353
 354                 gpio5: gpio@e6055000 {
 355                         compatible = "renesas,gpio-r8a7796",
 356                                      "renesas,rcar-gen3-gpio";
 357                         reg = <0 0xe6055000 0 0x50>;
 358                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 359                         #gpio-cells = <2>;
 360                         gpio-controller;
 361                         gpio-ranges = <&pfc 0 160 26>;
 362                         #interrupt-cells = <2>;
 363                         interrupt-controller;
 364                         clocks = <&cpg CPG_MOD 907>;
 365                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 366                         resets = <&cpg 907>;
 367                 };
 368
 369                 gpio6: gpio@e6055400 {
 370                         compatible = "renesas,gpio-r8a7796",
 371                                      "renesas,rcar-gen3-gpio";
 372                         reg = <0 0xe6055400 0 0x50>;
 373                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 374                         #gpio-cells = <2>;
 375                         gpio-controller;
 376                         gpio-ranges = <&pfc 0 192 32>;
 377                         #interrupt-cells = <2>;
 378                         interrupt-controller;
 379                         clocks = <&cpg CPG_MOD 906>;
 380                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 381                         resets = <&cpg 906>;
 382                 };
 383
 384                 gpio7: gpio@e6055800 {
 385                         compatible = "renesas,gpio-r8a7796",
 386                                      "renesas,rcar-gen3-gpio";
 387                         reg = <0 0xe6055800 0 0x50>;
 388                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 389                         #gpio-cells = <2>;
 390                         gpio-controller;
 391                         gpio-ranges = <&pfc 0 224 4>;
 392                         #interrupt-cells = <2>;
 393                         interrupt-controller;
 394                         clocks = <&cpg CPG_MOD 905>;
 395                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 396                         resets = <&cpg 905>;
 397                 };
 398
 399                 pfc: pin-controller@e6060000 {
 400                         compatible = "renesas,pfc-r8a7796";
 401                         reg = <0 0xe6060000 0 0x50c>;
 402                 };
 403
 404                 cpg: clock-controller@e6150000 {
 405                         compatible = "renesas,r8a7796-cpg-mssr";
 406                         reg = <0 0xe6150000 0 0x1000>;
 407                         clocks = <&extal_clk>, <&extalr_clk>;
 408                         clock-names = "extal", "extalr";
 409                         #clock-cells = <2>;
 410                         #power-domain-cells = <0>;
 411                         #reset-cells = <1>;
 412                 };
 413
 414                 rst: reset-controller@e6160000 {
 415                         compatible = "renesas,r8a7796-rst";
 416                         reg = <0 0xe6160000 0 0x0200>;
 417                 };
 418
 419                 sysc: system-controller@e6180000 {
 420                         compatible = "renesas,r8a7796-sysc";
 421                         reg = <0 0xe6180000 0 0x0400>;
 422                         #power-domain-cells = <1>;
 423                 };
 424
 425                 tsc: thermal@e6198000 {
 426                         compatible = "renesas,r8a7796-thermal";
 427                         reg = <0 0xe6198000 0 0x100>,
 428                               <0 0xe61a0000 0 0x100>,
 429                               <0 0xe61a8000 0 0x100>;
 430                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 431                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 432                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 433                         clocks = <&cpg CPG_MOD 522>;
 434                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 435                         resets = <&cpg 522>;
 436                         #thermal-sensor-cells = <1>;
 437                         status = "okay";
 438                 };
 439
 440                 intc_ex: interrupt-controller@e61c0000 {
 441                         compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
 442                         #interrupt-cells = <2>;
 443                         interrupt-controller;
 444                         reg = <0 0xe61c0000 0 0x200>;
 445                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 446                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 447                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 448                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 449                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 450                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 451                         clocks = <&cpg CPG_MOD 407>;
 452                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 453                         resets = <&cpg 407>;
 454                 };
 455
 456                 i2c0: i2c@e6500000 {
 457                         #address-cells = <1>;
 458                         #size-cells = <0>;
 459                         compatible = "renesas,i2c-r8a7796",
 460                                      "renesas,rcar-gen3-i2c";
 461                         reg = <0 0xe6500000 0 0x40>;
 462                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 463                         clocks = <&cpg CPG_MOD 931>;
 464                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 465                         resets = <&cpg 931>;
 466                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 467                                <&dmac2 0x91>, <&dmac2 0x90>;
 468                         dma-names = "tx", "rx", "tx", "rx";
 469                         i2c-scl-internal-delay-ns = <110>;
 470                         status = "disabled";
 471                 };
 472
 473                 i2c1: i2c@e6508000 {
 474                         #address-cells = <1>;
 475                         #size-cells = <0>;
 476                         compatible = "renesas,i2c-r8a7796",
 477                                      "renesas,rcar-gen3-i2c";
 478                         reg = <0 0xe6508000 0 0x40>;
 479                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 480                         clocks = <&cpg CPG_MOD 930>;
 481                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 482                         resets = <&cpg 930>;
 483                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 484                                <&dmac2 0x93>, <&dmac2 0x92>;
 485                         dma-names = "tx", "rx", "tx", "rx";
 486                         i2c-scl-internal-delay-ns = <6>;
 487                         status = "disabled";
 488                 };
 489
 490                 i2c2: i2c@e6510000 {
 491                         #address-cells = <1>;
 492                         #size-cells = <0>;
 493                         compatible = "renesas,i2c-r8a7796",
 494                                      "renesas,rcar-gen3-i2c";
 495                         reg = <0 0xe6510000 0 0x40>;
 496                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 497                         clocks = <&cpg CPG_MOD 929>;
 498                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 499                         resets = <&cpg 929>;
 500                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 501                                <&dmac2 0x95>, <&dmac2 0x94>;
 502                         dma-names = "tx", "rx", "tx", "rx";
 503                         i2c-scl-internal-delay-ns = <6>;
 504                         status = "disabled";
 505                 };
 506
 507                 i2c3: i2c@e66d0000 {
 508                         #address-cells = <1>;
 509                         #size-cells = <0>;
 510                         compatible = "renesas,i2c-r8a7796",
 511                                      "renesas,rcar-gen3-i2c";
 512                         reg = <0 0xe66d0000 0 0x40>;
 513                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 514                         clocks = <&cpg CPG_MOD 928>;
 515                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 516                         resets = <&cpg 928>;
 517                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 518                         dma-names = "tx", "rx";
 519                         i2c-scl-internal-delay-ns = <110>;
 520                         status = "disabled";
 521                 };
 522
 523                 i2c4: i2c@e66d8000 {
 524                         #address-cells = <1>;
 525                         #size-cells = <0>;
 526                         compatible = "renesas,i2c-r8a7796",
 527                                      "renesas,rcar-gen3-i2c";
 528                         reg = <0 0xe66d8000 0 0x40>;
 529                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 530                         clocks = <&cpg CPG_MOD 927>;
 531                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 532                         resets = <&cpg 927>;
 533                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 534                         dma-names = "tx", "rx";
 535                         i2c-scl-internal-delay-ns = <110>;
 536                         status = "disabled";
 537                 };
 538
 539                 i2c5: i2c@e66e0000 {
 540                         #address-cells = <1>;
 541                         #size-cells = <0>;
 542                         compatible = "renesas,i2c-r8a7796",
 543                                      "renesas,rcar-gen3-i2c";
 544                         reg = <0 0xe66e0000 0 0x40>;
 545                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 546                         clocks = <&cpg CPG_MOD 919>;
 547                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 548                         resets = <&cpg 919>;
 549                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 550                         dma-names = "tx", "rx";
 551                         i2c-scl-internal-delay-ns = <110>;
 552                         status = "disabled";
 553                 };
 554
 555                 i2c6: i2c@e66e8000 {
 556                         #address-cells = <1>;
 557                         #size-cells = <0>;
 558                         compatible = "renesas,i2c-r8a7796",
 559                                      "renesas,rcar-gen3-i2c";
 560                         reg = <0 0xe66e8000 0 0x40>;
 561                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 562                         clocks = <&cpg CPG_MOD 918>;
 563                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 564                         resets = <&cpg 918>;
 565                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 566                         dma-names = "tx", "rx";
 567                         i2c-scl-internal-delay-ns = <6>;
 568                         status = "disabled";
 569                 };
 570
 571                 i2c_dvfs: i2c@e60b0000 {
 572                         #address-cells = <1>;
 573                         #size-cells = <0>;
 574                         compatible = "renesas,iic-r8a7796",
 575                                      "renesas,rcar-gen3-iic",
 576                                      "renesas,rmobile-iic";
 577                         reg = <0 0xe60b0000 0 0x425>;
 578                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 579                         clocks = <&cpg CPG_MOD 926>;
 580                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 581                         resets = <&cpg 926>;
 582                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 583                         dma-names = "tx", "rx";
 584                         status = "disabled";
 585                 };
 586
 587                 hscif0: serial@e6540000 {
 588                         compatible = "renesas,hscif-r8a7796",
 589                                      "renesas,rcar-gen3-hscif",
 590                                      "renesas,hscif";
 591                         reg = <0 0xe6540000 0 0x60>;
 592                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 593                         clocks = <&cpg CPG_MOD 520>,
 594                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 595                                  <&scif_clk>;
 596                         clock-names = "fck", "brg_int", "scif_clk";
 597                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 598                                <&dmac2 0x31>, <&dmac2 0x30>;
 599                         dma-names = "tx", "rx", "tx", "rx";
 600                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 601                         resets = <&cpg 520>;
 602                         status = "disabled";
 603                 };
 604
 605                 hscif1: serial@e6550000 {
 606                         compatible = "renesas,hscif-r8a7796",
 607                                      "renesas,rcar-gen3-hscif",
 608                                      "renesas,hscif";
 609                         reg = <0 0xe6550000 0 0x60>;
 610                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 611                         clocks = <&cpg CPG_MOD 519>,
 612                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 613                                  <&scif_clk>;
 614                         clock-names = "fck", "brg_int", "scif_clk";
 615                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 616                                <&dmac2 0x33>, <&dmac2 0x32>;
 617                         dma-names = "tx", "rx", "tx", "rx";
 618                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 619                         resets = <&cpg 519>;
 620                         status = "disabled";
 621                 };
 622
 623                 hscif2: serial@e6560000 {
 624                         compatible = "renesas,hscif-r8a7796",
 625                                      "renesas,rcar-gen3-hscif",
 626                                      "renesas,hscif";
 627                         reg = <0 0xe6560000 0 0x60>;
 628                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 629                         clocks = <&cpg CPG_MOD 518>,
 630                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 631                                  <&scif_clk>;
 632                         clock-names = "fck", "brg_int", "scif_clk";
 633                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 634                                <&dmac2 0x35>, <&dmac2 0x34>;
 635                         dma-names = "tx", "rx", "tx", "rx";
 636                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 637                         resets = <&cpg 518>;
 638                         status = "disabled";
 639                 };
 640
 641                 hscif3: serial@e66a0000 {
 642                         compatible = "renesas,hscif-r8a7796",
 643                                      "renesas,rcar-gen3-hscif",
 644                                      "renesas,hscif";
 645                         reg = <0 0xe66a0000 0 0x60>;
 646                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 647                         clocks = <&cpg CPG_MOD 517>,
 648                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 649                                  <&scif_clk>;
 650                         clock-names = "fck", "brg_int", "scif_clk";
 651                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 652                         dma-names = "tx", "rx";
 653                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 654                         resets = <&cpg 517>;
 655                         status = "disabled";
 656                 };
 657
 658                 hscif4: serial@e66b0000 {
 659                         compatible = "renesas,hscif-r8a7796",
 660                                      "renesas,rcar-gen3-hscif",
 661                                      "renesas,hscif";
 662                         reg = <0 0xe66b0000 0 0x60>;
 663                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 664                         clocks = <&cpg CPG_MOD 516>,
 665                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 666                                  <&scif_clk>;
 667                         clock-names = "fck", "brg_int", "scif_clk";
 668                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 669                         dma-names = "tx", "rx";
 670                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 671                         resets = <&cpg 516>;
 672                         status = "disabled";
 673                 };
 674
 675                 hsusb: usb@e6590000 {
 676                         compatible = "renesas,usbhs-r8a7796",
 677                                      "renesas,rcar-gen3-usbhs";
 678                         reg = <0 0xe6590000 0 0x100>;
 679                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 680                         clocks = <&cpg CPG_MOD 704>;
 681                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 682                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 683                         dma-names = "ch0", "ch1", "ch2", "ch3";
 684                         renesas,buswait = <11>;
 685                         phys = <&usb2_phy0>;
 686                         phy-names = "usb";
 687                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 688                         resets = <&cpg 704>;
 689                         status = "disabled";
 690                 };
 691
 692                 usb_dmac0: dma-controller@e65a0000 {
 693                         compatible = "renesas,r8a7796-usb-dmac",
 694                                      "renesas,usb-dmac";
 695                         reg = <0 0xe65a0000 0 0x100>;
 696                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 697                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 698                         interrupt-names = "ch0", "ch1";
 699                         clocks = <&cpg CPG_MOD 330>;
 700                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 701                         resets = <&cpg 330>;
 702                         #dma-cells = <1>;
 703                         dma-channels = <2>;
 704                 };
 705
 706                 usb_dmac1: dma-controller@e65b0000 {
 707                         compatible = "renesas,r8a7796-usb-dmac",
 708                                      "renesas,usb-dmac";
 709                         reg = <0 0xe65b0000 0 0x100>;
 710                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 711                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 712                         interrupt-names = "ch0", "ch1";
 713                         clocks = <&cpg CPG_MOD 331>;
 714                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 715                         resets = <&cpg 331>;
 716                         #dma-cells = <1>;
 717                         dma-channels = <2>;
 718                 };
 719
 720                 usb3_phy0: usb-phy@e65ee000 {
 721                         compatible = "renesas,r8a7796-usb3-phy",
 722                                      "renesas,rcar-gen3-usb3-phy";
 723                         reg = <0 0xe65ee000 0 0x90>;
 724                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 725                                  <&usb_extal_clk>;
 726                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 727                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 728                         resets = <&cpg 328>;
 729                         #phy-cells = <0>;
 730                         status = "disabled";
 731                 };
 732
 733                 dmac0: dma-controller@e6700000 {
 734                         compatible = "renesas,dmac-r8a7796",
 735                                      "renesas,rcar-dmac";
 736                         reg = <0 0xe6700000 0 0x10000>;
 737                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 738                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 739                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 740                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 741                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 742                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 743                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 744                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 745                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 746                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 747                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 748                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 749                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 750                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 751                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 752                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 753                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 754                         interrupt-names = "error",
 755                                         "ch0", "ch1", "ch2", "ch3",
 756                                         "ch4", "ch5", "ch6", "ch7",
 757                                         "ch8", "ch9", "ch10", "ch11",
 758                                         "ch12", "ch13", "ch14", "ch15";
 759                         clocks = <&cpg CPG_MOD 219>;
 760                         clock-names = "fck";
 761                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 762                         resets = <&cpg 219>;
 763                         #dma-cells = <1>;
 764                         dma-channels = <16>;
 765                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 766                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 767                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 768                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 769                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 770                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 771                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 772                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 773                 };
 774
 775                 dmac1: dma-controller@e7300000 {
 776                         compatible = "renesas,dmac-r8a7796",
 777                                      "renesas,rcar-dmac";
 778                         reg = <0 0xe7300000 0 0x10000>;
 779                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 780                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 781                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 782                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 783                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 784                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 785                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 786                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 787                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 788                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 789                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 790                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 791                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 792                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 793                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 794                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 795                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 796                         interrupt-names = "error",
 797                                         "ch0", "ch1", "ch2", "ch3",
 798                                         "ch4", "ch5", "ch6", "ch7",
 799                                         "ch8", "ch9", "ch10", "ch11",
 800                                         "ch12", "ch13", "ch14", "ch15";
 801                         clocks = <&cpg CPG_MOD 218>;
 802                         clock-names = "fck";
 803                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 804                         resets = <&cpg 218>;
 805                         #dma-cells = <1>;
 806                         dma-channels = <16>;
 807                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 808                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 809                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 810                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 811                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 812                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 813                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 814                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 815                 };
 816
 817                 dmac2: dma-controller@e7310000 {
 818                         compatible = "renesas,dmac-r8a7796",
 819                                      "renesas,rcar-dmac";
 820                         reg = <0 0xe7310000 0 0x10000>;
 821                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 822                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 823                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 824                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 825                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 826                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 827                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 828                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 829                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 830                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 831                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 832                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 833                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 834                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 835                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 836                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 837                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 838                         interrupt-names = "error",
 839                                         "ch0", "ch1", "ch2", "ch3",
 840                                         "ch4", "ch5", "ch6", "ch7",
 841                                         "ch8", "ch9", "ch10", "ch11",
 842                                         "ch12", "ch13", "ch14", "ch15";
 843                         clocks = <&cpg CPG_MOD 217>;
 844                         clock-names = "fck";
 845                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 846                         resets = <&cpg 217>;
 847                         #dma-cells = <1>;
 848                         dma-channels = <16>;
 849                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 850                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 851                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 852                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 853                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 854                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 855                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 856                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 857                 };
 858
 859                 ipmmu_ds0: mmu@e6740000 {
 860                         compatible = "renesas,ipmmu-r8a7796";
 861                         reg = <0 0xe6740000 0 0x1000>;
 862                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 863                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 864                         #iommu-cells = <1>;
 865                 };
 866
 867                 ipmmu_ds1: mmu@e7740000 {
 868                         compatible = "renesas,ipmmu-r8a7796";
 869                         reg = <0 0xe7740000 0 0x1000>;
 870                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 871                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 872                         #iommu-cells = <1>;
 873                 };
 874
 875                 ipmmu_hc: mmu@e6570000 {
 876                         compatible = "renesas,ipmmu-r8a7796";
 877                         reg = <0 0xe6570000 0 0x1000>;
 878                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 879                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 880                         #iommu-cells = <1>;
 881                 };
 882
 883                 ipmmu_ir: mmu@ff8b0000 {
 884                         compatible = "renesas,ipmmu-r8a7796";
 885                         reg = <0 0xff8b0000 0 0x1000>;
 886                         renesas,ipmmu-main = <&ipmmu_mm 3>;
 887                         power-domains = <&sysc R8A7796_PD_A3IR>;
 888                         #iommu-cells = <1>;
 889                 };
 890
 891                 ipmmu_mm: mmu@e67b0000 {
 892                         compatible = "renesas,ipmmu-r8a7796";
 893                         reg = <0 0xe67b0000 0 0x1000>;
 894                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 895                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 896                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 897                         #iommu-cells = <1>;
 898                 };
 899
 900                 ipmmu_mp: mmu@ec670000 {
 901                         compatible = "renesas,ipmmu-r8a7796";
 902                         reg = <0 0xec670000 0 0x1000>;
 903                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 904                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 905                         #iommu-cells = <1>;
 906                 };
 907
 908                 ipmmu_pv0: mmu@fd800000 {
 909                         compatible = "renesas,ipmmu-r8a7796";
 910                         reg = <0 0xfd800000 0 0x1000>;
 911                         renesas,ipmmu-main = <&ipmmu_mm 5>;
 912                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 913                         #iommu-cells = <1>;
 914                 };
 915
 916                 ipmmu_pv1: mmu@fd950000 {
 917                         compatible = "renesas,ipmmu-r8a7796";
 918                         reg = <0 0xfd950000 0 0x1000>;
 919                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 920                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 921                         #iommu-cells = <1>;
 922                 };
 923
 924                 ipmmu_rt: mmu@ffc80000 {
 925                         compatible = "renesas,ipmmu-r8a7796";
 926                         reg = <0 0xffc80000 0 0x1000>;
 927                         renesas,ipmmu-main = <&ipmmu_mm 7>;
 928                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 929                         #iommu-cells = <1>;
 930                 };
 931
 932                 ipmmu_vc0: mmu@fe6b0000 {
 933                         compatible = "renesas,ipmmu-r8a7796";
 934                         reg = <0 0xfe6b0000 0 0x1000>;
 935                         renesas,ipmmu-main = <&ipmmu_mm 8>;
 936                         power-domains = <&sysc R8A7796_PD_A3VC>;
 937                         #iommu-cells = <1>;
 938                 };
 939
 940                 ipmmu_vi0: mmu@febd0000 {
 941                         compatible = "renesas,ipmmu-r8a7796";
 942                         reg = <0 0xfebd0000 0 0x1000>;
 943                         renesas,ipmmu-main = <&ipmmu_mm 9>;
 944                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 945                         #iommu-cells = <1>;
 946                 };
 947
 948                 avb: ethernet@e6800000 {
 949                         compatible = "renesas,etheravb-r8a7796",
 950                                      "renesas,etheravb-rcar-gen3";
 951                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 952                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 953                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 954                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 955                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 956                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 957                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 958                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 959                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 960                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 961                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 962                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 963                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 964                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 965                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 966                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 967                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 968                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 970                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 971                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 972                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 977                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 978                                           "ch4", "ch5", "ch6", "ch7",
 979                                           "ch8", "ch9", "ch10", "ch11",
 980                                           "ch12", "ch13", "ch14", "ch15",
 981                                           "ch16", "ch17", "ch18", "ch19",
 982                                           "ch20", "ch21", "ch22", "ch23",
 983                                           "ch24";
 984                         clocks = <&cpg CPG_MOD 812>;
 985                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 986                         resets = <&cpg 812>;
 987                         phy-mode = "rgmii";
 988                         iommus = <&ipmmu_ds0 16>;
 989                         #address-cells = <1>;
 990                         #size-cells = <0>;
 991                         status = "disabled";
 992                 };
 993
 994                 can0: can@e6c30000 {
 995                         compatible = "renesas,can-r8a7796",
 996                                      "renesas,rcar-gen3-can";
 997                         reg = <0 0xe6c30000 0 0x1000>;
 998                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 999                         clocks = <&cpg CPG_MOD 916>,
1000                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1001                                <&can_clk>;
1002                         clock-names = "clkp1", "clkp2", "can_clk";
1003                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1004                         assigned-clock-rates = <40000000>;
1005                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1006                         resets = <&cpg 916>;
1007                         status = "disabled";
1008                 };
1009
1010                 can1: can@e6c38000 {
1011                         compatible = "renesas,can-r8a7796",
1012                                      "renesas,rcar-gen3-can";
1013                         reg = <0 0xe6c38000 0 0x1000>;
1014                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1015                         clocks = <&cpg CPG_MOD 915>,
1016                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1017                                <&can_clk>;
1018                         clock-names = "clkp1", "clkp2", "can_clk";
1019                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1020                         assigned-clock-rates = <40000000>;
1021                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1022                         resets = <&cpg 915>;
1023                         status = "disabled";
1024                 };
1025
1026                 canfd: can@e66c0000 {
1027                         compatible = "renesas,r8a7796-canfd",
1028                                      "renesas,rcar-gen3-canfd";
1029                         reg = <0 0xe66c0000 0 0x8000>;
1030                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1031                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1032                         clocks = <&cpg CPG_MOD 914>,
1033                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1034                                <&can_clk>;
1035                         clock-names = "fck", "canfd", "can_clk";
1036                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1037                         assigned-clock-rates = <40000000>;
1038                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1039                         resets = <&cpg 914>;
1040                         status = "disabled";
1041
1042                         channel0 {
1043                                 status = "disabled";
1044                         };
1045
1046                         channel1 {
1047                                 status = "disabled";
1048                         };
1049                 };
1050
1051                 pwm0: pwm@e6e30000 {
1052                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1053                         reg = <0 0xe6e30000 0 8>;
1054                         #pwm-cells = <2>;
1055                         clocks = <&cpg CPG_MOD 523>;
1056                         resets = <&cpg 523>;
1057                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1058                         status = "disabled";
1059                 };
1060
1061                 pwm1: pwm@e6e31000 {
1062                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1063                         reg = <0 0xe6e31000 0 8>;
1064                         #pwm-cells = <2>;
1065                         clocks = <&cpg CPG_MOD 523>;
1066                         resets = <&cpg 523>;
1067                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1068                         status = "disabled";
1069                 };
1070
1071                 pwm2: pwm@e6e32000 {
1072                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1073                         reg = <0 0xe6e32000 0 8>;
1074                         #pwm-cells = <2>;
1075                         clocks = <&cpg CPG_MOD 523>;
1076                         resets = <&cpg 523>;
1077                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1078                         status = "disabled";
1079                 };
1080
1081                 pwm3: pwm@e6e33000 {
1082                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1083                         reg = <0 0xe6e33000 0 8>;
1084                         #pwm-cells = <2>;
1085                         clocks = <&cpg CPG_MOD 523>;
1086                         resets = <&cpg 523>;
1087                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1088                         status = "disabled";
1089                 };
1090
1091                 pwm4: pwm@e6e34000 {
1092                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1093                         reg = <0 0xe6e34000 0 8>;
1094                         #pwm-cells = <2>;
1095                         clocks = <&cpg CPG_MOD 523>;
1096                         resets = <&cpg 523>;
1097                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1098                         status = "disabled";
1099                 };
1100
1101                 pwm5: pwm@e6e35000 {
1102                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1103                         reg = <0 0xe6e35000 0 8>;
1104                         #pwm-cells = <2>;
1105                         clocks = <&cpg CPG_MOD 523>;
1106                         resets = <&cpg 523>;
1107                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1108                         status = "disabled";
1109                 };
1110
1111                 pwm6: pwm@e6e36000 {
1112                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1113                         reg = <0 0xe6e36000 0 8>;
1114                         #pwm-cells = <2>;
1115                         clocks = <&cpg CPG_MOD 523>;
1116                         resets = <&cpg 523>;
1117                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1118                         status = "disabled";
1119                 };
1120
1121                 scif0: serial@e6e60000 {
1122                         compatible = "renesas,scif-r8a7796",
1123                                      "renesas,rcar-gen3-scif", "renesas,scif";
1124                         reg = <0 0xe6e60000 0 64>;
1125                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1126                         clocks = <&cpg CPG_MOD 207>,
1127                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1128                                  <&scif_clk>;
1129                         clock-names = "fck", "brg_int", "scif_clk";
1130                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1131                                <&dmac2 0x51>, <&dmac2 0x50>;
1132                         dma-names = "tx", "rx", "tx", "rx";
1133                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1134                         resets = <&cpg 207>;
1135                         status = "disabled";
1136                 };
1137
1138                 scif1: serial@e6e68000 {
1139                         compatible = "renesas,scif-r8a7796",
1140                                      "renesas,rcar-gen3-scif", "renesas,scif";
1141                         reg = <0 0xe6e68000 0 64>;
1142                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1143                         clocks = <&cpg CPG_MOD 206>,
1144                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1145                                  <&scif_clk>;
1146                         clock-names = "fck", "brg_int", "scif_clk";
1147                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1148                                <&dmac2 0x53>, <&dmac2 0x52>;
1149                         dma-names = "tx", "rx", "tx", "rx";
1150                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1151                         resets = <&cpg 206>;
1152                         status = "disabled";
1153                 };
1154
1155                 scif2: serial@e6e88000 {
1156                         compatible = "renesas,scif-r8a7796",
1157                                      "renesas,rcar-gen3-scif", "renesas,scif";
1158                         reg = <0 0xe6e88000 0 64>;
1159                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1160                         clocks = <&cpg CPG_MOD 310>,
1161                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1162                                  <&scif_clk>;
1163                         clock-names = "fck", "brg_int", "scif_clk";
1164                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1165                         resets = <&cpg 310>;
1166                         status = "disabled";
1167                 };
1168
1169                 scif3: serial@e6c50000 {
1170                         compatible = "renesas,scif-r8a7796",
1171                                      "renesas,rcar-gen3-scif", "renesas,scif";
1172                         reg = <0 0xe6c50000 0 64>;
1173                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1174                         clocks = <&cpg CPG_MOD 204>,
1175                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1176                                  <&scif_clk>;
1177                         clock-names = "fck", "brg_int", "scif_clk";
1178                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1179                         dma-names = "tx", "rx";
1180                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1181                         resets = <&cpg 204>;
1182                         status = "disabled";
1183                 };
1184
1185                 scif4: serial@e6c40000 {
1186                         compatible = "renesas,scif-r8a7796",
1187                                      "renesas,rcar-gen3-scif", "renesas,scif";
1188                         reg = <0 0xe6c40000 0 64>;
1189                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1190                         clocks = <&cpg CPG_MOD 203>,
1191                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1192                                  <&scif_clk>;
1193                         clock-names = "fck", "brg_int", "scif_clk";
1194                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1195                         dma-names = "tx", "rx";
1196                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1197                         resets = <&cpg 203>;
1198                         status = "disabled";
1199                 };
1200
1201                 scif5: serial@e6f30000 {
1202                         compatible = "renesas,scif-r8a7796",
1203                                      "renesas,rcar-gen3-scif", "renesas,scif";
1204                         reg = <0 0xe6f30000 0 64>;
1205                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1206                         clocks = <&cpg CPG_MOD 202>,
1207                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1208                                  <&scif_clk>;
1209                         clock-names = "fck", "brg_int", "scif_clk";
1210                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1211                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1212                         dma-names = "tx", "rx", "tx", "rx";
1213                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1214                         resets = <&cpg 202>;
1215                         status = "disabled";
1216                 };
1217
1218                 msiof0: spi@e6e90000 {
1219                         compatible = "renesas,msiof-r8a7796",
1220                                      "renesas,rcar-gen3-msiof";
1221                         reg = <0 0xe6e90000 0 0x0064>;
1222                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1223                         clocks = <&cpg CPG_MOD 211>;
1224                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1225                                <&dmac2 0x41>, <&dmac2 0x40>;
1226                         dma-names = "tx", "rx", "tx", "rx";
1227                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1228                         resets = <&cpg 211>;
1229                         #address-cells = <1>;
1230                         #size-cells = <0>;
1231                         status = "disabled";
1232                 };
1233
1234                 msiof1: spi@e6ea0000 {
1235                         compatible = "renesas,msiof-r8a7796",
1236                                      "renesas,rcar-gen3-msiof";
1237                         reg = <0 0xe6ea0000 0 0x0064>;
1238                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1239                         clocks = <&cpg CPG_MOD 210>;
1240                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1241                                <&dmac2 0x43>, <&dmac2 0x42>;
1242                         dma-names = "tx", "rx", "tx", "rx";
1243                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1244                         resets = <&cpg 210>;
1245                         #address-cells = <1>;
1246                         #size-cells = <0>;
1247                         status = "disabled";
1248                 };
1249
1250                 msiof2: spi@e6c00000 {
1251                         compatible = "renesas,msiof-r8a7796",
1252                                      "renesas,rcar-gen3-msiof";
1253                         reg = <0 0xe6c00000 0 0x0064>;
1254                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1255                         clocks = <&cpg CPG_MOD 209>;
1256                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1257                         dma-names = "tx", "rx";
1258                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1259                         resets = <&cpg 209>;
1260                         #address-cells = <1>;
1261                         #size-cells = <0>;
1262                         status = "disabled";
1263                 };
1264
1265                 msiof3: spi@e6c10000 {
1266                         compatible = "renesas,msiof-r8a7796",
1267                                      "renesas,rcar-gen3-msiof";
1268                         reg = <0 0xe6c10000 0 0x0064>;
1269                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1270                         clocks = <&cpg CPG_MOD 208>;
1271                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1272                         dma-names = "tx", "rx";
1273                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1274                         resets = <&cpg 208>;
1275                         #address-cells = <1>;
1276                         #size-cells = <0>;
1277                         status = "disabled";
1278                 };
1279
1280                 vin0: video@e6ef0000 {
1281                         compatible = "renesas,vin-r8a7796";
1282                         reg = <0 0xe6ef0000 0 0x1000>;
1283                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1284                         clocks = <&cpg CPG_MOD 811>;
1285                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1286                         resets = <&cpg 811>;
1287                         renesas,id = <0>;
1288                         status = "disabled";
1289
1290                         ports {
1291                                 #address-cells = <1>;
1292                                 #size-cells = <0>;
1293
1294                                 port@1 {
1295                                         #address-cells = <1>;
1296                                         #size-cells = <0>;
1297
1298                                         reg = <1>;
1299
1300                                         vin0csi20: endpoint@0 {
1301                                                 reg = <0>;
1302                                                 remote-endpoint= <&csi20vin0>;
1303                                         };
1304                                         vin0csi40: endpoint@2 {
1305                                                 reg = <2>;
1306                                                 remote-endpoint= <&csi40vin0>;
1307                                         };
1308                                 };
1309                         };
1310                 };
1311
1312                 vin1: video@e6ef1000 {
1313                         compatible = "renesas,vin-r8a7796";
1314                         reg = <0 0xe6ef1000 0 0x1000>;
1315                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1316                         clocks = <&cpg CPG_MOD 810>;
1317                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1318                         resets = <&cpg 810>;
1319                         renesas,id = <1>;
1320                         status = "disabled";
1321
1322                         ports {
1323                                 #address-cells = <1>;
1324                                 #size-cells = <0>;
1325
1326                                 port@1 {
1327                                         #address-cells = <1>;
1328                                         #size-cells = <0>;
1329
1330                                         reg = <1>;
1331
1332                                         vin1csi20: endpoint@0 {
1333                                                 reg = <0>;
1334                                                 remote-endpoint= <&csi20vin1>;
1335                                         };
1336                                         vin1csi40: endpoint@2 {
1337                                                 reg = <2>;
1338                                                 remote-endpoint= <&csi40vin1>;
1339                                         };
1340                                 };
1341                         };
1342                 };
1343
1344                 vin2: video@e6ef2000 {
1345                         compatible = "renesas,vin-r8a7796";
1346                         reg = <0 0xe6ef2000 0 0x1000>;
1347                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1348                         clocks = <&cpg CPG_MOD 809>;
1349                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1350                         resets = <&cpg 809>;
1351                         renesas,id = <2>;
1352                         status = "disabled";
1353
1354                         ports {
1355                                 #address-cells = <1>;
1356                                 #size-cells = <0>;
1357
1358                                 port@1 {
1359                                         #address-cells = <1>;
1360                                         #size-cells = <0>;
1361
1362                                         reg = <1>;
1363
1364                                         vin2csi20: endpoint@0 {
1365                                                 reg = <0>;
1366                                                 remote-endpoint= <&csi20vin2>;
1367                                         };
1368                                         vin2csi40: endpoint@2 {
1369                                                 reg = <2>;
1370                                                 remote-endpoint= <&csi40vin2>;
1371                                         };
1372                                 };
1373                         };
1374                 };
1375
1376                 vin3: video@e6ef3000 {
1377                         compatible = "renesas,vin-r8a7796";
1378                         reg = <0 0xe6ef3000 0 0x1000>;
1379                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1380                         clocks = <&cpg CPG_MOD 808>;
1381                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1382                         resets = <&cpg 808>;
1383                         renesas,id = <3>;
1384                         status = "disabled";
1385
1386                         ports {
1387                                 #address-cells = <1>;
1388                                 #size-cells = <0>;
1389
1390                                 port@1 {
1391                                         #address-cells = <1>;
1392                                         #size-cells = <0>;
1393
1394                                         reg = <1>;
1395
1396                                         vin3csi20: endpoint@0 {
1397                                                 reg = <0>;
1398                                                 remote-endpoint= <&csi20vin3>;
1399                                         };
1400                                         vin3csi40: endpoint@2 {
1401                                                 reg = <2>;
1402                                                 remote-endpoint= <&csi40vin3>;
1403                                         };
1404                                 };
1405                         };
1406                 };
1407
1408                 vin4: video@e6ef4000 {
1409                         compatible = "renesas,vin-r8a7796";
1410                         reg = <0 0xe6ef4000 0 0x1000>;
1411                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1412                         clocks = <&cpg CPG_MOD 807>;
1413                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1414                         resets = <&cpg 807>;
1415                         renesas,id = <4>;
1416                         status = "disabled";
1417
1418                         ports {
1419                                 #address-cells = <1>;
1420                                 #size-cells = <0>;
1421
1422                                 port@1 {
1423                                         #address-cells = <1>;
1424                                         #size-cells = <0>;
1425
1426                                         reg = <1>;
1427
1428                                         vin4csi20: endpoint@0 {
1429                                                 reg = <0>;
1430                                                 remote-endpoint= <&csi20vin4>;
1431                                         };
1432                                         vin4csi40: endpoint@2 {
1433                                                 reg = <2>;
1434                                                 remote-endpoint= <&csi40vin4>;
1435                                         };
1436                                 };
1437                         };
1438                 };
1439
1440                 vin5: video@e6ef5000 {
1441                         compatible = "renesas,vin-r8a7796";
1442                         reg = <0 0xe6ef5000 0 0x1000>;
1443                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1444                         clocks = <&cpg CPG_MOD 806>;
1445                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1446                         resets = <&cpg 806>;
1447                         renesas,id = <5>;
1448                         status = "disabled";
1449
1450                         ports {
1451                                 #address-cells = <1>;
1452                                 #size-cells = <0>;
1453
1454                                 port@1 {
1455                                         #address-cells = <1>;
1456                                         #size-cells = <0>;
1457
1458                                         reg = <1>;
1459
1460                                         vin5csi20: endpoint@0 {
1461                                                 reg = <0>;
1462                                                 remote-endpoint= <&csi20vin5>;
1463                                         };
1464                                         vin5csi40: endpoint@2 {
1465                                                 reg = <2>;
1466                                                 remote-endpoint= <&csi40vin5>;
1467                                         };
1468                                 };
1469                         };
1470                 };
1471
1472                 vin6: video@e6ef6000 {
1473                         compatible = "renesas,vin-r8a7796";
1474                         reg = <0 0xe6ef6000 0 0x1000>;
1475                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1476                         clocks = <&cpg CPG_MOD 805>;
1477                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1478                         resets = <&cpg 805>;
1479                         renesas,id = <6>;
1480                         status = "disabled";
1481
1482                         ports {
1483                                 #address-cells = <1>;
1484                                 #size-cells = <0>;
1485
1486                                 port@1 {
1487                                         #address-cells = <1>;
1488                                         #size-cells = <0>;
1489
1490                                         reg = <1>;
1491
1492                                         vin6csi20: endpoint@0 {
1493                                                 reg = <0>;
1494                                                 remote-endpoint= <&csi20vin6>;
1495                                         };
1496                                         vin6csi40: endpoint@2 {
1497                                                 reg = <2>;
1498                                                 remote-endpoint= <&csi40vin6>;
1499                                         };
1500                                 };
1501                         };
1502                 };
1503
1504                 vin7: video@e6ef7000 {
1505                         compatible = "renesas,vin-r8a7796";
1506                         reg = <0 0xe6ef7000 0 0x1000>;
1507                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1508                         clocks = <&cpg CPG_MOD 804>;
1509                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1510                         resets = <&cpg 804>;
1511                         renesas,id = <7>;
1512                         status = "disabled";
1513
1514                         ports {
1515                                 #address-cells = <1>;
1516                                 #size-cells = <0>;
1517
1518                                 port@1 {
1519                                         #address-cells = <1>;
1520                                         #size-cells = <0>;
1521
1522                                         reg = <1>;
1523
1524                                         vin7csi20: endpoint@0 {
1525                                                 reg = <0>;
1526                                                 remote-endpoint= <&csi20vin7>;
1527                                         };
1528                                         vin7csi40: endpoint@2 {
1529                                                 reg = <2>;
1530                                                 remote-endpoint= <&csi40vin7>;
1531                                         };
1532                                 };
1533                         };
1534                 };
1535
1536                 drif00: rif@e6f40000 {
1537                         compatible = "renesas,r8a7796-drif",
1538                                      "renesas,rcar-gen3-drif";
1539                         reg = <0 0xe6f40000 0 0x64>;
1540                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1541                         clocks = <&cpg CPG_MOD 515>;
1542                         clock-names = "fck";
1543                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1544                         dma-names = "rx", "rx";
1545                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1546                         resets = <&cpg 515>;
1547                         renesas,bonding = <&drif01>;
1548                         status = "disabled";
1549                 };
1550
1551                 drif01: rif@e6f50000 {
1552                         compatible = "renesas,r8a7796-drif",
1553                                      "renesas,rcar-gen3-drif";
1554                         reg = <0 0xe6f50000 0 0x64>;
1555                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1556                         clocks = <&cpg CPG_MOD 514>;
1557                         clock-names = "fck";
1558                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1559                         dma-names = "rx", "rx";
1560                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1561                         resets = <&cpg 514>;
1562                         renesas,bonding = <&drif00>;
1563                         status = "disabled";
1564                 };
1565
1566                 drif10: rif@e6f60000 {
1567                         compatible = "renesas,r8a7796-drif",
1568                                      "renesas,rcar-gen3-drif";
1569                         reg = <0 0xe6f60000 0 0x64>;
1570                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1571                         clocks = <&cpg CPG_MOD 513>;
1572                         clock-names = "fck";
1573                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1574                         dma-names = "rx", "rx";
1575                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1576                         resets = <&cpg 513>;
1577                         renesas,bonding = <&drif11>;
1578                         status = "disabled";
1579                 };
1580
1581                 drif11: rif@e6f70000 {
1582                         compatible = "renesas,r8a7796-drif",
1583                                      "renesas,rcar-gen3-drif";
1584                         reg = <0 0xe6f70000 0 0x64>;
1585                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1586                         clocks = <&cpg CPG_MOD 512>;
1587                         clock-names = "fck";
1588                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1589                         dma-names = "rx", "rx";
1590                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1591                         resets = <&cpg 512>;
1592                         renesas,bonding = <&drif10>;
1593                         status = "disabled";
1594                 };
1595
1596                 drif20: rif@e6f80000 {
1597                         compatible = "renesas,r8a7796-drif",
1598                                      "renesas,rcar-gen3-drif";
1599                         reg = <0 0xe6f80000 0 0x64>;
1600                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1601                         clocks = <&cpg CPG_MOD 511>;
1602                         clock-names = "fck";
1603                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1604                         dma-names = "rx", "rx";
1605                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1606                         resets = <&cpg 511>;
1607                         renesas,bonding = <&drif21>;
1608                         status = "disabled";
1609                 };
1610
1611                 drif21: rif@e6f90000 {
1612                         compatible = "renesas,r8a7796-drif",
1613                                      "renesas,rcar-gen3-drif";
1614                         reg = <0 0xe6f90000 0 0x64>;
1615                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1616                         clocks = <&cpg CPG_MOD 510>;
1617                         clock-names = "fck";
1618                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1619                         dma-names = "rx", "rx";
1620                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1621                         resets = <&cpg 510>;
1622                         renesas,bonding = <&drif20>;
1623                         status = "disabled";
1624                 };
1625
1626                 drif30: rif@e6fa0000 {
1627                         compatible = "renesas,r8a7796-drif",
1628                                      "renesas,rcar-gen3-drif";
1629                         reg = <0 0xe6fa0000 0 0x64>;
1630                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1631                         clocks = <&cpg CPG_MOD 509>;
1632                         clock-names = "fck";
1633                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1634                         dma-names = "rx", "rx";
1635                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1636                         resets = <&cpg 509>;
1637                         renesas,bonding = <&drif31>;
1638                         status = "disabled";
1639                 };
1640
1641                 drif31: rif@e6fb0000 {
1642                         compatible = "renesas,r8a7796-drif",
1643                                      "renesas,rcar-gen3-drif";
1644                         reg = <0 0xe6fb0000 0 0x64>;
1645                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1646                         clocks = <&cpg CPG_MOD 508>;
1647                         clock-names = "fck";
1648                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1649                         dma-names = "rx", "rx";
1650                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1651                         resets = <&cpg 508>;
1652                         renesas,bonding = <&drif30>;
1653                         status = "disabled";
1654                 };
1655
1656                 rcar_sound: sound@ec500000 {
1657                         /*
1658                          * #sound-dai-cells is required
1659                          *
1660                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1661                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1662                          */
1663                         /*
1664                          * #clock-cells is required for audio_clkout0/1/2/3
1665                          *
1666                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1667                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1668                          */
1669                         compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1670                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1671                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1672                                 <0 0xec540000 0 0x1000>, /* SSIU */
1673                                 <0 0xec541000 0 0x280>,  /* SSI */
1674                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1675                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1676
1677                         clocks = <&cpg CPG_MOD 1005>,
1678                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1679                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1680                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1681                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1682                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1683                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1684                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1685                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1686                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1687                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1688                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1689                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1690                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1691                                  <&audio_clk_a>, <&audio_clk_b>,
1692                                  <&audio_clk_c>,
1693                                  <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1694                         clock-names = "ssi-all",
1695                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1696                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1697                                       "ssi.1", "ssi.0",
1698                                       "src.9", "src.8", "src.7", "src.6",
1699                                       "src.5", "src.4", "src.3", "src.2",
1700                                       "src.1", "src.0",
1701                                       "mix.1", "mix.0",
1702                                       "ctu.1", "ctu.0",
1703                                       "dvc.0", "dvc.1",
1704                                       "clk_a", "clk_b", "clk_c", "clk_i";
1705                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1706                         resets = <&cpg 1005>,
1707                                  <&cpg 1006>, <&cpg 1007>,
1708                                  <&cpg 1008>, <&cpg 1009>,
1709                                  <&cpg 1010>, <&cpg 1011>,
1710                                  <&cpg 1012>, <&cpg 1013>,
1711                                  <&cpg 1014>, <&cpg 1015>;
1712                         reset-names = "ssi-all",
1713                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1714                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1715                                       "ssi.1", "ssi.0";
1716                         status = "disabled";
1717
1718                         rcar_sound,dvc {
1719                                 dvc0: dvc-0 {
1720                                         dmas = <&audma1 0xbc>;
1721                                         dma-names = "tx";
1722                                 };
1723                                 dvc1: dvc-1 {
1724                                         dmas = <&audma1 0xbe>;
1725                                         dma-names = "tx";
1726                                 };
1727                         };
1728
1729                         rcar_sound,mix {
1730                                 mix0: mix-0 { };
1731                                 mix1: mix-1 { };
1732                         };
1733
1734                         rcar_sound,ctu {
1735                                 ctu00: ctu-0 { };
1736                                 ctu01: ctu-1 { };
1737                                 ctu02: ctu-2 { };
1738                                 ctu03: ctu-3 { };
1739                                 ctu10: ctu-4 { };
1740                                 ctu11: ctu-5 { };
1741                                 ctu12: ctu-6 { };
1742                                 ctu13: ctu-7 { };
1743                         };
1744
1745                         rcar_sound,src {
1746                                 src0: src-0 {
1747                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1748                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1749                                         dma-names = "rx", "tx";
1750                                 };
1751                                 src1: src-1 {
1752                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1753                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1754                                         dma-names = "rx", "tx";
1755                                 };
1756                                 src2: src-2 {
1757                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1758                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1759                                         dma-names = "rx", "tx";
1760                                 };
1761                                 src3: src-3 {
1762                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1763                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1764                                         dma-names = "rx", "tx";
1765                                 };
1766                                 src4: src-4 {
1767                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1768                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1769                                         dma-names = "rx", "tx";
1770                                 };
1771                                 src5: src-5 {
1772                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1773                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1774                                         dma-names = "rx", "tx";
1775                                 };
1776                                 src6: src-6 {
1777                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1778                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1779                                         dma-names = "rx", "tx";
1780                                 };
1781                                 src7: src-7 {
1782                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1783                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1784                                         dma-names = "rx", "tx";
1785                                 };
1786                                 src8: src-8 {
1787                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1788                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1789                                         dma-names = "rx", "tx";
1790                                 };
1791                                 src9: src-9 {
1792                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1793                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1794                                         dma-names = "rx", "tx";
1795                                 };
1796                         };
1797
1798                         rcar_sound,ssi {
1799                                 ssi0: ssi-0 {
1800                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1801                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1802                                         dma-names = "rx", "tx", "rxu", "txu";
1803                                 };
1804                                 ssi1: ssi-1 {
1805                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1806                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1807                                         dma-names = "rx", "tx", "rxu", "txu";
1808                                 };
1809                                 ssi2: ssi-2 {
1810                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1811                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1812                                         dma-names = "rx", "tx", "rxu", "txu";
1813                                 };
1814                                 ssi3: ssi-3 {
1815                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1816                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1817                                         dma-names = "rx", "tx", "rxu", "txu";
1818                                 };
1819                                 ssi4: ssi-4 {
1820                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1821                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1822                                         dma-names = "rx", "tx", "rxu", "txu";
1823                                 };
1824                                 ssi5: ssi-5 {
1825                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1826                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1827                                         dma-names = "rx", "tx", "rxu", "txu";
1828                                 };
1829                                 ssi6: ssi-6 {
1830                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1831                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1832                                         dma-names = "rx", "tx", "rxu", "txu";
1833                                 };
1834                                 ssi7: ssi-7 {
1835                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1836                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1837                                         dma-names = "rx", "tx", "rxu", "txu";
1838                                 };
1839                                 ssi8: ssi-8 {
1840                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1841                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1842                                         dma-names = "rx", "tx", "rxu", "txu";
1843                                 };
1844                                 ssi9: ssi-9 {
1845                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1846                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1847                                         dma-names = "rx", "tx", "rxu", "txu";
1848                                 };
1849                         };
1850
1851                         ports {
1852                                 #address-cells = <1>;
1853                                 #size-cells = <0>;
1854                                 port@0 {
1855                                         reg = <0>;
1856                                 };
1857                                 port@1 {
1858                                         reg = <1>;
1859                                 };
1860                         };
1861                 };
1862
1863                 audma0: dma-controller@ec700000 {
1864                         compatible = "renesas,dmac-r8a7796",
1865                                      "renesas,rcar-dmac";
1866                         reg = <0 0xec700000 0 0x10000>;
1867                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1868                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1869                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1870                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1871                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1872                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1873                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1874                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1875                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1876                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1877                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1878                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1879                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1880                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1881                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1882                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1883                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1884                         interrupt-names = "error",
1885                                         "ch0", "ch1", "ch2", "ch3",
1886                                         "ch4", "ch5", "ch6", "ch7",
1887                                         "ch8", "ch9", "ch10", "ch11",
1888                                         "ch12", "ch13", "ch14", "ch15";
1889                         clocks = <&cpg CPG_MOD 502>;
1890                         clock-names = "fck";
1891                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1892                         resets = <&cpg 502>;
1893                         #dma-cells = <1>;
1894                         dma-channels = <16>;
1895                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1896                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1897                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1898                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1899                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1900                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1901                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1902                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1903                 };
1904
1905                 audma1: dma-controller@ec720000 {
1906                         compatible = "renesas,dmac-r8a7796",
1907                                      "renesas,rcar-dmac";
1908                         reg = <0 0xec720000 0 0x10000>;
1909                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1910                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1911                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1912                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1913                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1914                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1915                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1916                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1917                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1918                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1919                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1920                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1921                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1922                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1923                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1924                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1925                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1926                         interrupt-names = "error",
1927                                         "ch0", "ch1", "ch2", "ch3",
1928                                         "ch4", "ch5", "ch6", "ch7",
1929                                         "ch8", "ch9", "ch10", "ch11",
1930                                         "ch12", "ch13", "ch14", "ch15";
1931                         clocks = <&cpg CPG_MOD 501>;
1932                         clock-names = "fck";
1933                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1934                         resets = <&cpg 501>;
1935                         #dma-cells = <1>;
1936                         dma-channels = <16>;
1937                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
1938                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
1939                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
1940                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
1941                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
1942                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
1943                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
1944                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
1945                 };
1946
1947                 xhci0: usb@ee000000 {
1948                         compatible = "renesas,xhci-r8a7796",
1949                                      "renesas,rcar-gen3-xhci";
1950                         reg = <0 0xee000000 0 0xc00>;
1951                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1952                         clocks = <&cpg CPG_MOD 328>;
1953                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1954                         resets = <&cpg 328>;
1955                         status = "disabled";
1956                 };
1957
1958                 usb3_peri0: usb@ee020000 {
1959                         compatible = "renesas,r8a7796-usb3-peri",
1960                                      "renesas,rcar-gen3-usb3-peri";
1961                         reg = <0 0xee020000 0 0x400>;
1962                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1963                         clocks = <&cpg CPG_MOD 328>;
1964                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1965                         resets = <&cpg 328>;
1966                         status = "disabled";
1967                 };
1968
1969                 ohci0: usb@ee080000 {
1970                         compatible = "generic-ohci";
1971                         reg = <0 0xee080000 0 0x100>;
1972                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1973                         clocks = <&cpg CPG_MOD 703>;
1974                         phys = <&usb2_phy0>;
1975                         phy-names = "usb";
1976                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1977                         resets = <&cpg 703>;
1978                         status = "disabled";
1979                 };
1980
1981                 ohci1: usb@ee0a0000 {
1982                         compatible = "generic-ohci";
1983                         reg = <0 0xee0a0000 0 0x100>;
1984                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1985                         clocks = <&cpg CPG_MOD 702>;
1986                         phys = <&usb2_phy1>;
1987                         phy-names = "usb";
1988                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1989                         resets = <&cpg 702>;
1990                         status = "disabled";
1991                 };
1992
1993                 ehci0: usb@ee080100 {
1994                         compatible = "generic-ehci";
1995                         reg = <0 0xee080100 0 0x100>;
1996                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1997                         clocks = <&cpg CPG_MOD 703>;
1998                         phys = <&usb2_phy0>;
1999                         phy-names = "usb";
2000                         companion= <&ohci0>;
2001                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2002                         resets = <&cpg 703>;
2003                         status = "disabled";
2004                 };
2005
2006                 ehci1: usb@ee0a0100 {
2007                         compatible = "generic-ehci";
2008                         reg = <0 0xee0a0100 0 0x100>;
2009                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2010                         clocks = <&cpg CPG_MOD 702>;
2011                         phys = <&usb2_phy1>;
2012                         phy-names = "usb";
2013                         companion= <&ohci1>;
2014                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2015                         resets = <&cpg 702>;
2016                         status = "disabled";
2017                 };
2018
2019                 usb2_phy0: usb-phy@ee080200 {
2020                         compatible = "renesas,usb2-phy-r8a7796",
2021                                      "renesas,rcar-gen3-usb2-phy";
2022                         reg = <0 0xee080200 0 0x700>;
2023                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2024                         clocks = <&cpg CPG_MOD 703>;
2025                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2026                         resets = <&cpg 703>;
2027                         #phy-cells = <0>;
2028                         status = "disabled";
2029                 };
2030
2031                 usb2_phy1: usb-phy@ee0a0200 {
2032                         compatible = "renesas,usb2-phy-r8a7796",
2033                                      "renesas,rcar-gen3-usb2-phy";
2034                         reg = <0 0xee0a0200 0 0x700>;
2035                         clocks = <&cpg CPG_MOD 702>;
2036                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2037                         resets = <&cpg 702>;
2038                         #phy-cells = <0>;
2039                         status = "disabled";
2040                 };
2041
2042                 sdhi0: sd@ee100000 {
2043                         compatible = "renesas,sdhi-r8a7796",
2044                                      "renesas,rcar-gen3-sdhi";
2045                         reg = <0 0xee100000 0 0x2000>;
2046                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2047                         clocks = <&cpg CPG_MOD 314>;
2048                         max-frequency = <200000000>;
2049                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2050                         resets = <&cpg 314>;
2051                         status = "disabled";
2052                 };
2053
2054                 sdhi1: sd@ee120000 {
2055                         compatible = "renesas,sdhi-r8a7796",
2056                                      "renesas,rcar-gen3-sdhi";
2057                         reg = <0 0xee120000 0 0x2000>;
2058                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2059                         clocks = <&cpg CPG_MOD 313>;
2060                         max-frequency = <200000000>;
2061                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2062                         resets = <&cpg 313>;
2063                         status = "disabled";
2064                 };
2065
2066                 sdhi2: sd@ee140000 {
2067                         compatible = "renesas,sdhi-r8a7796",
2068                                      "renesas,rcar-gen3-sdhi";
2069                         reg = <0 0xee140000 0 0x2000>;
2070                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2071                         clocks = <&cpg CPG_MOD 312>;
2072                         max-frequency = <200000000>;
2073                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2074                         resets = <&cpg 312>;
2075                         status = "disabled";
2076                 };
2077
2078                 sdhi3: sd@ee160000 {
2079                         compatible = "renesas,sdhi-r8a7796",
2080                                      "renesas,rcar-gen3-sdhi";
2081                         reg = <0 0xee160000 0 0x2000>;
2082                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2083                         clocks = <&cpg CPG_MOD 311>;
2084                         max-frequency = <200000000>;
2085                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2086                         resets = <&cpg 311>;
2087                         status = "disabled";
2088                 };
2089
2090                 gic: interrupt-controller@f1010000 {
2091                         compatible = "arm,gic-400";
2092                         #interrupt-cells = <3>;
2093                         #address-cells = <0>;
2094                         interrupt-controller;
2095                         reg = <0x0 0xf1010000 0 0x1000>,
2096                               <0x0 0xf1020000 0 0x20000>,
2097                               <0x0 0xf1040000 0 0x20000>,
2098                               <0x0 0xf1060000 0 0x20000>;
2099                         interrupts = <GIC_PPI 9
2100                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2101                         clocks = <&cpg CPG_MOD 408>;
2102                         clock-names = "clk";
2103                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2104                         resets = <&cpg 408>;
2105                 };
2106
2107                 pciec0: pcie@fe000000 {
2108                         compatible = "renesas,pcie-r8a7796",
2109                                      "renesas,pcie-rcar-gen3";
2110                         reg = <0 0xfe000000 0 0x80000>;
2111                         #address-cells = <3>;
2112                         #size-cells = <2>;
2113                         bus-range = <0x00 0xff>;
2114                         device_type = "pci";
2115                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2116                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2117                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2118                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2119                         /* Map all possible DDR as inbound ranges */
2120                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2121                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2122                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2123                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2124                         #interrupt-cells = <1>;
2125                         interrupt-map-mask = <0 0 0 0>;
2126                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2127                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2128                         clock-names = "pcie", "pcie_bus";
2129                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2130                         resets = <&cpg 319>;
2131                         status = "disabled";
2132                 };
2133
2134                 pciec1: pcie@ee800000 {
2135                         compatible = "renesas,pcie-r8a7796",
2136                                      "renesas,pcie-rcar-gen3";
2137                         reg = <0 0xee800000 0 0x80000>;
2138                         #address-cells = <3>;
2139                         #size-cells = <2>;
2140                         bus-range = <0x00 0xff>;
2141                         device_type = "pci";
2142                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2143                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2144                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2145                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2146                         /* Map all possible DDR as inbound ranges */
2147                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2148                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2149                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2150                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2151                         #interrupt-cells = <1>;
2152                         interrupt-map-mask = <0 0 0 0>;
2153                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2154                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2155                         clock-names = "pcie", "pcie_bus";
2156                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2157                         resets = <&cpg 318>;
2158                         status = "disabled";
2159                 };
2160
2161                 imr-lx4@fe860000 {
2162                         compatible = "renesas,r8a7796-imr-lx4",
2163                                      "renesas,imr-lx4";
2164                         reg = <0 0xfe860000 0 0x2000>;
2165                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2166                         clocks = <&cpg CPG_MOD 823>;
2167                         power-domains = <&sysc R8A7796_PD_A3VC>;
2168                         resets = <&cpg 823>;
2169                 };
2170
2171                 imr-lx4@fe870000 {
2172                         compatible = "renesas,r8a7796-imr-lx4",
2173                                      "renesas,imr-lx4";
2174                         reg = <0 0xfe870000 0 0x2000>;
2175                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2176                         clocks = <&cpg CPG_MOD 822>;
2177                         power-domains = <&sysc R8A7796_PD_A3VC>;
2178                         resets = <&cpg 822>;
2179                 };
2180
2181                 fdp1@fe940000 {
2182                         compatible = "renesas,fdp1";
2183                         reg = <0 0xfe940000 0 0x2400>;
2184                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2185                         clocks = <&cpg CPG_MOD 119>;
2186                         power-domains = <&sysc R8A7796_PD_A3VC>;
2187                         resets = <&cpg 119>;
2188                         renesas,fcp = <&fcpf0>;
2189                 };
2190
2191                 fcpf0: fcp@fe950000 {
2192                         compatible = "renesas,fcpf";
2193                         reg = <0 0xfe950000 0 0x200>;
2194                         clocks = <&cpg CPG_MOD 615>;
2195                         power-domains = <&sysc R8A7796_PD_A3VC>;
2196                         resets = <&cpg 615>;
2197                 };
2198
2199                 fcpvb0: fcp@fe96f000 {
2200                         compatible = "renesas,fcpv";
2201                         reg = <0 0xfe96f000 0 0x200>;
2202                         clocks = <&cpg CPG_MOD 607>;
2203                         power-domains = <&sysc R8A7796_PD_A3VC>;
2204                         resets = <&cpg 607>;
2205                 };
2206
2207                 fcpvi0: fcp@fe9af000 {
2208                         compatible = "renesas,fcpv";
2209                         reg = <0 0xfe9af000 0 0x200>;
2210                         clocks = <&cpg CPG_MOD 611>;
2211                         power-domains = <&sysc R8A7796_PD_A3VC>;
2212                         resets = <&cpg 611>;
2213                         iommus = <&ipmmu_vc0 19>;
2214                 };
2215
2216                 fcpvd0: fcp@fea27000 {
2217                         compatible = "renesas,fcpv";
2218                         reg = <0 0xfea27000 0 0x200>;
2219                         clocks = <&cpg CPG_MOD 603>;
2220                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2221                         resets = <&cpg 603>;
2222                         iommus = <&ipmmu_vi0 8>;
2223                 };
2224
2225                 fcpvd1: fcp@fea2f000 {
2226                         compatible = "renesas,fcpv";
2227                         reg = <0 0xfea2f000 0 0x200>;
2228                         clocks = <&cpg CPG_MOD 602>;
2229                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2230                         resets = <&cpg 602>;
2231                         iommus = <&ipmmu_vi0 9>;
2232                 };
2233
2234                 fcpvd2: fcp@fea37000 {
2235                         compatible = "renesas,fcpv";
2236                         reg = <0 0xfea37000 0 0x200>;
2237                         clocks = <&cpg CPG_MOD 601>;
2238                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2239                         resets = <&cpg 601>;
2240                         iommus = <&ipmmu_vi0 10>;
2241                 };
2242
2243                 vspb: vsp@fe960000 {
2244                         compatible = "renesas,vsp2";
2245                         reg = <0 0xfe960000 0 0x8000>;
2246                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2247                         clocks = <&cpg CPG_MOD 626>;
2248                         power-domains = <&sysc R8A7796_PD_A3VC>;
2249                         resets = <&cpg 626>;
2250
2251                         renesas,fcp = <&fcpvb0>;
2252                 };
2253
2254                 vspd0: vsp@fea20000 {
2255                         compatible = "renesas,vsp2";
2256                         reg = <0 0xfea20000 0 0x5000>;
2257                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2258                         clocks = <&cpg CPG_MOD 623>;
2259                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2260                         resets = <&cpg 623>;
2261
2262                         renesas,fcp = <&fcpvd0>;
2263                 };
2264
2265                 vspd1: vsp@fea28000 {
2266                         compatible = "renesas,vsp2";
2267                         reg = <0 0xfea28000 0 0x5000>;
2268                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2269                         clocks = <&cpg CPG_MOD 622>;
2270                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2271                         resets = <&cpg 622>;
2272
2273                         renesas,fcp = <&fcpvd1>;
2274                 };
2275
2276                 vspd2: vsp@fea30000 {
2277                         compatible = "renesas,vsp2";
2278                         reg = <0 0xfea30000 0 0x5000>;
2279                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2280                         clocks = <&cpg CPG_MOD 621>;
2281                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2282                         resets = <&cpg 621>;
2283
2284                         renesas,fcp = <&fcpvd2>;
2285                 };
2286
2287                 vspi0: vsp@fe9a0000 {
2288                         compatible = "renesas,vsp2";
2289                         reg = <0 0xfe9a0000 0 0x8000>;
2290                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2291                         clocks = <&cpg CPG_MOD 631>;
2292                         power-domains = <&sysc R8A7796_PD_A3VC>;
2293                         resets = <&cpg 631>;
2294
2295                         renesas,fcp = <&fcpvi0>;
2296                 };
2297
2298                 csi20: csi2@fea80000 {
2299                         compatible = "renesas,r8a7796-csi2";
2300                         reg = <0 0xfea80000 0 0x10000>;
2301                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2302                         clocks = <&cpg CPG_MOD 714>;
2303                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2304                         resets = <&cpg 714>;
2305                         status = "disabled";
2306
2307                         ports {
2308                                 #address-cells = <1>;
2309                                 #size-cells = <0>;
2310
2311                                 port@1 {
2312                                         #address-cells = <1>;
2313                                         #size-cells = <0>;
2314
2315                                         reg = <1>;
2316
2317                                         csi20vin0: endpoint@0 {
2318                                                 reg = <0>;
2319                                                 remote-endpoint = <&vin0csi20>;
2320                                         };
2321                                         csi20vin1: endpoint@1 {
2322                                                 reg = <1>;
2323                                                 remote-endpoint = <&vin1csi20>;
2324                                         };
2325                                         csi20vin2: endpoint@2 {
2326                                                 reg = <2>;
2327                                                 remote-endpoint = <&vin2csi20>;
2328                                         };
2329                                         csi20vin3: endpoint@3 {
2330                                                 reg = <3>;
2331                                                 remote-endpoint = <&vin3csi20>;
2332                                         };
2333                                         csi20vin4: endpoint@4 {
2334                                                 reg = <4>;
2335                                                 remote-endpoint = <&vin4csi20>;
2336                                         };
2337                                         csi20vin5: endpoint@5 {
2338                                                 reg = <5>;
2339                                                 remote-endpoint = <&vin5csi20>;
2340                                         };
2341                                         csi20vin6: endpoint@6 {
2342                                                 reg = <6>;
2343                                                 remote-endpoint = <&vin6csi20>;
2344                                         };
2345                                         csi20vin7: endpoint@7 {
2346                                                 reg = <7>;
2347                                                 remote-endpoint = <&vin7csi20>;
2348                                         };
2349                                 };
2350                         };
2351                 };
2352
2353                 csi40: csi2@feaa0000 {
2354                         compatible = "renesas,r8a7796-csi2";
2355                         reg = <0 0xfeaa0000 0 0x10000>;
2356                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2357                         clocks = <&cpg CPG_MOD 716>;
2358                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2359                         resets = <&cpg 716>;
2360                         status = "disabled";
2361
2362                         ports {
2363                                 #address-cells = <1>;
2364                                 #size-cells = <0>;
2365
2366                                 port@1 {
2367                                         #address-cells = <1>;
2368                                         #size-cells = <0>;
2369
2370                                         reg = <1>;
2371
2372                                         csi40vin0: endpoint@0 {
2373                                                 reg = <0>;
2374                                                 remote-endpoint = <&vin0csi40>;
2375                                         };
2376                                         csi40vin1: endpoint@1 {
2377                                                 reg = <1>;
2378                                                 remote-endpoint = <&vin1csi40>;
2379                                         };
2380                                         csi40vin2: endpoint@2 {
2381                                                 reg = <2>;
2382                                                 remote-endpoint = <&vin2csi40>;
2383                                         };
2384                                         csi40vin3: endpoint@3 {
2385                                                 reg = <3>;
2386                                                 remote-endpoint = <&vin3csi40>;
2387                                         };
2388                                         csi40vin4: endpoint@4 {
2389                                                 reg = <4>;
2390                                                 remote-endpoint = <&vin4csi40>;
2391                                         };
2392                                         csi40vin5: endpoint@5 {
2393                                                 reg = <5>;
2394                                                 remote-endpoint = <&vin5csi40>;
2395                                         };
2396                                         csi40vin6: endpoint@6 {
2397                                                 reg = <6>;
2398                                                 remote-endpoint = <&vin6csi40>;
2399                                         };
2400                                         csi40vin7: endpoint@7 {
2401                                                 reg = <7>;
2402                                                 remote-endpoint = <&vin7csi40>;
2403                                         };
2404                                 };
2405
2406                         };
2407                 };
2408
2409                 hdmi0: hdmi@fead0000 {
2410                         compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
2411                         reg = <0 0xfead0000 0 0x10000>;
2412                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2413                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2414                         clock-names = "iahb", "isfr";
2415                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2416                         resets = <&cpg 729>;
2417                         status = "disabled";
2418
2419                         ports {
2420                                 #address-cells = <1>;
2421                                 #size-cells = <0>;
2422                                 port@0 {
2423                                         reg = <0>;
2424                                         dw_hdmi0_in: endpoint {
2425                                                 remote-endpoint = <&du_out_hdmi0>;
2426                                         };
2427                                 };
2428                                 port@1 {
2429                                         reg = <1>;
2430                                 };
2431                                 port@2 {
2432                                         /* HDMI sound */
2433                                         reg = <2>;
2434                                 };
2435                         };
2436                 };
2437
2438                 du: display@feb00000 {
2439                         compatible = "renesas,du-r8a7796";
2440                         reg = <0 0xfeb00000 0 0x70000>,
2441                               <0 0xfeb90000 0 0x14>;
2442                         reg-names = "du", "lvds.0";
2443                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2444                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2445                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2446                         clocks = <&cpg CPG_MOD 724>,
2447                                  <&cpg CPG_MOD 723>,
2448                                  <&cpg CPG_MOD 722>,
2449                                  <&cpg CPG_MOD 727>;
2450                         clock-names = "du.0", "du.1", "du.2", "lvds.0";
2451                         status = "disabled";
2452
2453                         vsps = <&vspd0 &vspd1 &vspd2>;
2454
2455                         ports {
2456                                 #address-cells = <1>;
2457                                 #size-cells = <0>;
2458
2459                                 port@0 {
2460                                         reg = <0>;
2461                                         du_out_rgb: endpoint {
2462                                         };
2463                                 };
2464                                 port@1 {
2465                                         reg = <1>;
2466                                         du_out_hdmi0: endpoint {
2467                                                 remote-endpoint = <&dw_hdmi0_in>;
2468                                         };
2469                                 };
2470                                 port@2 {
2471                                         reg = <2>;
2472                                         du_out_lvds0: endpoint {
2473                                         };
2474                                 };
2475                         };
2476                 };
2477
2478                 prr: chipid@fff00044 {
2479                         compatible = "renesas,prr";
2480                         reg = <0 0xfff00044 0 4>;
2481                 };
2482         };
2483
2484         thermal-zones {
2485                 sensor_thermal1: sensor-thermal1 {
2486                         polling-delay-passive = <250>;
2487                         polling-delay = <1000>;
2488                         thermal-sensors = <&tsc 0>;
2489
2490                         trips {
2491                                 sensor1_passive: sensor1-passive {
2492                                         temperature = <95000>;
2493                                         hysteresis = <1000>;
2494                                         type = "passive";
2495                                 };
2496                                 sensor1_crit: sensor1-crit {
2497                                         temperature = <120000>;
2498                                         hysteresis = <1000>;
2499                                         type = "critical";
2500                                 };
2501                         };
2502
2503                         cooling-maps {
2504                                 map0 {
2505                                         trip = <&sensor1_passive>;
2506                                         cooling-device = <&a57_0 5 5>;
2507                                 };
2508                         };
2509                 };
2510
2511                 sensor_thermal2: sensor-thermal2 {
2512                         polling-delay-passive = <250>;
2513                         polling-delay = <1000>;
2514                         thermal-sensors = <&tsc 1>;
2515
2516                         trips {
2517                                 sensor2_passive: sensor2-passive {
2518                                         temperature = <95000>;
2519                                         hysteresis = <1000>;
2520                                         type = "passive";
2521                                 };
2522                                 sensor2_crit: sensor2-crit {
2523                                         temperature = <120000>;
2524                                         hysteresis = <1000>;
2525                                         type = "critical";
2526                                 };
2527                         };
2528
2529                         cooling-maps {
2530                                 map0 {
2531                                         trip = <&sensor2_passive>;
2532                                         cooling-device = <&a57_0 5 5>;
2533                                 };
2534                         };
2535                 };
2536
2537                 sensor_thermal3: sensor-thermal3 {
2538                         polling-delay-passive = <250>;
2539                         polling-delay = <1000>;
2540                         thermal-sensors = <&tsc 2>;
2541
2542                         trips {
2543                                 sensor3_passive: sensor3-passive {
2544                                         temperature = <95000>;
2545                                         hysteresis = <1000>;
2546                                         type = "passive";
2547                                 };
2548                                 sensor3_crit: sensor3-crit {
2549                                         temperature = <120000>;
2550                                         hysteresis = <1000>;
2551                                         type = "critical";
2552                                 };
2553                         };
2554
2555                         cooling-maps {
2556                                 map0 {
2557                                         trip = <&sensor3_passive>;
2558                                         cooling-device = <&a57_0 5 5>;
2559                                 };
2560                         };
2561                 };
2562         };
2563
2564         timer {
2565                 compatible = "arm,armv8-timer";
2566                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2567                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2568                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2569                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2570         };
2571
2572         /* External USB clocks - can be overridden by the board */
2573         usb3s0_clk: usb3s0 {
2574                 compatible = "fixed-clock";
2575                 #clock-cells = <0>;
2576                 clock-frequency = <0>;
2577         };
2578
2579         usb_extal_clk: usb_extal {
2580                 compatible = "fixed-clock";
2581                 #clock-cells = <0>;
2582                 clock-frequency = <0>;
2583         };
2584 };