arch/arm/dts/r8a77951.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car H3 (R8A77951) SoC
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7795-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7795_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         /*
  31          * The external audio clocks are configured as 0 Hz fixed frequency
  32          * clocks by default.
  33          * Boards that provide audio clocks should override them.
  34          */
  35         audio_clk_a: audio_clk_a {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         audio_clk_b: audio_clk_b {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         audio_clk_c: audio_clk_c {
  48                 compatible = "fixed-clock";
  49                 #clock-cells = <0>;
  50                 clock-frequency = <0>;
  51         };
  52
  53         /* External CAN clock - to be overridden by boards that provide it */
  54         can_clk: can {
  55                 compatible = "fixed-clock";
  56                 #clock-cells = <0>;
  57                 clock-frequency = <0>;
  58         };
  59
  60         cluster0_opp: opp_table0 {
  61                 compatible = "operating-points-v2";
  62                 opp-shared;
  63
  64                 opp-500000000 {
  65                         opp-hz = /bits/ 64 <500000000>;
  66                         opp-microvolt = <830000>;
  67                         clock-latency-ns = <300000>;
  68                 };
  69                 opp-1000000000 {
  70                         opp-hz = /bits/ 64 <1000000000>;
  71                         opp-microvolt = <830000>;
  72                         clock-latency-ns = <300000>;
  73                 };
  74                 opp-1500000000 {
  75                         opp-hz = /bits/ 64 <1500000000>;
  76                         opp-microvolt = <830000>;
  77                         clock-latency-ns = <300000>;
  78                         opp-suspend;
  79                 };
  80                 opp-1600000000 {
  81                         opp-hz = /bits/ 64 <1600000000>;
  82                         opp-microvolt = <900000>;
  83                         clock-latency-ns = <300000>;
  84                         turbo-mode;
  85                 };
  86                 opp-1700000000 {
  87                         opp-hz = /bits/ 64 <1700000000>;
  88                         opp-microvolt = <960000>;
  89                         clock-latency-ns = <300000>;
  90                         turbo-mode;
  91                 };
  92         };
  93
  94         cluster1_opp: opp_table1 {
  95                 compatible = "operating-points-v2";
  96                 opp-shared;
  97
  98                 opp-800000000 {
  99                         opp-hz = /bits/ 64 <800000000>;
 100                         opp-microvolt = <820000>;
 101                         clock-latency-ns = <300000>;
 102                 };
 103                 opp-1000000000 {
 104                         opp-hz = /bits/ 64 <1000000000>;
 105                         opp-microvolt = <820000>;
 106                         clock-latency-ns = <300000>;
 107                 };
 108                 opp-1200000000 {
 109                         opp-hz = /bits/ 64 <1200000000>;
 110                         opp-microvolt = <820000>;
 111                         clock-latency-ns = <300000>;
 112                 };
 113         };
 114
 115         cpus {
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118
 119                 cpu-map {
 120                         cluster0 {
 121                                 core0 {
 122                                         cpu = <&a57_0>;
 123                                 };
 124                                 core1 {
 125                                         cpu = <&a57_1>;
 126                                 };
 127                                 core2 {
 128                                         cpu = <&a57_2>;
 129                                 };
 130                                 core3 {
 131                                         cpu = <&a57_3>;
 132                                 };
 133                         };
 134
 135                         cluster1 {
 136                                 core0 {
 137                                         cpu = <&a53_0>;
 138                                 };
 139                                 core1 {
 140                                         cpu = <&a53_1>;
 141                                 };
 142                                 core2 {
 143                                         cpu = <&a53_2>;
 144                                 };
 145                                 core3 {
 146                                         cpu = <&a53_3>;
 147                                 };
 148                         };
 149                 };
 150
 151                 a57_0: cpu@0 {
 152                         compatible = "arm,cortex-a57";
 153                         reg = <0x0>;
 154                         device_type = "cpu";
 155                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
 156                         next-level-cache = <&L2_CA57>;
 157                         enable-method = "psci";
 158                         cpu-idle-states = <&CPU_SLEEP_0>;
 159                         dynamic-power-coefficient = <854>;
 160                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 161                         operating-points-v2 = <&cluster0_opp>;
 162                         capacity-dmips-mhz = <1024>;
 163                         #cooling-cells = <2>;
 164                 };
 165
 166                 a57_1: cpu@1 {
 167                         compatible = "arm,cortex-a57";
 168                         reg = <0x1>;
 169                         device_type = "cpu";
 170                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
 171                         next-level-cache = <&L2_CA57>;
 172                         enable-method = "psci";
 173                         cpu-idle-states = <&CPU_SLEEP_0>;
 174                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 175                         operating-points-v2 = <&cluster0_opp>;
 176                         capacity-dmips-mhz = <1024>;
 177                         #cooling-cells = <2>;
 178                 };
 179
 180                 a57_2: cpu@2 {
 181                         compatible = "arm,cortex-a57";
 182                         reg = <0x2>;
 183                         device_type = "cpu";
 184                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
 185                         next-level-cache = <&L2_CA57>;
 186                         enable-method = "psci";
 187                         cpu-idle-states = <&CPU_SLEEP_0>;
 188                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 189                         operating-points-v2 = <&cluster0_opp>;
 190                         capacity-dmips-mhz = <1024>;
 191                         #cooling-cells = <2>;
 192                 };
 193
 194                 a57_3: cpu@3 {
 195                         compatible = "arm,cortex-a57";
 196                         reg = <0x3>;
 197                         device_type = "cpu";
 198                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
 199                         next-level-cache = <&L2_CA57>;
 200                         enable-method = "psci";
 201                         cpu-idle-states = <&CPU_SLEEP_0>;
 202                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 203                         operating-points-v2 = <&cluster0_opp>;
 204                         capacity-dmips-mhz = <1024>;
 205                         #cooling-cells = <2>;
 206                 };
 207
 208                 a53_0: cpu@100 {
 209                         compatible = "arm,cortex-a53";
 210                         reg = <0x100>;
 211                         device_type = "cpu";
 212                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
 213                         next-level-cache = <&L2_CA53>;
 214                         enable-method = "psci";
 215                         cpu-idle-states = <&CPU_SLEEP_1>;
 216                         #cooling-cells = <2>;
 217                         dynamic-power-coefficient = <277>;
 218                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 219                         operating-points-v2 = <&cluster1_opp>;
 220                         capacity-dmips-mhz = <535>;
 221                 };
 222
 223                 a53_1: cpu@101 {
 224                         compatible = "arm,cortex-a53";
 225                         reg = <0x101>;
 226                         device_type = "cpu";
 227                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
 228                         next-level-cache = <&L2_CA53>;
 229                         enable-method = "psci";
 230                         cpu-idle-states = <&CPU_SLEEP_1>;
 231                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 232                         operating-points-v2 = <&cluster1_opp>;
 233                         capacity-dmips-mhz = <535>;
 234                 };
 235
 236                 a53_2: cpu@102 {
 237                         compatible = "arm,cortex-a53";
 238                         reg = <0x102>;
 239                         device_type = "cpu";
 240                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
 241                         next-level-cache = <&L2_CA53>;
 242                         enable-method = "psci";
 243                         cpu-idle-states = <&CPU_SLEEP_1>;
 244                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 245                         operating-points-v2 = <&cluster1_opp>;
 246                         capacity-dmips-mhz = <535>;
 247                 };
 248
 249                 a53_3: cpu@103 {
 250                         compatible = "arm,cortex-a53";
 251                         reg = <0x103>;
 252                         device_type = "cpu";
 253                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 254                         next-level-cache = <&L2_CA53>;
 255                         enable-method = "psci";
 256                         cpu-idle-states = <&CPU_SLEEP_1>;
 257                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 258                         operating-points-v2 = <&cluster1_opp>;
 259                         capacity-dmips-mhz = <535>;
 260                 };
 261
 262                 L2_CA57: cache-controller-0 {
 263                         compatible = "cache";
 264                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 265                         cache-unified;
 266                         cache-level = <2>;
 267                 };
 268
 269                 L2_CA53: cache-controller-1 {
 270                         compatible = "cache";
 271                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 272                         cache-unified;
 273                         cache-level = <2>;
 274                 };
 275
 276                 idle-states {
 277                         entry-method = "psci";
 278
 279                         CPU_SLEEP_0: cpu-sleep-0 {
 280                                 compatible = "arm,idle-state";
 281                                 arm,psci-suspend-param = <0x0010000>;
 282                                 local-timer-stop;
 283                                 entry-latency-us = <400>;
 284                                 exit-latency-us = <500>;
 285                                 min-residency-us = <4000>;
 286                         };
 287
 288                         CPU_SLEEP_1: cpu-sleep-1 {
 289                                 compatible = "arm,idle-state";
 290                                 arm,psci-suspend-param = <0x0010000>;
 291                                 local-timer-stop;
 292                                 entry-latency-us = <700>;
 293                                 exit-latency-us = <700>;
 294                                 min-residency-us = <5000>;
 295                         };
 296                 };
 297         };
 298
 299         extal_clk: extal {
 300                 compatible = "fixed-clock";
 301                 #clock-cells = <0>;
 302                 /* This value must be overridden by the board */
 303                 clock-frequency = <0>;
 304         };
 305
 306         extalr_clk: extalr {
 307                 compatible = "fixed-clock";
 308                 #clock-cells = <0>;
 309                 /* This value must be overridden by the board */
 310                 clock-frequency = <0>;
 311         };
 312
 313         /* External PCIe clock - can be overridden by the board */
 314         pcie_bus_clk: pcie_bus {
 315                 compatible = "fixed-clock";
 316                 #clock-cells = <0>;
 317                 clock-frequency = <0>;
 318         };
 319
 320         pmu_a53 {
 321                 compatible = "arm,cortex-a53-pmu";
 322                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 323                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 324                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 325                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 326                 interrupt-affinity = <&a53_0>,
 327                                      <&a53_1>,
 328                                      <&a53_2>,
 329                                      <&a53_3>;
 330         };
 331
 332         pmu_a57 {
 333                 compatible = "arm,cortex-a57-pmu";
 334                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 335                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 336                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 337                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 338                 interrupt-affinity = <&a57_0>,
 339                                      <&a57_1>,
 340                                      <&a57_2>,
 341                                      <&a57_3>;
 342         };
 343
 344         psci {
 345                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 346                 method = "smc";
 347         };
 348
 349         /* External SCIF clock - to be overridden by boards that provide it */
 350         scif_clk: scif {
 351                 compatible = "fixed-clock";
 352                 #clock-cells = <0>;
 353                 clock-frequency = <0>;
 354         };
 355
 356         soc: soc {
 357                 compatible = "simple-bus";
 358                 interrupt-parent = <&gic>;
 359
 360                 #address-cells = <2>;
 361                 #size-cells = <2>;
 362                 ranges;
 363
 364                 rwdt: watchdog@e6020000 {
 365                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 366                         reg = <0 0xe6020000 0 0x0c>;
 367                         clocks = <&cpg CPG_MOD 402>;
 368                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 369                         resets = <&cpg 402>;
 370                         status = "disabled";
 371                 };
 372
 373                 gpio0: gpio@e6050000 {
 374                         compatible = "renesas,gpio-r8a7795",
 375                                      "renesas,rcar-gen3-gpio";
 376                         reg = <0 0xe6050000 0 0x50>;
 377                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 378                         #gpio-cells = <2>;
 379                         gpio-controller;
 380                         gpio-ranges = <&pfc 0 0 16>;
 381                         #interrupt-cells = <2>;
 382                         interrupt-controller;
 383                         clocks = <&cpg CPG_MOD 912>;
 384                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 385                         resets = <&cpg 912>;
 386                 };
 387
 388                 gpio1: gpio@e6051000 {
 389                         compatible = "renesas,gpio-r8a7795",
 390                                      "renesas,rcar-gen3-gpio";
 391                         reg = <0 0xe6051000 0 0x50>;
 392                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 393                         #gpio-cells = <2>;
 394                         gpio-controller;
 395                         gpio-ranges = <&pfc 0 32 29>;
 396                         #interrupt-cells = <2>;
 397                         interrupt-controller;
 398                         clocks = <&cpg CPG_MOD 911>;
 399                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 400                         resets = <&cpg 911>;
 401                 };
 402
 403                 gpio2: gpio@e6052000 {
 404                         compatible = "renesas,gpio-r8a7795",
 405                                      "renesas,rcar-gen3-gpio";
 406                         reg = <0 0xe6052000 0 0x50>;
 407                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 408                         #gpio-cells = <2>;
 409                         gpio-controller;
 410                         gpio-ranges = <&pfc 0 64 15>;
 411                         #interrupt-cells = <2>;
 412                         interrupt-controller;
 413                         clocks = <&cpg CPG_MOD 910>;
 414                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 415                         resets = <&cpg 910>;
 416                 };
 417
 418                 gpio3: gpio@e6053000 {
 419                         compatible = "renesas,gpio-r8a7795",
 420                                      "renesas,rcar-gen3-gpio";
 421                         reg = <0 0xe6053000 0 0x50>;
 422                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 423                         #gpio-cells = <2>;
 424                         gpio-controller;
 425                         gpio-ranges = <&pfc 0 96 16>;
 426                         #interrupt-cells = <2>;
 427                         interrupt-controller;
 428                         clocks = <&cpg CPG_MOD 909>;
 429                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 430                         resets = <&cpg 909>;
 431                 };
 432
 433                 gpio4: gpio@e6054000 {
 434                         compatible = "renesas,gpio-r8a7795",
 435                                      "renesas,rcar-gen3-gpio";
 436                         reg = <0 0xe6054000 0 0x50>;
 437                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 438                         #gpio-cells = <2>;
 439                         gpio-controller;
 440                         gpio-ranges = <&pfc 0 128 18>;
 441                         #interrupt-cells = <2>;
 442                         interrupt-controller;
 443                         clocks = <&cpg CPG_MOD 908>;
 444                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 445                         resets = <&cpg 908>;
 446                 };
 447
 448                 gpio5: gpio@e6055000 {
 449                         compatible = "renesas,gpio-r8a7795",
 450                                      "renesas,rcar-gen3-gpio";
 451                         reg = <0 0xe6055000 0 0x50>;
 452                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 453                         #gpio-cells = <2>;
 454                         gpio-controller;
 455                         gpio-ranges = <&pfc 0 160 26>;
 456                         #interrupt-cells = <2>;
 457                         interrupt-controller;
 458                         clocks = <&cpg CPG_MOD 907>;
 459                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 460                         resets = <&cpg 907>;
 461                 };
 462
 463                 gpio6: gpio@e6055400 {
 464                         compatible = "renesas,gpio-r8a7795",
 465                                      "renesas,rcar-gen3-gpio";
 466                         reg = <0 0xe6055400 0 0x50>;
 467                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 468                         #gpio-cells = <2>;
 469                         gpio-controller;
 470                         gpio-ranges = <&pfc 0 192 32>;
 471                         #interrupt-cells = <2>;
 472                         interrupt-controller;
 473                         clocks = <&cpg CPG_MOD 906>;
 474                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 475                         resets = <&cpg 906>;
 476                 };
 477
 478                 gpio7: gpio@e6055800 {
 479                         compatible = "renesas,gpio-r8a7795",
 480                                      "renesas,rcar-gen3-gpio";
 481                         reg = <0 0xe6055800 0 0x50>;
 482                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 483                         #gpio-cells = <2>;
 484                         gpio-controller;
 485                         gpio-ranges = <&pfc 0 224 4>;
 486                         #interrupt-cells = <2>;
 487                         interrupt-controller;
 488                         clocks = <&cpg CPG_MOD 905>;
 489                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 490                         resets = <&cpg 905>;
 491                 };
 492
 493                 pfc: pin-controller@e6060000 {
 494                         compatible = "renesas,pfc-r8a7795";
 495                         reg = <0 0xe6060000 0 0x50c>;
 496                 };
 497
 498                 cmt0: timer@e60f0000 {
 499                         compatible = "renesas,r8a7795-cmt0",
 500                                      "renesas,rcar-gen3-cmt0";
 501                         reg = <0 0xe60f0000 0 0x1004>;
 502                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 503                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 504                         clocks = <&cpg CPG_MOD 303>;
 505                         clock-names = "fck";
 506                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 507                         resets = <&cpg 303>;
 508                         status = "disabled";
 509                 };
 510
 511                 cmt1: timer@e6130000 {
 512                         compatible = "renesas,r8a7795-cmt1",
 513                                      "renesas,rcar-gen3-cmt1";
 514                         reg = <0 0xe6130000 0 0x1004>;
 515                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 517                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 518                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 519                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 520                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 521                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 522                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 523                         clocks = <&cpg CPG_MOD 302>;
 524                         clock-names = "fck";
 525                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 526                         resets = <&cpg 302>;
 527                         status = "disabled";
 528                 };
 529
 530                 cmt2: timer@e6140000 {
 531                         compatible = "renesas,r8a7795-cmt1",
 532                                      "renesas,rcar-gen3-cmt1";
 533                         reg = <0 0xe6140000 0 0x1004>;
 534                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 535                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 536                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 537                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 538                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 539                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 540                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 541                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 542                         clocks = <&cpg CPG_MOD 301>;
 543                         clock-names = "fck";
 544                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 545                         resets = <&cpg 301>;
 546                         status = "disabled";
 547                 };
 548
 549                 cmt3: timer@e6148000 {
 550                         compatible = "renesas,r8a7795-cmt1",
 551                                      "renesas,rcar-gen3-cmt1";
 552                         reg = <0 0xe6148000 0 0x1004>;
 553                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 554                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 555                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 556                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 557                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 558                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 559                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 560                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 561                         clocks = <&cpg CPG_MOD 300>;
 562                         clock-names = "fck";
 563                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 564                         resets = <&cpg 300>;
 565                         status = "disabled";
 566                 };
 567
 568                 cpg: clock-controller@e6150000 {
 569                         compatible = "renesas,r8a7795-cpg-mssr";
 570                         reg = <0 0xe6150000 0 0x1000>;
 571                         clocks = <&extal_clk>, <&extalr_clk>;
 572                         clock-names = "extal", "extalr";
 573                         #clock-cells = <2>;
 574                         #power-domain-cells = <0>;
 575                         #reset-cells = <1>;
 576                 };
 577
 578                 rst: reset-controller@e6160000 {
 579                         compatible = "renesas,r8a7795-rst";
 580                         reg = <0 0xe6160000 0 0x0200>;
 581                 };
 582
 583                 sysc: system-controller@e6180000 {
 584                         compatible = "renesas,r8a7795-sysc";
 585                         reg = <0 0xe6180000 0 0x0400>;
 586                         #power-domain-cells = <1>;
 587                 };
 588
 589                 tsc: thermal@e6198000 {
 590                         compatible = "renesas,r8a7795-thermal";
 591                         reg = <0 0xe6198000 0 0x100>,
 592                               <0 0xe61a0000 0 0x100>,
 593                               <0 0xe61a8000 0 0x100>;
 594                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 595                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 597                         clocks = <&cpg CPG_MOD 522>;
 598                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 599                         resets = <&cpg 522>;
 600                         #thermal-sensor-cells = <1>;
 601                 };
 602
 603                 intc_ex: interrupt-controller@e61c0000 {
 604                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 605                         #interrupt-cells = <2>;
 606                         interrupt-controller;
 607                         reg = <0 0xe61c0000 0 0x200>;
 608                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 614                         clocks = <&cpg CPG_MOD 407>;
 615                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 616                         resets = <&cpg 407>;
 617                 };
 618
 619                 i2c0: i2c@e6500000 {
 620                         #address-cells = <1>;
 621                         #size-cells = <0>;
 622                         compatible = "renesas,i2c-r8a7795",
 623                                      "renesas,rcar-gen3-i2c";
 624                         reg = <0 0xe6500000 0 0x40>;
 625                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 626                         clocks = <&cpg CPG_MOD 931>;
 627                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 628                         resets = <&cpg 931>;
 629                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 630                                <&dmac2 0x91>, <&dmac2 0x90>;
 631                         dma-names = "tx", "rx", "tx", "rx";
 632                         i2c-scl-internal-delay-ns = <110>;
 633                         status = "disabled";
 634                 };
 635
 636                 i2c1: i2c@e6508000 {
 637                         #address-cells = <1>;
 638                         #size-cells = <0>;
 639                         compatible = "renesas,i2c-r8a7795",
 640                                      "renesas,rcar-gen3-i2c";
 641                         reg = <0 0xe6508000 0 0x40>;
 642                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 643                         clocks = <&cpg CPG_MOD 930>;
 644                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 645                         resets = <&cpg 930>;
 646                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 647                                <&dmac2 0x93>, <&dmac2 0x92>;
 648                         dma-names = "tx", "rx", "tx", "rx";
 649                         i2c-scl-internal-delay-ns = <6>;
 650                         status = "disabled";
 651                 };
 652
 653                 i2c2: i2c@e6510000 {
 654                         #address-cells = <1>;
 655                         #size-cells = <0>;
 656                         compatible = "renesas,i2c-r8a7795",
 657                                      "renesas,rcar-gen3-i2c";
 658                         reg = <0 0xe6510000 0 0x40>;
 659                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 660                         clocks = <&cpg CPG_MOD 929>;
 661                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 662                         resets = <&cpg 929>;
 663                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 664                                <&dmac2 0x95>, <&dmac2 0x94>;
 665                         dma-names = "tx", "rx", "tx", "rx";
 666                         i2c-scl-internal-delay-ns = <6>;
 667                         status = "disabled";
 668                 };
 669
 670                 i2c3: i2c@e66d0000 {
 671                         #address-cells = <1>;
 672                         #size-cells = <0>;
 673                         compatible = "renesas,i2c-r8a7795",
 674                                      "renesas,rcar-gen3-i2c";
 675                         reg = <0 0xe66d0000 0 0x40>;
 676                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 677                         clocks = <&cpg CPG_MOD 928>;
 678                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 679                         resets = <&cpg 928>;
 680                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 681                         dma-names = "tx", "rx";
 682                         i2c-scl-internal-delay-ns = <110>;
 683                         status = "disabled";
 684                 };
 685
 686                 i2c4: i2c@e66d8000 {
 687                         #address-cells = <1>;
 688                         #size-cells = <0>;
 689                         compatible = "renesas,i2c-r8a7795",
 690                                      "renesas,rcar-gen3-i2c";
 691                         reg = <0 0xe66d8000 0 0x40>;
 692                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 693                         clocks = <&cpg CPG_MOD 927>;
 694                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 695                         resets = <&cpg 927>;
 696                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 697                         dma-names = "tx", "rx";
 698                         i2c-scl-internal-delay-ns = <110>;
 699                         status = "disabled";
 700                 };
 701
 702                 i2c5: i2c@e66e0000 {
 703                         #address-cells = <1>;
 704                         #size-cells = <0>;
 705                         compatible = "renesas,i2c-r8a7795",
 706                                      "renesas,rcar-gen3-i2c";
 707                         reg = <0 0xe66e0000 0 0x40>;
 708                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 709                         clocks = <&cpg CPG_MOD 919>;
 710                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 711                         resets = <&cpg 919>;
 712                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 713                         dma-names = "tx", "rx";
 714                         i2c-scl-internal-delay-ns = <110>;
 715                         status = "disabled";
 716                 };
 717
 718                 i2c6: i2c@e66e8000 {
 719                         #address-cells = <1>;
 720                         #size-cells = <0>;
 721                         compatible = "renesas,i2c-r8a7795",
 722                                      "renesas,rcar-gen3-i2c";
 723                         reg = <0 0xe66e8000 0 0x40>;
 724                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 725                         clocks = <&cpg CPG_MOD 918>;
 726                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 727                         resets = <&cpg 918>;
 728                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 729                         dma-names = "tx", "rx";
 730                         i2c-scl-internal-delay-ns = <6>;
 731                         status = "disabled";
 732                 };
 733
 734                 i2c_dvfs: i2c@e60b0000 {
 735                         #address-cells = <1>;
 736                         #size-cells = <0>;
 737                         compatible = "renesas,iic-r8a7795",
 738                                      "renesas,rcar-gen3-iic",
 739                                      "renesas,rmobile-iic";
 740                         reg = <0 0xe60b0000 0 0x425>;
 741                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 742                         clocks = <&cpg CPG_MOD 926>;
 743                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 744                         resets = <&cpg 926>;
 745                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 746                         dma-names = "tx", "rx";
 747                         status = "disabled";
 748                 };
 749
 750                 hscif0: serial@e6540000 {
 751                         compatible = "renesas,hscif-r8a7795",
 752                                      "renesas,rcar-gen3-hscif",
 753                                      "renesas,hscif";
 754                         reg = <0 0xe6540000 0 96>;
 755                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 756                         clocks = <&cpg CPG_MOD 520>,
 757                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 758                                  <&scif_clk>;
 759                         clock-names = "fck", "brg_int", "scif_clk";
 760                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 761                                <&dmac2 0x31>, <&dmac2 0x30>;
 762                         dma-names = "tx", "rx", "tx", "rx";
 763                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 764                         resets = <&cpg 520>;
 765                         status = "disabled";
 766                 };
 767
 768                 hscif1: serial@e6550000 {
 769                         compatible = "renesas,hscif-r8a7795",
 770                                      "renesas,rcar-gen3-hscif",
 771                                      "renesas,hscif";
 772                         reg = <0 0xe6550000 0 96>;
 773                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 774                         clocks = <&cpg CPG_MOD 519>,
 775                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 776                                  <&scif_clk>;
 777                         clock-names = "fck", "brg_int", "scif_clk";
 778                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 779                                <&dmac2 0x33>, <&dmac2 0x32>;
 780                         dma-names = "tx", "rx", "tx", "rx";
 781                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 782                         resets = <&cpg 519>;
 783                         status = "disabled";
 784                 };
 785
 786                 hscif2: serial@e6560000 {
 787                         compatible = "renesas,hscif-r8a7795",
 788                                      "renesas,rcar-gen3-hscif",
 789                                      "renesas,hscif";
 790                         reg = <0 0xe6560000 0 96>;
 791                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 792                         clocks = <&cpg CPG_MOD 518>,
 793                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 794                                  <&scif_clk>;
 795                         clock-names = "fck", "brg_int", "scif_clk";
 796                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 797                                <&dmac2 0x35>, <&dmac2 0x34>;
 798                         dma-names = "tx", "rx", "tx", "rx";
 799                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 800                         resets = <&cpg 518>;
 801                         status = "disabled";
 802                 };
 803
 804                 hscif3: serial@e66a0000 {
 805                         compatible = "renesas,hscif-r8a7795",
 806                                      "renesas,rcar-gen3-hscif",
 807                                      "renesas,hscif";
 808                         reg = <0 0xe66a0000 0 96>;
 809                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 810                         clocks = <&cpg CPG_MOD 517>,
 811                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 812                                  <&scif_clk>;
 813                         clock-names = "fck", "brg_int", "scif_clk";
 814                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 815                         dma-names = "tx", "rx";
 816                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 817                         resets = <&cpg 517>;
 818                         status = "disabled";
 819                 };
 820
 821                 hscif4: serial@e66b0000 {
 822                         compatible = "renesas,hscif-r8a7795",
 823                                      "renesas,rcar-gen3-hscif",
 824                                      "renesas,hscif";
 825                         reg = <0 0xe66b0000 0 96>;
 826                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 827                         clocks = <&cpg CPG_MOD 516>,
 828                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 829                                  <&scif_clk>;
 830                         clock-names = "fck", "brg_int", "scif_clk";
 831                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 832                         dma-names = "tx", "rx";
 833                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 834                         resets = <&cpg 516>;
 835                         status = "disabled";
 836                 };
 837
 838                 hsusb: usb@e6590000 {
 839                         compatible = "renesas,usbhs-r8a7795",
 840                                      "renesas,rcar-gen3-usbhs";
 841                         reg = <0 0xe6590000 0 0x200>;
 842                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 843                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 844                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 845                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 846                         dma-names = "ch0", "ch1", "ch2", "ch3";
 847                         renesas,buswait = <11>;
 848                         phys = <&usb2_phy0 3>;
 849                         phy-names = "usb";
 850                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 851                         resets = <&cpg 704>, <&cpg 703>;
 852                         status = "disabled";
 853                 };
 854
 855                 hsusb3: usb@e659c000 {
 856                         compatible = "renesas,usbhs-r8a7795",
 857                                      "renesas,rcar-gen3-usbhs";
 858                         reg = <0 0xe659c000 0 0x200>;
 859                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 860                         clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
 861                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
 862                                <&usb_dmac3 0>, <&usb_dmac3 1>;
 863                         dma-names = "ch0", "ch1", "ch2", "ch3";
 864                         renesas,buswait = <11>;
 865                         phys = <&usb2_phy3 3>;
 866                         phy-names = "usb";
 867                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 868                         resets = <&cpg 705>, <&cpg 700>;
 869                         status = "disabled";
 870                 };
 871
 872                 usb_dmac0: dma-controller@e65a0000 {
 873                         compatible = "renesas,r8a7795-usb-dmac",
 874                                      "renesas,usb-dmac";
 875                         reg = <0 0xe65a0000 0 0x100>;
 876                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 877                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 878                         interrupt-names = "ch0", "ch1";
 879                         clocks = <&cpg CPG_MOD 330>;
 880                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 881                         resets = <&cpg 330>;
 882                         #dma-cells = <1>;
 883                         dma-channels = <2>;
 884                 };
 885
 886                 usb_dmac1: dma-controller@e65b0000 {
 887                         compatible = "renesas,r8a7795-usb-dmac",
 888                                      "renesas,usb-dmac";
 889                         reg = <0 0xe65b0000 0 0x100>;
 890                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 891                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 892                         interrupt-names = "ch0", "ch1";
 893                         clocks = <&cpg CPG_MOD 331>;
 894                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 895                         resets = <&cpg 331>;
 896                         #dma-cells = <1>;
 897                         dma-channels = <2>;
 898                 };
 899
 900                 usb_dmac2: dma-controller@e6460000 {
 901                         compatible = "renesas,r8a7795-usb-dmac",
 902                                      "renesas,usb-dmac";
 903                         reg = <0 0xe6460000 0 0x100>;
 904                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
 905                                      <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 906                         interrupt-names = "ch0", "ch1";
 907                         clocks = <&cpg CPG_MOD 326>;
 908                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 909                         resets = <&cpg 326>;
 910                         #dma-cells = <1>;
 911                         dma-channels = <2>;
 912                 };
 913
 914                 usb_dmac3: dma-controller@e6470000 {
 915                         compatible = "renesas,r8a7795-usb-dmac",
 916                                      "renesas,usb-dmac";
 917                         reg = <0 0xe6470000 0 0x100>;
 918                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
 919                                      <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 920                         interrupt-names = "ch0", "ch1";
 921                         clocks = <&cpg CPG_MOD 329>;
 922                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 923                         resets = <&cpg 329>;
 924                         #dma-cells = <1>;
 925                         dma-channels = <2>;
 926                 };
 927
 928                 usb3_phy0: usb-phy@e65ee000 {
 929                         compatible = "renesas,r8a7795-usb3-phy",
 930                                      "renesas,rcar-gen3-usb3-phy";
 931                         reg = <0 0xe65ee000 0 0x90>;
 932                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 933                                  <&usb_extal_clk>;
 934                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 935                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 936                         resets = <&cpg 328>;
 937                         #phy-cells = <0>;
 938                         status = "disabled";
 939                 };
 940
 941                 arm_cc630p: crypto@e6601000 {
 942                         compatible = "arm,cryptocell-630p-ree";
 943                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 944                         reg = <0x0 0xe6601000 0 0x1000>;
 945                         clocks = <&cpg CPG_MOD 229>;
 946                         resets = <&cpg 229>;
 947                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 948                 };
 949
 950                 dmac0: dma-controller@e6700000 {
 951                         compatible = "renesas,dmac-r8a7795",
 952                                      "renesas,rcar-dmac";
 953                         reg = <0 0xe6700000 0 0x10000>;
 954                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 955                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 956                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 957                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 958                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 959                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 960                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 961                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 962                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 963                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 964                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 965                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 966                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 967                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 968                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 970                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 971                         interrupt-names = "error",
 972                                         "ch0", "ch1", "ch2", "ch3",
 973                                         "ch4", "ch5", "ch6", "ch7",
 974                                         "ch8", "ch9", "ch10", "ch11",
 975                                         "ch12", "ch13", "ch14", "ch15";
 976                         clocks = <&cpg CPG_MOD 219>;
 977                         clock-names = "fck";
 978                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 979                         resets = <&cpg 219>;
 980                         #dma-cells = <1>;
 981                         dma-channels = <16>;
 982                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 983                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 984                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 985                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 986                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 987                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 988                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 989                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 990                 };
 991
 992                 dmac1: dma-controller@e7300000 {
 993                         compatible = "renesas,dmac-r8a7795",
 994                                      "renesas,rcar-dmac";
 995                         reg = <0 0xe7300000 0 0x10000>;
 996                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 997                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 998                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 999                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1000                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1001                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1002                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1003                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1004                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1005                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1006                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1007                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1008                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1009                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1010                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1011                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1012                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1013                         interrupt-names = "error",
1014                                         "ch0", "ch1", "ch2", "ch3",
1015                                         "ch4", "ch5", "ch6", "ch7",
1016                                         "ch8", "ch9", "ch10", "ch11",
1017                                         "ch12", "ch13", "ch14", "ch15";
1018                         clocks = <&cpg CPG_MOD 218>;
1019                         clock-names = "fck";
1020                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1021                         resets = <&cpg 218>;
1022                         #dma-cells = <1>;
1023                         dma-channels = <16>;
1024                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1025                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1026                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1027                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1028                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1029                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1030                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1031                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1032                 };
1033
1034                 dmac2: dma-controller@e7310000 {
1035                         compatible = "renesas,dmac-r8a7795",
1036                                      "renesas,rcar-dmac";
1037                         reg = <0 0xe7310000 0 0x10000>;
1038                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1039                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1040                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1041                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1042                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1043                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1044                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1045                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1046                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1047                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1048                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1049                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1050                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1051                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1052                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1053                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1054                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1055                         interrupt-names = "error",
1056                                         "ch0", "ch1", "ch2", "ch3",
1057                                         "ch4", "ch5", "ch6", "ch7",
1058                                         "ch8", "ch9", "ch10", "ch11",
1059                                         "ch12", "ch13", "ch14", "ch15";
1060                         clocks = <&cpg CPG_MOD 217>;
1061                         clock-names = "fck";
1062                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1063                         resets = <&cpg 217>;
1064                         #dma-cells = <1>;
1065                         dma-channels = <16>;
1066                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1067                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1068                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1069                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1070                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1071                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1072                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1073                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1074                 };
1075
1076                 ipmmu_ds0: mmu@e6740000 {
1077                         compatible = "renesas,ipmmu-r8a7795";
1078                         reg = <0 0xe6740000 0 0x1000>;
1079                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1080                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1081                         #iommu-cells = <1>;
1082                 };
1083
1084                 ipmmu_ds1: mmu@e7740000 {
1085                         compatible = "renesas,ipmmu-r8a7795";
1086                         reg = <0 0xe7740000 0 0x1000>;
1087                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1088                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1089                         #iommu-cells = <1>;
1090                 };
1091
1092                 ipmmu_hc: mmu@e6570000 {
1093                         compatible = "renesas,ipmmu-r8a7795";
1094                         reg = <0 0xe6570000 0 0x1000>;
1095                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1096                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1097                         #iommu-cells = <1>;
1098                 };
1099
1100                 ipmmu_ir: mmu@ff8b0000 {
1101                         compatible = "renesas,ipmmu-r8a7795";
1102                         reg = <0 0xff8b0000 0 0x1000>;
1103                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1104                         power-domains = <&sysc R8A7795_PD_A3IR>;
1105                         #iommu-cells = <1>;
1106                 };
1107
1108                 ipmmu_mm: mmu@e67b0000 {
1109                         compatible = "renesas,ipmmu-r8a7795";
1110                         reg = <0 0xe67b0000 0 0x1000>;
1111                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1112                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1113                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1114                         #iommu-cells = <1>;
1115                 };
1116
1117                 ipmmu_mp0: mmu@ec670000 {
1118                         compatible = "renesas,ipmmu-r8a7795";
1119                         reg = <0 0xec670000 0 0x1000>;
1120                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1121                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1122                         #iommu-cells = <1>;
1123                 };
1124
1125                 ipmmu_pv0: mmu@fd800000 {
1126                         compatible = "renesas,ipmmu-r8a7795";
1127                         reg = <0 0xfd800000 0 0x1000>;
1128                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1129                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1130                         #iommu-cells = <1>;
1131                 };
1132
1133                 ipmmu_pv1: mmu@fd950000 {
1134                         compatible = "renesas,ipmmu-r8a7795";
1135                         reg = <0 0xfd950000 0 0x1000>;
1136                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1137                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1138                         #iommu-cells = <1>;
1139                 };
1140
1141                 ipmmu_pv2: mmu@fd960000 {
1142                         compatible = "renesas,ipmmu-r8a7795";
1143                         reg = <0 0xfd960000 0 0x1000>;
1144                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1145                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1146                         #iommu-cells = <1>;
1147                 };
1148
1149                 ipmmu_pv3: mmu@fd970000 {
1150                         compatible = "renesas,ipmmu-r8a7795";
1151                         reg = <0 0xfd970000 0 0x1000>;
1152                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1153                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1154                         #iommu-cells = <1>;
1155                 };
1156
1157                 ipmmu_rt: mmu@ffc80000 {
1158                         compatible = "renesas,ipmmu-r8a7795";
1159                         reg = <0 0xffc80000 0 0x1000>;
1160                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1161                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1162                         #iommu-cells = <1>;
1163                 };
1164
1165                 ipmmu_vc0: mmu@fe6b0000 {
1166                         compatible = "renesas,ipmmu-r8a7795";
1167                         reg = <0 0xfe6b0000 0 0x1000>;
1168                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1169                         power-domains = <&sysc R8A7795_PD_A3VC>;
1170                         #iommu-cells = <1>;
1171                 };
1172
1173                 ipmmu_vc1: mmu@fe6f0000 {
1174                         compatible = "renesas,ipmmu-r8a7795";
1175                         reg = <0 0xfe6f0000 0 0x1000>;
1176                         renesas,ipmmu-main = <&ipmmu_mm 13>;
1177                         power-domains = <&sysc R8A7795_PD_A3VC>;
1178                         #iommu-cells = <1>;
1179                 };
1180
1181                 ipmmu_vi0: mmu@febd0000 {
1182                         compatible = "renesas,ipmmu-r8a7795";
1183                         reg = <0 0xfebd0000 0 0x1000>;
1184                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1185                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1186                         #iommu-cells = <1>;
1187                 };
1188
1189                 ipmmu_vi1: mmu@febe0000 {
1190                         compatible = "renesas,ipmmu-r8a7795";
1191                         reg = <0 0xfebe0000 0 0x1000>;
1192                         renesas,ipmmu-main = <&ipmmu_mm 15>;
1193                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1194                         #iommu-cells = <1>;
1195                 };
1196
1197                 ipmmu_vp0: mmu@fe990000 {
1198                         compatible = "renesas,ipmmu-r8a7795";
1199                         reg = <0 0xfe990000 0 0x1000>;
1200                         renesas,ipmmu-main = <&ipmmu_mm 16>;
1201                         power-domains = <&sysc R8A7795_PD_A3VP>;
1202                         #iommu-cells = <1>;
1203                 };
1204
1205                 ipmmu_vp1: mmu@fe980000 {
1206                         compatible = "renesas,ipmmu-r8a7795";
1207                         reg = <0 0xfe980000 0 0x1000>;
1208                         renesas,ipmmu-main = <&ipmmu_mm 17>;
1209                         power-domains = <&sysc R8A7795_PD_A3VP>;
1210                         #iommu-cells = <1>;
1211                 };
1212
1213                 avb: ethernet@e6800000 {
1214                         compatible = "renesas,etheravb-r8a7795",
1215                                      "renesas,etheravb-rcar-gen3";
1216                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1217                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1218                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1219                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1220                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1221                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1222                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1223                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1224                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1225                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1226                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1227                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1228                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1229                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1230                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1231                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1232                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1233                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1234                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1235                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1236                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1237                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1238                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1239                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1240                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1241                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1242                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1243                                           "ch4", "ch5", "ch6", "ch7",
1244                                           "ch8", "ch9", "ch10", "ch11",
1245                                           "ch12", "ch13", "ch14", "ch15",
1246                                           "ch16", "ch17", "ch18", "ch19",
1247                                           "ch20", "ch21", "ch22", "ch23",
1248                                           "ch24";
1249                         clocks = <&cpg CPG_MOD 812>;
1250                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1251                         resets = <&cpg 812>;
1252                         phy-mode = "rgmii";
1253                         iommus = <&ipmmu_ds0 16>;
1254                         #address-cells = <1>;
1255                         #size-cells = <0>;
1256                         status = "disabled";
1257                 };
1258
1259                 can0: can@e6c30000 {
1260                         compatible = "renesas,can-r8a7795",
1261                                      "renesas,rcar-gen3-can";
1262                         reg = <0 0xe6c30000 0 0x1000>;
1263                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1264                         clocks = <&cpg CPG_MOD 916>,
1265                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1266                                <&can_clk>;
1267                         clock-names = "clkp1", "clkp2", "can_clk";
1268                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1269                         assigned-clock-rates = <40000000>;
1270                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1271                         resets = <&cpg 916>;
1272                         status = "disabled";
1273                 };
1274
1275                 can1: can@e6c38000 {
1276                         compatible = "renesas,can-r8a7795",
1277                                      "renesas,rcar-gen3-can";
1278                         reg = <0 0xe6c38000 0 0x1000>;
1279                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1280                         clocks = <&cpg CPG_MOD 915>,
1281                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1282                                <&can_clk>;
1283                         clock-names = "clkp1", "clkp2", "can_clk";
1284                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1285                         assigned-clock-rates = <40000000>;
1286                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1287                         resets = <&cpg 915>;
1288                         status = "disabled";
1289                 };
1290
1291                 canfd: can@e66c0000 {
1292                         compatible = "renesas,r8a7795-canfd",
1293                                      "renesas,rcar-gen3-canfd";
1294                         reg = <0 0xe66c0000 0 0x8000>;
1295                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1296                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1297                         clocks = <&cpg CPG_MOD 914>,
1298                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1299                                <&can_clk>;
1300                         clock-names = "fck", "canfd", "can_clk";
1301                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1302                         assigned-clock-rates = <40000000>;
1303                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1304                         resets = <&cpg 914>;
1305                         status = "disabled";
1306
1307                         channel0 {
1308                                 status = "disabled";
1309                         };
1310
1311                         channel1 {
1312                                 status = "disabled";
1313                         };
1314                 };
1315
1316                 pwm0: pwm@e6e30000 {
1317                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1318                         reg = <0 0xe6e30000 0 0x8>;
1319                         clocks = <&cpg CPG_MOD 523>;
1320                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1321                         resets = <&cpg 523>;
1322                         #pwm-cells = <2>;
1323                         status = "disabled";
1324                 };
1325
1326                 pwm1: pwm@e6e31000 {
1327                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1328                         reg = <0 0xe6e31000 0 0x8>;
1329                         clocks = <&cpg CPG_MOD 523>;
1330                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1331                         resets = <&cpg 523>;
1332                         #pwm-cells = <2>;
1333                         status = "disabled";
1334                 };
1335
1336                 pwm2: pwm@e6e32000 {
1337                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1338                         reg = <0 0xe6e32000 0 0x8>;
1339                         clocks = <&cpg CPG_MOD 523>;
1340                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1341                         resets = <&cpg 523>;
1342                         #pwm-cells = <2>;
1343                         status = "disabled";
1344                 };
1345
1346                 pwm3: pwm@e6e33000 {
1347                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1348                         reg = <0 0xe6e33000 0 0x8>;
1349                         clocks = <&cpg CPG_MOD 523>;
1350                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1351                         resets = <&cpg 523>;
1352                         #pwm-cells = <2>;
1353                         status = "disabled";
1354                 };
1355
1356                 pwm4: pwm@e6e34000 {
1357                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1358                         reg = <0 0xe6e34000 0 0x8>;
1359                         clocks = <&cpg CPG_MOD 523>;
1360                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1361                         resets = <&cpg 523>;
1362                         #pwm-cells = <2>;
1363                         status = "disabled";
1364                 };
1365
1366                 pwm5: pwm@e6e35000 {
1367                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1368                         reg = <0 0xe6e35000 0 0x8>;
1369                         clocks = <&cpg CPG_MOD 523>;
1370                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1371                         resets = <&cpg 523>;
1372                         #pwm-cells = <2>;
1373                         status = "disabled";
1374                 };
1375
1376                 pwm6: pwm@e6e36000 {
1377                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1378                         reg = <0 0xe6e36000 0 0x8>;
1379                         clocks = <&cpg CPG_MOD 523>;
1380                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1381                         resets = <&cpg 523>;
1382                         #pwm-cells = <2>;
1383                         status = "disabled";
1384                 };
1385
1386                 scif0: serial@e6e60000 {
1387                         compatible = "renesas,scif-r8a7795",
1388                                      "renesas,rcar-gen3-scif", "renesas,scif";
1389                         reg = <0 0xe6e60000 0 64>;
1390                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1391                         clocks = <&cpg CPG_MOD 207>,
1392                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1393                                  <&scif_clk>;
1394                         clock-names = "fck", "brg_int", "scif_clk";
1395                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1396                                <&dmac2 0x51>, <&dmac2 0x50>;
1397                         dma-names = "tx", "rx", "tx", "rx";
1398                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1399                         resets = <&cpg 207>;
1400                         status = "disabled";
1401                 };
1402
1403                 scif1: serial@e6e68000 {
1404                         compatible = "renesas,scif-r8a7795",
1405                                      "renesas,rcar-gen3-scif", "renesas,scif";
1406                         reg = <0 0xe6e68000 0 64>;
1407                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1408                         clocks = <&cpg CPG_MOD 206>,
1409                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1410                                  <&scif_clk>;
1411                         clock-names = "fck", "brg_int", "scif_clk";
1412                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1413                                <&dmac2 0x53>, <&dmac2 0x52>;
1414                         dma-names = "tx", "rx", "tx", "rx";
1415                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1416                         resets = <&cpg 206>;
1417                         status = "disabled";
1418                 };
1419
1420                 scif2: serial@e6e88000 {
1421                         compatible = "renesas,scif-r8a7795",
1422                                      "renesas,rcar-gen3-scif", "renesas,scif";
1423                         reg = <0 0xe6e88000 0 64>;
1424                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1425                         clocks = <&cpg CPG_MOD 310>,
1426                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1427                                  <&scif_clk>;
1428                         clock-names = "fck", "brg_int", "scif_clk";
1429                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1430                                <&dmac2 0x13>, <&dmac2 0x12>;
1431                         dma-names = "tx", "rx", "tx", "rx";
1432                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1433                         resets = <&cpg 310>;
1434                         status = "disabled";
1435                 };
1436
1437                 scif3: serial@e6c50000 {
1438                         compatible = "renesas,scif-r8a7795",
1439                                      "renesas,rcar-gen3-scif", "renesas,scif";
1440                         reg = <0 0xe6c50000 0 64>;
1441                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1442                         clocks = <&cpg CPG_MOD 204>,
1443                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1444                                  <&scif_clk>;
1445                         clock-names = "fck", "brg_int", "scif_clk";
1446                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1447                         dma-names = "tx", "rx";
1448                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1449                         resets = <&cpg 204>;
1450                         status = "disabled";
1451                 };
1452
1453                 scif4: serial@e6c40000 {
1454                         compatible = "renesas,scif-r8a7795",
1455                                      "renesas,rcar-gen3-scif", "renesas,scif";
1456                         reg = <0 0xe6c40000 0 64>;
1457                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1458                         clocks = <&cpg CPG_MOD 203>,
1459                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1460                                  <&scif_clk>;
1461                         clock-names = "fck", "brg_int", "scif_clk";
1462                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1463                         dma-names = "tx", "rx";
1464                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1465                         resets = <&cpg 203>;
1466                         status = "disabled";
1467                 };
1468
1469                 scif5: serial@e6f30000 {
1470                         compatible = "renesas,scif-r8a7795",
1471                                      "renesas,rcar-gen3-scif", "renesas,scif";
1472                         reg = <0 0xe6f30000 0 64>;
1473                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1474                         clocks = <&cpg CPG_MOD 202>,
1475                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1476                                  <&scif_clk>;
1477                         clock-names = "fck", "brg_int", "scif_clk";
1478                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1479                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1480                         dma-names = "tx", "rx", "tx", "rx";
1481                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1482                         resets = <&cpg 202>;
1483                         status = "disabled";
1484                 };
1485
1486                 tpu: pwm@e6e80000 {
1487                         compatible = "renesas,tpu-r8a7795", "renesas,tpu";
1488                         reg = <0 0xe6e80000 0 0x148>;
1489                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1490                         clocks = <&cpg CPG_MOD 304>;
1491                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1492                         resets = <&cpg 304>;
1493                         #pwm-cells = <3>;
1494                         status = "disabled";
1495                 };
1496
1497                 msiof0: spi@e6e90000 {
1498                         compatible = "renesas,msiof-r8a7795",
1499                                      "renesas,rcar-gen3-msiof";
1500                         reg = <0 0xe6e90000 0 0x0064>;
1501                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1502                         clocks = <&cpg CPG_MOD 211>;
1503                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1504                                <&dmac2 0x41>, <&dmac2 0x40>;
1505                         dma-names = "tx", "rx", "tx", "rx";
1506                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1507                         resets = <&cpg 211>;
1508                         #address-cells = <1>;
1509                         #size-cells = <0>;
1510                         status = "disabled";
1511                 };
1512
1513                 msiof1: spi@e6ea0000 {
1514                         compatible = "renesas,msiof-r8a7795",
1515                                      "renesas,rcar-gen3-msiof";
1516                         reg = <0 0xe6ea0000 0 0x0064>;
1517                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1518                         clocks = <&cpg CPG_MOD 210>;
1519                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1520                                <&dmac2 0x43>, <&dmac2 0x42>;
1521                         dma-names = "tx", "rx", "tx", "rx";
1522                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1523                         resets = <&cpg 210>;
1524                         #address-cells = <1>;
1525                         #size-cells = <0>;
1526                         status = "disabled";
1527                 };
1528
1529                 msiof2: spi@e6c00000 {
1530                         compatible = "renesas,msiof-r8a7795",
1531                                      "renesas,rcar-gen3-msiof";
1532                         reg = <0 0xe6c00000 0 0x0064>;
1533                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1534                         clocks = <&cpg CPG_MOD 209>;
1535                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1536                         dma-names = "tx", "rx";
1537                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1538                         resets = <&cpg 209>;
1539                         #address-cells = <1>;
1540                         #size-cells = <0>;
1541                         status = "disabled";
1542                 };
1543
1544                 msiof3: spi@e6c10000 {
1545                         compatible = "renesas,msiof-r8a7795",
1546                                      "renesas,rcar-gen3-msiof";
1547                         reg = <0 0xe6c10000 0 0x0064>;
1548                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1549                         clocks = <&cpg CPG_MOD 208>;
1550                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1551                         dma-names = "tx", "rx";
1552                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1553                         resets = <&cpg 208>;
1554                         #address-cells = <1>;
1555                         #size-cells = <0>;
1556                         status = "disabled";
1557                 };
1558
1559                 vin0: video@e6ef0000 {
1560                         compatible = "renesas,vin-r8a7795";
1561                         reg = <0 0xe6ef0000 0 0x1000>;
1562                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1563                         clocks = <&cpg CPG_MOD 811>;
1564                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1565                         resets = <&cpg 811>;
1566                         renesas,id = <0>;
1567                         status = "disabled";
1568
1569                         ports {
1570                                 #address-cells = <1>;
1571                                 #size-cells = <0>;
1572
1573                                 port@1 {
1574                                         #address-cells = <1>;
1575                                         #size-cells = <0>;
1576
1577                                         reg = <1>;
1578
1579                                         vin0csi20: endpoint@0 {
1580                                                 reg = <0>;
1581                                                 remote-endpoint = <&csi20vin0>;
1582                                         };
1583                                         vin0csi40: endpoint@2 {
1584                                                 reg = <2>;
1585                                                 remote-endpoint = <&csi40vin0>;
1586                                         };
1587                                 };
1588                         };
1589                 };
1590
1591                 vin1: video@e6ef1000 {
1592                         compatible = "renesas,vin-r8a7795";
1593                         reg = <0 0xe6ef1000 0 0x1000>;
1594                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1595                         clocks = <&cpg CPG_MOD 810>;
1596                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1597                         resets = <&cpg 810>;
1598                         renesas,id = <1>;
1599                         status = "disabled";
1600
1601                         ports {
1602                                 #address-cells = <1>;
1603                                 #size-cells = <0>;
1604
1605                                 port@1 {
1606                                         #address-cells = <1>;
1607                                         #size-cells = <0>;
1608
1609                                         reg = <1>;
1610
1611                                         vin1csi20: endpoint@0 {
1612                                                 reg = <0>;
1613                                                 remote-endpoint = <&csi20vin1>;
1614                                         };
1615                                         vin1csi40: endpoint@2 {
1616                                                 reg = <2>;
1617                                                 remote-endpoint = <&csi40vin1>;
1618                                         };
1619                                 };
1620                         };
1621                 };
1622
1623                 vin2: video@e6ef2000 {
1624                         compatible = "renesas,vin-r8a7795";
1625                         reg = <0 0xe6ef2000 0 0x1000>;
1626                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1627                         clocks = <&cpg CPG_MOD 809>;
1628                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1629                         resets = <&cpg 809>;
1630                         renesas,id = <2>;
1631                         status = "disabled";
1632
1633                         ports {
1634                                 #address-cells = <1>;
1635                                 #size-cells = <0>;
1636
1637                                 port@1 {
1638                                         #address-cells = <1>;
1639                                         #size-cells = <0>;
1640
1641                                         reg = <1>;
1642
1643                                         vin2csi20: endpoint@0 {
1644                                                 reg = <0>;
1645                                                 remote-endpoint = <&csi20vin2>;
1646                                         };
1647                                         vin2csi40: endpoint@2 {
1648                                                 reg = <2>;
1649                                                 remote-endpoint = <&csi40vin2>;
1650                                         };
1651                                 };
1652                         };
1653                 };
1654
1655                 vin3: video@e6ef3000 {
1656                         compatible = "renesas,vin-r8a7795";
1657                         reg = <0 0xe6ef3000 0 0x1000>;
1658                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1659                         clocks = <&cpg CPG_MOD 808>;
1660                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1661                         resets = <&cpg 808>;
1662                         renesas,id = <3>;
1663                         status = "disabled";
1664
1665                         ports {
1666                                 #address-cells = <1>;
1667                                 #size-cells = <0>;
1668
1669                                 port@1 {
1670                                         #address-cells = <1>;
1671                                         #size-cells = <0>;
1672
1673                                         reg = <1>;
1674
1675                                         vin3csi20: endpoint@0 {
1676                                                 reg = <0>;
1677                                                 remote-endpoint = <&csi20vin3>;
1678                                         };
1679                                         vin3csi40: endpoint@2 {
1680                                                 reg = <2>;
1681                                                 remote-endpoint = <&csi40vin3>;
1682                                         };
1683                                 };
1684                         };
1685                 };
1686
1687                 vin4: video@e6ef4000 {
1688                         compatible = "renesas,vin-r8a7795";
1689                         reg = <0 0xe6ef4000 0 0x1000>;
1690                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1691                         clocks = <&cpg CPG_MOD 807>;
1692                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1693                         resets = <&cpg 807>;
1694                         renesas,id = <4>;
1695                         status = "disabled";
1696
1697                         ports {
1698                                 #address-cells = <1>;
1699                                 #size-cells = <0>;
1700
1701                                 port@1 {
1702                                         #address-cells = <1>;
1703                                         #size-cells = <0>;
1704
1705                                         reg = <1>;
1706
1707                                         vin4csi20: endpoint@0 {
1708                                                 reg = <0>;
1709                                                 remote-endpoint = <&csi20vin4>;
1710                                         };
1711                                         vin4csi41: endpoint@3 {
1712                                                 reg = <3>;
1713                                                 remote-endpoint = <&csi41vin4>;
1714                                         };
1715                                 };
1716                         };
1717                 };
1718
1719                 vin5: video@e6ef5000 {
1720                         compatible = "renesas,vin-r8a7795";
1721                         reg = <0 0xe6ef5000 0 0x1000>;
1722                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1723                         clocks = <&cpg CPG_MOD 806>;
1724                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1725                         resets = <&cpg 806>;
1726                         renesas,id = <5>;
1727                         status = "disabled";
1728
1729                         ports {
1730                                 #address-cells = <1>;
1731                                 #size-cells = <0>;
1732
1733                                 port@1 {
1734                                         #address-cells = <1>;
1735                                         #size-cells = <0>;
1736
1737                                         reg = <1>;
1738
1739                                         vin5csi20: endpoint@0 {
1740                                                 reg = <0>;
1741                                                 remote-endpoint = <&csi20vin5>;
1742                                         };
1743                                         vin5csi41: endpoint@3 {
1744                                                 reg = <3>;
1745                                                 remote-endpoint = <&csi41vin5>;
1746                                         };
1747                                 };
1748                         };
1749                 };
1750
1751                 vin6: video@e6ef6000 {
1752                         compatible = "renesas,vin-r8a7795";
1753                         reg = <0 0xe6ef6000 0 0x1000>;
1754                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1755                         clocks = <&cpg CPG_MOD 805>;
1756                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1757                         resets = <&cpg 805>;
1758                         renesas,id = <6>;
1759                         status = "disabled";
1760
1761                         ports {
1762                                 #address-cells = <1>;
1763                                 #size-cells = <0>;
1764
1765                                 port@1 {
1766                                         #address-cells = <1>;
1767                                         #size-cells = <0>;
1768
1769                                         reg = <1>;
1770
1771                                         vin6csi20: endpoint@0 {
1772                                                 reg = <0>;
1773                                                 remote-endpoint = <&csi20vin6>;
1774                                         };
1775                                         vin6csi41: endpoint@3 {
1776                                                 reg = <3>;
1777                                                 remote-endpoint = <&csi41vin6>;
1778                                         };
1779                                 };
1780                         };
1781                 };
1782
1783                 vin7: video@e6ef7000 {
1784                         compatible = "renesas,vin-r8a7795";
1785                         reg = <0 0xe6ef7000 0 0x1000>;
1786                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1787                         clocks = <&cpg CPG_MOD 804>;
1788                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1789                         resets = <&cpg 804>;
1790                         renesas,id = <7>;
1791                         status = "disabled";
1792
1793                         ports {
1794                                 #address-cells = <1>;
1795                                 #size-cells = <0>;
1796
1797                                 port@1 {
1798                                         #address-cells = <1>;
1799                                         #size-cells = <0>;
1800
1801                                         reg = <1>;
1802
1803                                         vin7csi20: endpoint@0 {
1804                                                 reg = <0>;
1805                                                 remote-endpoint = <&csi20vin7>;
1806                                         };
1807                                         vin7csi41: endpoint@3 {
1808                                                 reg = <3>;
1809                                                 remote-endpoint = <&csi41vin7>;
1810                                         };
1811                                 };
1812                         };
1813                 };
1814
1815                 drif00: rif@e6f40000 {
1816                         compatible = "renesas,r8a7795-drif",
1817                                      "renesas,rcar-gen3-drif";
1818                         reg = <0 0xe6f40000 0 0x64>;
1819                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1820                         clocks = <&cpg CPG_MOD 515>;
1821                         clock-names = "fck";
1822                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1823                         dma-names = "rx", "rx";
1824                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1825                         resets = <&cpg 515>;
1826                         renesas,bonding = <&drif01>;
1827                         status = "disabled";
1828                 };
1829
1830                 drif01: rif@e6f50000 {
1831                         compatible = "renesas,r8a7795-drif",
1832                                      "renesas,rcar-gen3-drif";
1833                         reg = <0 0xe6f50000 0 0x64>;
1834                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1835                         clocks = <&cpg CPG_MOD 514>;
1836                         clock-names = "fck";
1837                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1838                         dma-names = "rx", "rx";
1839                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1840                         resets = <&cpg 514>;
1841                         renesas,bonding = <&drif00>;
1842                         status = "disabled";
1843                 };
1844
1845                 drif10: rif@e6f60000 {
1846                         compatible = "renesas,r8a7795-drif",
1847                                      "renesas,rcar-gen3-drif";
1848                         reg = <0 0xe6f60000 0 0x64>;
1849                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1850                         clocks = <&cpg CPG_MOD 513>;
1851                         clock-names = "fck";
1852                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1853                         dma-names = "rx", "rx";
1854                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1855                         resets = <&cpg 513>;
1856                         renesas,bonding = <&drif11>;
1857                         status = "disabled";
1858                 };
1859
1860                 drif11: rif@e6f70000 {
1861                         compatible = "renesas,r8a7795-drif",
1862                                      "renesas,rcar-gen3-drif";
1863                         reg = <0 0xe6f70000 0 0x64>;
1864                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1865                         clocks = <&cpg CPG_MOD 512>;
1866                         clock-names = "fck";
1867                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1868                         dma-names = "rx", "rx";
1869                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1870                         resets = <&cpg 512>;
1871                         renesas,bonding = <&drif10>;
1872                         status = "disabled";
1873                 };
1874
1875                 drif20: rif@e6f80000 {
1876                         compatible = "renesas,r8a7795-drif",
1877                                      "renesas,rcar-gen3-drif";
1878                         reg = <0 0xe6f80000 0 0x64>;
1879                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1880                         clocks = <&cpg CPG_MOD 511>;
1881                         clock-names = "fck";
1882                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1883                         dma-names = "rx", "rx";
1884                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1885                         resets = <&cpg 511>;
1886                         renesas,bonding = <&drif21>;
1887                         status = "disabled";
1888                 };
1889
1890                 drif21: rif@e6f90000 {
1891                         compatible = "renesas,r8a7795-drif",
1892                                      "renesas,rcar-gen3-drif";
1893                         reg = <0 0xe6f90000 0 0x64>;
1894                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1895                         clocks = <&cpg CPG_MOD 510>;
1896                         clock-names = "fck";
1897                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1898                         dma-names = "rx", "rx";
1899                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1900                         resets = <&cpg 510>;
1901                         renesas,bonding = <&drif20>;
1902                         status = "disabled";
1903                 };
1904
1905                 drif30: rif@e6fa0000 {
1906                         compatible = "renesas,r8a7795-drif",
1907                                      "renesas,rcar-gen3-drif";
1908                         reg = <0 0xe6fa0000 0 0x64>;
1909                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1910                         clocks = <&cpg CPG_MOD 509>;
1911                         clock-names = "fck";
1912                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1913                         dma-names = "rx", "rx";
1914                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1915                         resets = <&cpg 509>;
1916                         renesas,bonding = <&drif31>;
1917                         status = "disabled";
1918                 };
1919
1920                 drif31: rif@e6fb0000 {
1921                         compatible = "renesas,r8a7795-drif",
1922                                      "renesas,rcar-gen3-drif";
1923                         reg = <0 0xe6fb0000 0 0x64>;
1924                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1925                         clocks = <&cpg CPG_MOD 508>;
1926                         clock-names = "fck";
1927                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1928                         dma-names = "rx", "rx";
1929                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1930                         resets = <&cpg 508>;
1931                         renesas,bonding = <&drif30>;
1932                         status = "disabled";
1933                 };
1934
1935                 rcar_sound: sound@ec500000 {
1936                         /*
1937                          * #sound-dai-cells is required
1938                          *
1939                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1940                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1941                          */
1942                         /*
1943                          * #clock-cells is required for audio_clkout0/1/2/3
1944                          *
1945                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1946                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1947                          */
1948                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1949                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1950                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1951                                 <0 0xec540000 0 0x1000>, /* SSIU */
1952                                 <0 0xec541000 0 0x280>,  /* SSI */
1953                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1954                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1955
1956                         clocks = <&cpg CPG_MOD 1005>,
1957                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1958                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1959                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1960                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1961                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1962                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1963                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1964                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1965                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1966                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1967                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1968                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1969                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1970                                  <&audio_clk_a>, <&audio_clk_b>,
1971                                  <&audio_clk_c>,
1972                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1973                         clock-names = "ssi-all",
1974                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1975                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1976                                       "ssi.1", "ssi.0",
1977                                       "src.9", "src.8", "src.7", "src.6",
1978                                       "src.5", "src.4", "src.3", "src.2",
1979                                       "src.1", "src.0",
1980                                       "mix.1", "mix.0",
1981                                       "ctu.1", "ctu.0",
1982                                       "dvc.0", "dvc.1",
1983                                       "clk_a", "clk_b", "clk_c", "clk_i";
1984                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1985                         resets = <&cpg 1005>,
1986                                  <&cpg 1006>, <&cpg 1007>,
1987                                  <&cpg 1008>, <&cpg 1009>,
1988                                  <&cpg 1010>, <&cpg 1011>,
1989                                  <&cpg 1012>, <&cpg 1013>,
1990                                  <&cpg 1014>, <&cpg 1015>;
1991                         reset-names = "ssi-all",
1992                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1993                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1994                                       "ssi.1", "ssi.0";
1995                         status = "disabled";
1996
1997                         rcar_sound,dvc {
1998                                 dvc0: dvc-0 {
1999                                         dmas = <&audma1 0xbc>;
2000                                         dma-names = "tx";
2001                                 };
2002                                 dvc1: dvc-1 {
2003                                         dmas = <&audma1 0xbe>;
2004                                         dma-names = "tx";
2005                                 };
2006                         };
2007
2008                         rcar_sound,mix {
2009                                 mix0: mix-0 { };
2010                                 mix1: mix-1 { };
2011                         };
2012
2013                         rcar_sound,ctu {
2014                                 ctu00: ctu-0 { };
2015                                 ctu01: ctu-1 { };
2016                                 ctu02: ctu-2 { };
2017                                 ctu03: ctu-3 { };
2018                                 ctu10: ctu-4 { };
2019                                 ctu11: ctu-5 { };
2020                                 ctu12: ctu-6 { };
2021                                 ctu13: ctu-7 { };
2022                         };
2023
2024                         rcar_sound,src {
2025                                 src0: src-0 {
2026                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
2027                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
2028                                         dma-names = "rx", "tx";
2029                                 };
2030                                 src1: src-1 {
2031                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
2032                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
2033                                         dma-names = "rx", "tx";
2034                                 };
2035                                 src2: src-2 {
2036                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
2037                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
2038                                         dma-names = "rx", "tx";
2039                                 };
2040                                 src3: src-3 {
2041                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
2042                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2043                                         dma-names = "rx", "tx";
2044                                 };
2045                                 src4: src-4 {
2046                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
2047                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2048                                         dma-names = "rx", "tx";
2049                                 };
2050                                 src5: src-5 {
2051                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
2052                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2053                                         dma-names = "rx", "tx";
2054                                 };
2055                                 src6: src-6 {
2056                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
2057                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
2058                                         dma-names = "rx", "tx";
2059                                 };
2060                                 src7: src-7 {
2061                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
2062                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
2063                                         dma-names = "rx", "tx";
2064                                 };
2065                                 src8: src-8 {
2066                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2067                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
2068                                         dma-names = "rx", "tx";
2069                                 };
2070                                 src9: src-9 {
2071                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2072                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
2073                                         dma-names = "rx", "tx";
2074                                 };
2075                         };
2076
2077                         rcar_sound,ssiu {
2078                                 ssiu00: ssiu-0 {
2079                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
2080                                         dma-names = "rx", "tx";
2081                                 };
2082                                 ssiu01: ssiu-1 {
2083                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
2084                                         dma-names = "rx", "tx";
2085                                 };
2086                                 ssiu02: ssiu-2 {
2087                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
2088                                         dma-names = "rx", "tx";
2089                                 };
2090                                 ssiu03: ssiu-3 {
2091                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
2092                                         dma-names = "rx", "tx";
2093                                 };
2094                                 ssiu04: ssiu-4 {
2095                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
2096                                         dma-names = "rx", "tx";
2097                                 };
2098                                 ssiu05: ssiu-5 {
2099                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
2100                                         dma-names = "rx", "tx";
2101                                 };
2102                                 ssiu06: ssiu-6 {
2103                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
2104                                         dma-names = "rx", "tx";
2105                                 };
2106                                 ssiu07: ssiu-7 {
2107                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
2108                                         dma-names = "rx", "tx";
2109                                 };
2110                                 ssiu10: ssiu-8 {
2111                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
2112                                         dma-names = "rx", "tx";
2113                                 };
2114                                 ssiu11: ssiu-9 {
2115                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2116                                         dma-names = "rx", "tx";
2117                                 };
2118                                 ssiu12: ssiu-10 {
2119                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
2120                                         dma-names = "rx", "tx";
2121                                 };
2122                                 ssiu13: ssiu-11 {
2123                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
2124                                         dma-names = "rx", "tx";
2125                                 };
2126                                 ssiu14: ssiu-12 {
2127                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
2128                                         dma-names = "rx", "tx";
2129                                 };
2130                                 ssiu15: ssiu-13 {
2131                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2132                                         dma-names = "rx", "tx";
2133                                 };
2134                                 ssiu16: ssiu-14 {
2135                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2136                                         dma-names = "rx", "tx";
2137                                 };
2138                                 ssiu17: ssiu-15 {
2139                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2140                                         dma-names = "rx", "tx";
2141                                 };
2142                                 ssiu20: ssiu-16 {
2143                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
2144                                         dma-names = "rx", "tx";
2145                                 };
2146                                 ssiu21: ssiu-17 {
2147                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
2148                                         dma-names = "rx", "tx";
2149                                 };
2150                                 ssiu22: ssiu-18 {
2151                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2152                                         dma-names = "rx", "tx";
2153                                 };
2154                                 ssiu23: ssiu-19 {
2155                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2156                                         dma-names = "rx", "tx";
2157                                 };
2158                                 ssiu24: ssiu-20 {
2159                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2160                                         dma-names = "rx", "tx";
2161                                 };
2162                                 ssiu25: ssiu-21 {
2163                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2164                                         dma-names = "rx", "tx";
2165                                 };
2166                                 ssiu26: ssiu-22 {
2167                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2168                                         dma-names = "rx", "tx";
2169                                 };
2170                                 ssiu27: ssiu-23 {
2171                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2172                                         dma-names = "rx", "tx";
2173                                 };
2174                                 ssiu30: ssiu-24 {
2175                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2176                                         dma-names = "rx", "tx";
2177                                 };
2178                                 ssiu31: ssiu-25 {
2179                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2180                                         dma-names = "rx", "tx";
2181                                 };
2182                                 ssiu32: ssiu-26 {
2183                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2184                                         dma-names = "rx", "tx";
2185                                 };
2186                                 ssiu33: ssiu-27 {
2187                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2188                                         dma-names = "rx", "tx";
2189                                 };
2190                                 ssiu34: ssiu-28 {
2191                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2192                                         dma-names = "rx", "tx";
2193                                 };
2194                                 ssiu35: ssiu-29 {
2195                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2196                                         dma-names = "rx", "tx";
2197                                 };
2198                                 ssiu36: ssiu-30 {
2199                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2200                                         dma-names = "rx", "tx";
2201                                 };
2202                                 ssiu37: ssiu-31 {
2203                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2204                                         dma-names = "rx", "tx";
2205                                 };
2206                                 ssiu40: ssiu-32 {
2207                                         dmas =  <&audma0 0x71>, <&audma1 0x72>;
2208                                         dma-names = "rx", "tx";
2209                                 };
2210                                 ssiu41: ssiu-33 {
2211                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2212                                         dma-names = "rx", "tx";
2213                                 };
2214                                 ssiu42: ssiu-34 {
2215                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2216                                         dma-names = "rx", "tx";
2217                                 };
2218                                 ssiu43: ssiu-35 {
2219                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2220                                         dma-names = "rx", "tx";
2221                                 };
2222                                 ssiu44: ssiu-36 {
2223                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2224                                         dma-names = "rx", "tx";
2225                                 };
2226                                 ssiu45: ssiu-37 {
2227                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2228                                         dma-names = "rx", "tx";
2229                                 };
2230                                 ssiu46: ssiu-38 {
2231                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2232                                         dma-names = "rx", "tx";
2233                                 };
2234                                 ssiu47: ssiu-39 {
2235                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2236                                         dma-names = "rx", "tx";
2237                                 };
2238                                 ssiu50: ssiu-40 {
2239                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2240                                         dma-names = "rx", "tx";
2241                                 };
2242                                 ssiu60: ssiu-41 {
2243                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2244                                         dma-names = "rx", "tx";
2245                                 };
2246                                 ssiu70: ssiu-42 {
2247                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2248                                         dma-names = "rx", "tx";
2249                                 };
2250                                 ssiu80: ssiu-43 {
2251                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2252                                         dma-names = "rx", "tx";
2253                                 };
2254                                 ssiu90: ssiu-44 {
2255                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2256                                         dma-names = "rx", "tx";
2257                                 };
2258                                 ssiu91: ssiu-45 {
2259                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2260                                         dma-names = "rx", "tx";
2261                                 };
2262                                 ssiu92: ssiu-46 {
2263                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2264                                         dma-names = "rx", "tx";
2265                                 };
2266                                 ssiu93: ssiu-47 {
2267                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2268                                         dma-names = "rx", "tx";
2269                                 };
2270                                 ssiu94: ssiu-48 {
2271                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2272                                         dma-names = "rx", "tx";
2273                                 };
2274                                 ssiu95: ssiu-49 {
2275                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2276                                         dma-names = "rx", "tx";
2277                                 };
2278                                 ssiu96: ssiu-50 {
2279                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2280                                         dma-names = "rx", "tx";
2281                                 };
2282                                 ssiu97: ssiu-51 {
2283                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2284                                         dma-names = "rx", "tx";
2285                                 };
2286                         };
2287
2288                         rcar_sound,ssi {
2289                                 ssi0: ssi-0 {
2290                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2291                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
2292                                         dma-names = "rx", "tx";
2293                                 };
2294                                 ssi1: ssi-1 {
2295                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2296                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
2297                                         dma-names = "rx", "tx";
2298                                 };
2299                                 ssi2: ssi-2 {
2300                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2301                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
2302                                         dma-names = "rx", "tx";
2303                                 };
2304                                 ssi3: ssi-3 {
2305                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2306                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
2307                                         dma-names = "rx", "tx";
2308                                 };
2309                                 ssi4: ssi-4 {
2310                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2311                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
2312                                         dma-names = "rx", "tx";
2313                                 };
2314                                 ssi5: ssi-5 {
2315                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2316                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2317                                         dma-names = "rx", "tx";
2318                                 };
2319                                 ssi6: ssi-6 {
2320                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2321                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2322                                         dma-names = "rx", "tx";
2323                                 };
2324                                 ssi7: ssi-7 {
2325                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2326                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
2327                                         dma-names = "rx", "tx";
2328                                 };
2329                                 ssi8: ssi-8 {
2330                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2331                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
2332                                         dma-names = "rx", "tx";
2333                                 };
2334                                 ssi9: ssi-9 {
2335                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2336                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
2337                                         dma-names = "rx", "tx";
2338                                 };
2339                         };
2340                 };
2341
2342                 audma0: dma-controller@ec700000 {
2343                         compatible = "renesas,dmac-r8a7795",
2344                                      "renesas,rcar-dmac";
2345                         reg = <0 0xec700000 0 0x10000>;
2346                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2347                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2348                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2349                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2350                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2351                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2352                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2353                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2354                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2355                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2356                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2357                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2358                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2359                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2360                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2361                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2362                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2363                         interrupt-names = "error",
2364                                         "ch0", "ch1", "ch2", "ch3",
2365                                         "ch4", "ch5", "ch6", "ch7",
2366                                         "ch8", "ch9", "ch10", "ch11",
2367                                         "ch12", "ch13", "ch14", "ch15";
2368                         clocks = <&cpg CPG_MOD 502>;
2369                         clock-names = "fck";
2370                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2371                         resets = <&cpg 502>;
2372                         #dma-cells = <1>;
2373                         dma-channels = <16>;
2374                         iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2375                                <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2376                                <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2377                                <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2378                                <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2379                                <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2380                                <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2381                                <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2382                 };
2383
2384                 audma1: dma-controller@ec720000 {
2385                         compatible = "renesas,dmac-r8a7795",
2386                                      "renesas,rcar-dmac";
2387                         reg = <0 0xec720000 0 0x10000>;
2388                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2389                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2390                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2391                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2392                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2393                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2394                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2395                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2396                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2397                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2398                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2399                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2400                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2401                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2402                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2403                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2404                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2405                         interrupt-names = "error",
2406                                         "ch0", "ch1", "ch2", "ch3",
2407                                         "ch4", "ch5", "ch6", "ch7",
2408                                         "ch8", "ch9", "ch10", "ch11",
2409                                         "ch12", "ch13", "ch14", "ch15";
2410                         clocks = <&cpg CPG_MOD 501>;
2411                         clock-names = "fck";
2412                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2413                         resets = <&cpg 501>;
2414                         #dma-cells = <1>;
2415                         dma-channels = <16>;
2416                         iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2417                                <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2418                                <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2419                                <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2420                                <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2421                                <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2422                                <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2423                                <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2424                 };
2425
2426                 xhci0: usb@ee000000 {
2427                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
2428                         reg = <0 0xee000000 0 0xc00>;
2429                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2430                         clocks = <&cpg CPG_MOD 328>;
2431                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2432                         resets = <&cpg 328>;
2433                         status = "disabled";
2434                 };
2435
2436                 usb3_peri0: usb@ee020000 {
2437                         compatible = "renesas,r8a7795-usb3-peri",
2438                                      "renesas,rcar-gen3-usb3-peri";
2439                         reg = <0 0xee020000 0 0x400>;
2440                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2441                         clocks = <&cpg CPG_MOD 328>;
2442                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2443                         resets = <&cpg 328>;
2444                         status = "disabled";
2445                 };
2446
2447                 ohci0: usb@ee080000 {
2448                         compatible = "generic-ohci";
2449                         reg = <0 0xee080000 0 0x100>;
2450                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2451                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2452                         phys = <&usb2_phy0 1>;
2453                         phy-names = "usb";
2454                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2455                         resets = <&cpg 703>, <&cpg 704>;
2456                         status = "disabled";
2457                 };
2458
2459                 ohci1: usb@ee0a0000 {
2460                         compatible = "generic-ohci";
2461                         reg = <0 0xee0a0000 0 0x100>;
2462                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2463                         clocks = <&cpg CPG_MOD 702>;
2464                         phys = <&usb2_phy1 1>;
2465                         phy-names = "usb";
2466                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2467                         resets = <&cpg 702>;
2468                         status = "disabled";
2469                 };
2470
2471                 ohci2: usb@ee0c0000 {
2472                         compatible = "generic-ohci";
2473                         reg = <0 0xee0c0000 0 0x100>;
2474                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2475                         clocks = <&cpg CPG_MOD 701>;
2476                         phys = <&usb2_phy2 1>;
2477                         phy-names = "usb";
2478                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2479                         resets = <&cpg 701>;
2480                         status = "disabled";
2481                 };
2482
2483                 ohci3: usb@ee0e0000 {
2484                         compatible = "generic-ohci";
2485                         reg = <0 0xee0e0000 0 0x100>;
2486                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2487                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2488                         phys = <&usb2_phy3 1>;
2489                         phy-names = "usb";
2490                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2491                         resets = <&cpg 700>, <&cpg 705>;
2492                         status = "disabled";
2493                 };
2494
2495                 ehci0: usb@ee080100 {
2496                         compatible = "generic-ehci";
2497                         reg = <0 0xee080100 0 0x100>;
2498                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2499                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2500                         phys = <&usb2_phy0 2>;
2501                         phy-names = "usb";
2502                         companion = <&ohci0>;
2503                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2504                         resets = <&cpg 703>, <&cpg 704>;
2505                         status = "disabled";
2506                 };
2507
2508                 ehci1: usb@ee0a0100 {
2509                         compatible = "generic-ehci";
2510                         reg = <0 0xee0a0100 0 0x100>;
2511                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2512                         clocks = <&cpg CPG_MOD 702>;
2513                         phys = <&usb2_phy1 2>;
2514                         phy-names = "usb";
2515                         companion = <&ohci1>;
2516                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2517                         resets = <&cpg 702>;
2518                         status = "disabled";
2519                 };
2520
2521                 ehci2: usb@ee0c0100 {
2522                         compatible = "generic-ehci";
2523                         reg = <0 0xee0c0100 0 0x100>;
2524                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2525                         clocks = <&cpg CPG_MOD 701>;
2526                         phys = <&usb2_phy2 2>;
2527                         phy-names = "usb";
2528                         companion = <&ohci2>;
2529                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2530                         resets = <&cpg 701>;
2531                         status = "disabled";
2532                 };
2533
2534                 ehci3: usb@ee0e0100 {
2535                         compatible = "generic-ehci";
2536                         reg = <0 0xee0e0100 0 0x100>;
2537                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2538                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2539                         phys = <&usb2_phy3 2>;
2540                         phy-names = "usb";
2541                         companion = <&ohci3>;
2542                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2543                         resets = <&cpg 700>, <&cpg 705>;
2544                         status = "disabled";
2545                 };
2546
2547                 usb2_phy0: usb-phy@ee080200 {
2548                         compatible = "renesas,usb2-phy-r8a7795",
2549                                      "renesas,rcar-gen3-usb2-phy";
2550                         reg = <0 0xee080200 0 0x700>;
2551                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2552                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2553                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2554                         resets = <&cpg 703>, <&cpg 704>;
2555                         #phy-cells = <1>;
2556                         status = "disabled";
2557                 };
2558
2559                 usb2_phy1: usb-phy@ee0a0200 {
2560                         compatible = "renesas,usb2-phy-r8a7795",
2561                                      "renesas,rcar-gen3-usb2-phy";
2562                         reg = <0 0xee0a0200 0 0x700>;
2563                         clocks = <&cpg CPG_MOD 702>;
2564                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2565                         resets = <&cpg 702>;
2566                         #phy-cells = <1>;
2567                         status = "disabled";
2568                 };
2569
2570                 usb2_phy2: usb-phy@ee0c0200 {
2571                         compatible = "renesas,usb2-phy-r8a7795",
2572                                      "renesas,rcar-gen3-usb2-phy";
2573                         reg = <0 0xee0c0200 0 0x700>;
2574                         clocks = <&cpg CPG_MOD 701>;
2575                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2576                         resets = <&cpg 701>;
2577                         #phy-cells = <1>;
2578                         status = "disabled";
2579                 };
2580
2581                 usb2_phy3: usb-phy@ee0e0200 {
2582                         compatible = "renesas,usb2-phy-r8a7795",
2583                                      "renesas,rcar-gen3-usb2-phy";
2584                         reg = <0 0xee0e0200 0 0x700>;
2585                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2586                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2587                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2588                         resets = <&cpg 700>, <&cpg 705>;
2589                         #phy-cells = <1>;
2590                         status = "disabled";
2591                 };
2592
2593                 sdhi0: sd@ee100000 {
2594                         compatible = "renesas,sdhi-r8a7795",
2595                                      "renesas,rcar-gen3-sdhi";
2596                         reg = <0 0xee100000 0 0x2000>;
2597                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2598                         clocks = <&cpg CPG_MOD 314>;
2599                         max-frequency = <200000000>;
2600                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2601                         resets = <&cpg 314>;
2602                         iommus = <&ipmmu_ds1 32>;
2603                         status = "disabled";
2604                 };
2605
2606                 sdhi1: sd@ee120000 {
2607                         compatible = "renesas,sdhi-r8a7795",
2608                                      "renesas,rcar-gen3-sdhi";
2609                         reg = <0 0xee120000 0 0x2000>;
2610                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2611                         clocks = <&cpg CPG_MOD 313>;
2612                         max-frequency = <200000000>;
2613                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2614                         resets = <&cpg 313>;
2615                         iommus = <&ipmmu_ds1 33>;
2616                         status = "disabled";
2617                 };
2618
2619                 sdhi2: sd@ee140000 {
2620                         compatible = "renesas,sdhi-r8a7795",
2621                                      "renesas,rcar-gen3-sdhi";
2622                         reg = <0 0xee140000 0 0x2000>;
2623                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2624                         clocks = <&cpg CPG_MOD 312>;
2625                         max-frequency = <200000000>;
2626                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2627                         resets = <&cpg 312>;
2628                         iommus = <&ipmmu_ds1 34>;
2629                         status = "disabled";
2630                 };
2631
2632                 sdhi3: sd@ee160000 {
2633                         compatible = "renesas,sdhi-r8a7795",
2634                                      "renesas,rcar-gen3-sdhi";
2635                         reg = <0 0xee160000 0 0x2000>;
2636                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2637                         clocks = <&cpg CPG_MOD 311>;
2638                         max-frequency = <200000000>;
2639                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2640                         resets = <&cpg 311>;
2641                         iommus = <&ipmmu_ds1 35>;
2642                         status = "disabled";
2643                 };
2644
2645                 sata: sata@ee300000 {
2646                         compatible = "renesas,sata-r8a7795",
2647                                      "renesas,rcar-gen3-sata";
2648                         reg = <0 0xee300000 0 0x200000>;
2649                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2650                         clocks = <&cpg CPG_MOD 815>;
2651                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2652                         resets = <&cpg 815>;
2653                         status = "disabled";
2654                         iommus = <&ipmmu_hc 2>;
2655                 };
2656
2657                 gic: interrupt-controller@f1010000 {
2658                         compatible = "arm,gic-400";
2659                         #interrupt-cells = <3>;
2660                         #address-cells = <0>;
2661                         interrupt-controller;
2662                         reg = <0x0 0xf1010000 0 0x1000>,
2663                               <0x0 0xf1020000 0 0x20000>,
2664                               <0x0 0xf1040000 0 0x20000>,
2665                               <0x0 0xf1060000 0 0x20000>;
2666                         interrupts = <GIC_PPI 9
2667                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2668                         clocks = <&cpg CPG_MOD 408>;
2669                         clock-names = "clk";
2670                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2671                         resets = <&cpg 408>;
2672                 };
2673
2674                 pciec0: pcie@fe000000 {
2675                         compatible = "renesas,pcie-r8a7795",
2676                                      "renesas,pcie-rcar-gen3";
2677                         reg = <0 0xfe000000 0 0x80000>;
2678                         #address-cells = <3>;
2679                         #size-cells = <2>;
2680                         bus-range = <0x00 0xff>;
2681                         device_type = "pci";
2682                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2683                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2684                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2685                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2686                         /* Map all possible DDR as inbound ranges */
2687                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2688                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2689                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2690                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2691                         #interrupt-cells = <1>;
2692                         interrupt-map-mask = <0 0 0 0>;
2693                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2694                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2695                         clock-names = "pcie", "pcie_bus";
2696                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2697                         resets = <&cpg 319>;
2698                         status = "disabled";
2699                 };
2700
2701                 pciec1: pcie@ee800000 {
2702                         compatible = "renesas,pcie-r8a7795",
2703                                      "renesas,pcie-rcar-gen3";
2704                         reg = <0 0xee800000 0 0x80000>;
2705                         #address-cells = <3>;
2706                         #size-cells = <2>;
2707                         bus-range = <0x00 0xff>;
2708                         device_type = "pci";
2709                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2710                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2711                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2712                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2713                         /* Map all possible DDR as inbound ranges */
2714                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2715                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2716                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2717                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2718                         #interrupt-cells = <1>;
2719                         interrupt-map-mask = <0 0 0 0>;
2720                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2721                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2722                         clock-names = "pcie", "pcie_bus";
2723                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2724                         resets = <&cpg 318>;
2725                         status = "disabled";
2726                 };
2727
2728                 imr-lx4@fe860000 {
2729                         compatible = "renesas,r8a7795-imr-lx4",
2730                                      "renesas,imr-lx4";
2731                         reg = <0 0xfe860000 0 0x2000>;
2732                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2733                         clocks = <&cpg CPG_MOD 823>;
2734                         power-domains = <&sysc R8A7795_PD_A3VC>;
2735                         resets = <&cpg 823>;
2736                 };
2737
2738                 imr-lx4@fe870000 {
2739                         compatible = "renesas,r8a7795-imr-lx4",
2740                                      "renesas,imr-lx4";
2741                         reg = <0 0xfe870000 0 0x2000>;
2742                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2743                         clocks = <&cpg CPG_MOD 822>;
2744                         power-domains = <&sysc R8A7795_PD_A3VC>;
2745                         resets = <&cpg 822>;
2746                 };
2747
2748                 imr-lx4@fe880000 {
2749                         compatible = "renesas,r8a7795-imr-lx4",
2750                                      "renesas,imr-lx4";
2751                         reg = <0 0xfe880000 0 0x2000>;
2752                         interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2753                         clocks = <&cpg CPG_MOD 821>;
2754                         power-domains = <&sysc R8A7795_PD_A3VC>;
2755                         resets = <&cpg 821>;
2756                 };
2757
2758                 imr-lx4@fe890000 {
2759                         compatible = "renesas,r8a7795-imr-lx4",
2760                                      "renesas,imr-lx4";
2761                         reg = <0 0xfe890000 0 0x2000>;
2762                         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2763                         clocks = <&cpg CPG_MOD 820>;
2764                         power-domains = <&sysc R8A7795_PD_A3VC>;
2765                         resets = <&cpg 820>;
2766                 };
2767
2768                 vspbc: vsp@fe920000 {
2769                         compatible = "renesas,vsp2";
2770                         reg = <0 0xfe920000 0 0x8000>;
2771                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2772                         clocks = <&cpg CPG_MOD 624>;
2773                         power-domains = <&sysc R8A7795_PD_A3VP>;
2774                         resets = <&cpg 624>;
2775
2776                         renesas,fcp = <&fcpvb1>;
2777                 };
2778
2779                 vspbd: vsp@fe960000 {
2780                         compatible = "renesas,vsp2";
2781                         reg = <0 0xfe960000 0 0x8000>;
2782                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2783                         clocks = <&cpg CPG_MOD 626>;
2784                         power-domains = <&sysc R8A7795_PD_A3VP>;
2785                         resets = <&cpg 626>;
2786
2787                         renesas,fcp = <&fcpvb0>;
2788                 };
2789
2790                 vspd0: vsp@fea20000 {
2791                         compatible = "renesas,vsp2";
2792                         reg = <0 0xfea20000 0 0x5000>;
2793                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2794                         clocks = <&cpg CPG_MOD 623>;
2795                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2796                         resets = <&cpg 623>;
2797
2798                         renesas,fcp = <&fcpvd0>;
2799                 };
2800
2801                 vspd1: vsp@fea28000 {
2802                         compatible = "renesas,vsp2";
2803                         reg = <0 0xfea28000 0 0x5000>;
2804                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2805                         clocks = <&cpg CPG_MOD 622>;
2806                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2807                         resets = <&cpg 622>;
2808
2809                         renesas,fcp = <&fcpvd1>;
2810                 };
2811
2812                 vspd2: vsp@fea30000 {
2813                         compatible = "renesas,vsp2";
2814                         reg = <0 0xfea30000 0 0x5000>;
2815                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2816                         clocks = <&cpg CPG_MOD 621>;
2817                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2818                         resets = <&cpg 621>;
2819
2820                         renesas,fcp = <&fcpvd2>;
2821                 };
2822
2823                 vspi0: vsp@fe9a0000 {
2824                         compatible = "renesas,vsp2";
2825                         reg = <0 0xfe9a0000 0 0x8000>;
2826                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2827                         clocks = <&cpg CPG_MOD 631>;
2828                         power-domains = <&sysc R8A7795_PD_A3VP>;
2829                         resets = <&cpg 631>;
2830
2831                         renesas,fcp = <&fcpvi0>;
2832                 };
2833
2834                 vspi1: vsp@fe9b0000 {
2835                         compatible = "renesas,vsp2";
2836                         reg = <0 0xfe9b0000 0 0x8000>;
2837                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2838                         clocks = <&cpg CPG_MOD 630>;
2839                         power-domains = <&sysc R8A7795_PD_A3VP>;
2840                         resets = <&cpg 630>;
2841
2842                         renesas,fcp = <&fcpvi1>;
2843                 };
2844
2845                 fdp1@fe940000 {
2846                         compatible = "renesas,fdp1";
2847                         reg = <0 0xfe940000 0 0x2400>;
2848                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2849                         clocks = <&cpg CPG_MOD 119>;
2850                         power-domains = <&sysc R8A7795_PD_A3VP>;
2851                         resets = <&cpg 119>;
2852                         renesas,fcp = <&fcpf0>;
2853                 };
2854
2855                 fdp1@fe944000 {
2856                         compatible = "renesas,fdp1";
2857                         reg = <0 0xfe944000 0 0x2400>;
2858                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2859                         clocks = <&cpg CPG_MOD 118>;
2860                         power-domains = <&sysc R8A7795_PD_A3VP>;
2861                         resets = <&cpg 118>;
2862                         renesas,fcp = <&fcpf1>;
2863                 };
2864
2865                 fcpf0: fcp@fe950000 {
2866                         compatible = "renesas,fcpf";
2867                         reg = <0 0xfe950000 0 0x200>;
2868                         clocks = <&cpg CPG_MOD 615>;
2869                         power-domains = <&sysc R8A7795_PD_A3VP>;
2870                         resets = <&cpg 615>;
2871                         iommus = <&ipmmu_vp0 0>;
2872                 };
2873
2874                 fcpf1: fcp@fe951000 {
2875                         compatible = "renesas,fcpf";
2876                         reg = <0 0xfe951000 0 0x200>;
2877                         clocks = <&cpg CPG_MOD 614>;
2878                         power-domains = <&sysc R8A7795_PD_A3VP>;
2879                         resets = <&cpg 614>;
2880                         iommus = <&ipmmu_vp1 1>;
2881                 };
2882
2883                 fcpvb0: fcp@fe96f000 {
2884                         compatible = "renesas,fcpv";
2885                         reg = <0 0xfe96f000 0 0x200>;
2886                         clocks = <&cpg CPG_MOD 607>;
2887                         power-domains = <&sysc R8A7795_PD_A3VP>;
2888                         resets = <&cpg 607>;
2889                         iommus = <&ipmmu_vp0 5>;
2890                 };
2891
2892                 fcpvb1: fcp@fe92f000 {
2893                         compatible = "renesas,fcpv";
2894                         reg = <0 0xfe92f000 0 0x200>;
2895                         clocks = <&cpg CPG_MOD 606>;
2896                         power-domains = <&sysc R8A7795_PD_A3VP>;
2897                         resets = <&cpg 606>;
2898                         iommus = <&ipmmu_vp1 7>;
2899                 };
2900
2901                 fcpvi0: fcp@fe9af000 {
2902                         compatible = "renesas,fcpv";
2903                         reg = <0 0xfe9af000 0 0x200>;
2904                         clocks = <&cpg CPG_MOD 611>;
2905                         power-domains = <&sysc R8A7795_PD_A3VP>;
2906                         resets = <&cpg 611>;
2907                         iommus = <&ipmmu_vp0 8>;
2908                 };
2909
2910                 fcpvi1: fcp@fe9bf000 {
2911                         compatible = "renesas,fcpv";
2912                         reg = <0 0xfe9bf000 0 0x200>;
2913                         clocks = <&cpg CPG_MOD 610>;
2914                         power-domains = <&sysc R8A7795_PD_A3VP>;
2915                         resets = <&cpg 610>;
2916                         iommus = <&ipmmu_vp1 9>;
2917                 };
2918
2919                 fcpvd0: fcp@fea27000 {
2920                         compatible = "renesas,fcpv";
2921                         reg = <0 0xfea27000 0 0x200>;
2922                         clocks = <&cpg CPG_MOD 603>;
2923                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2924                         resets = <&cpg 603>;
2925                         iommus = <&ipmmu_vi0 8>;
2926                 };
2927
2928                 fcpvd1: fcp@fea2f000 {
2929                         compatible = "renesas,fcpv";
2930                         reg = <0 0xfea2f000 0 0x200>;
2931                         clocks = <&cpg CPG_MOD 602>;
2932                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2933                         resets = <&cpg 602>;
2934                         iommus = <&ipmmu_vi0 9>;
2935                 };
2936
2937                 fcpvd2: fcp@fea37000 {
2938                         compatible = "renesas,fcpv";
2939                         reg = <0 0xfea37000 0 0x200>;
2940                         clocks = <&cpg CPG_MOD 601>;
2941                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2942                         resets = <&cpg 601>;
2943                         iommus = <&ipmmu_vi1 10>;
2944                 };
2945
2946                 cmm0: cmm@fea40000 {
2947                         compatible = "renesas,r8a7795-cmm",
2948                                      "renesas,rcar-gen3-cmm";
2949                         reg = <0 0xfea40000 0 0x1000>;
2950                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2951                         clocks = <&cpg CPG_MOD 711>;
2952                         resets = <&cpg 711>;
2953                 };
2954
2955                 cmm1: cmm@fea50000 {
2956                         compatible = "renesas,r8a7795-cmm",
2957                                      "renesas,rcar-gen3-cmm";
2958                         reg = <0 0xfea50000 0 0x1000>;
2959                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2960                         clocks = <&cpg CPG_MOD 710>;
2961                         resets = <&cpg 710>;
2962                 };
2963
2964                 cmm2: cmm@fea60000 {
2965                         compatible = "renesas,r8a7795-cmm",
2966                                      "renesas,rcar-gen3-cmm";
2967                         reg = <0 0xfea60000 0 0x1000>;
2968                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2969                         clocks = <&cpg CPG_MOD 709>;
2970                         resets = <&cpg 709>;
2971                 };
2972
2973                 cmm3: cmm@fea70000 {
2974                         compatible = "renesas,r8a7795-cmm",
2975                                      "renesas,rcar-gen3-cmm";
2976                         reg = <0 0xfea70000 0 0x1000>;
2977                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2978                         clocks = <&cpg CPG_MOD 708>;
2979                         resets = <&cpg 708>;
2980                 };
2981
2982                 csi20: csi2@fea80000 {
2983                         compatible = "renesas,r8a7795-csi2";
2984                         reg = <0 0xfea80000 0 0x10000>;
2985                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2986                         clocks = <&cpg CPG_MOD 714>;
2987                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2988                         resets = <&cpg 714>;
2989                         status = "disabled";
2990
2991                         ports {
2992                                 #address-cells = <1>;
2993                                 #size-cells = <0>;
2994
2995                                 port@1 {
2996                                         #address-cells = <1>;
2997                                         #size-cells = <0>;
2998
2999                                         reg = <1>;
3000
3001                                         csi20vin0: endpoint@0 {
3002                                                 reg = <0>;
3003                                                 remote-endpoint = <&vin0csi20>;
3004                                         };
3005                                         csi20vin1: endpoint@1 {
3006                                                 reg = <1>;
3007                                                 remote-endpoint = <&vin1csi20>;
3008                                         };
3009                                         csi20vin2: endpoint@2 {
3010                                                 reg = <2>;
3011                                                 remote-endpoint = <&vin2csi20>;
3012                                         };
3013                                         csi20vin3: endpoint@3 {
3014                                                 reg = <3>;
3015                                                 remote-endpoint = <&vin3csi20>;
3016                                         };
3017                                         csi20vin4: endpoint@4 {
3018                                                 reg = <4>;
3019                                                 remote-endpoint = <&vin4csi20>;
3020                                         };
3021                                         csi20vin5: endpoint@5 {
3022                                                 reg = <5>;
3023                                                 remote-endpoint = <&vin5csi20>;
3024                                         };
3025                                         csi20vin6: endpoint@6 {
3026                                                 reg = <6>;
3027                                                 remote-endpoint = <&vin6csi20>;
3028                                         };
3029                                         csi20vin7: endpoint@7 {
3030                                                 reg = <7>;
3031                                                 remote-endpoint = <&vin7csi20>;
3032                                         };
3033                                 };
3034                         };
3035                 };
3036
3037                 csi40: csi2@feaa0000 {
3038                         compatible = "renesas,r8a7795-csi2";
3039                         reg = <0 0xfeaa0000 0 0x10000>;
3040                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
3041                         clocks = <&cpg CPG_MOD 716>;
3042                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3043                         resets = <&cpg 716>;
3044                         status = "disabled";
3045
3046                         ports {
3047                                 #address-cells = <1>;
3048                                 #size-cells = <0>;
3049
3050                                 port@1 {
3051                                         #address-cells = <1>;
3052                                         #size-cells = <0>;
3053
3054                                         reg = <1>;
3055
3056                                         csi40vin0: endpoint@0 {
3057                                                 reg = <0>;
3058                                                 remote-endpoint = <&vin0csi40>;
3059                                         };
3060                                         csi40vin1: endpoint@1 {
3061                                                 reg = <1>;
3062                                                 remote-endpoint = <&vin1csi40>;
3063                                         };
3064                                         csi40vin2: endpoint@2 {
3065                                                 reg = <2>;
3066                                                 remote-endpoint = <&vin2csi40>;
3067                                         };
3068                                         csi40vin3: endpoint@3 {
3069                                                 reg = <3>;
3070                                                 remote-endpoint = <&vin3csi40>;
3071                                         };
3072                                 };
3073                         };
3074                 };
3075
3076                 csi41: csi2@feab0000 {
3077                         compatible = "renesas,r8a7795-csi2";
3078                         reg = <0 0xfeab0000 0 0x10000>;
3079                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
3080                         clocks = <&cpg CPG_MOD 715>;
3081                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3082                         resets = <&cpg 715>;
3083                         status = "disabled";
3084
3085                         ports {
3086                                 #address-cells = <1>;
3087                                 #size-cells = <0>;
3088
3089                                 port@1 {
3090                                         #address-cells = <1>;
3091                                         #size-cells = <0>;
3092
3093                                         reg = <1>;
3094
3095                                         csi41vin4: endpoint@0 {
3096                                                 reg = <0>;
3097                                                 remote-endpoint = <&vin4csi41>;
3098                                         };
3099                                         csi41vin5: endpoint@1 {
3100                                                 reg = <1>;
3101                                                 remote-endpoint = <&vin5csi41>;
3102                                         };
3103                                         csi41vin6: endpoint@2 {
3104                                                 reg = <2>;
3105                                                 remote-endpoint = <&vin6csi41>;
3106                                         };
3107                                         csi41vin7: endpoint@3 {
3108                                                 reg = <3>;
3109                                                 remote-endpoint = <&vin7csi41>;
3110                                         };
3111                                 };
3112                         };
3113                 };
3114
3115                 hdmi0: hdmi@fead0000 {
3116                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3117                         reg = <0 0xfead0000 0 0x10000>;
3118                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
3119                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3120                         clock-names = "iahb", "isfr";
3121                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3122                         resets = <&cpg 729>;
3123                         status = "disabled";
3124
3125                         ports {
3126                                 #address-cells = <1>;
3127                                 #size-cells = <0>;
3128                                 port@0 {
3129                                         reg = <0>;
3130                                         dw_hdmi0_in: endpoint {
3131                                                 remote-endpoint = <&du_out_hdmi0>;
3132                                         };
3133                                 };
3134                                 port@1 {
3135                                         reg = <1>;
3136                                 };
3137                                 port@2 {
3138                                         /* HDMI sound */
3139                                         reg = <2>;
3140                                 };
3141                         };
3142                 };
3143
3144                 hdmi1: hdmi@feae0000 {
3145                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3146                         reg = <0 0xfeae0000 0 0x10000>;
3147                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
3148                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3149                         clock-names = "iahb", "isfr";
3150                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3151                         resets = <&cpg 728>;
3152                         status = "disabled";
3153
3154                         ports {
3155                                 #address-cells = <1>;
3156                                 #size-cells = <0>;
3157                                 port@0 {
3158                                         reg = <0>;
3159                                         dw_hdmi1_in: endpoint {
3160                                                 remote-endpoint = <&du_out_hdmi1>;
3161                                         };
3162                                 };
3163                                 port@1 {
3164                                         reg = <1>;
3165                                 };
3166                                 port@2 {
3167                                         /* HDMI sound */
3168                                         reg = <2>;
3169                                 };
3170                         };
3171                 };
3172
3173                 du: display@feb00000 {
3174                         compatible = "renesas,du-r8a7795";
3175                         reg = <0 0xfeb00000 0 0x80000>;
3176                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
3177                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
3178                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
3179                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
3180                         clocks = <&cpg CPG_MOD 724>,
3181                                  <&cpg CPG_MOD 723>,
3182                                  <&cpg CPG_MOD 722>,
3183                                  <&cpg CPG_MOD 721>;
3184                         clock-names = "du.0", "du.1", "du.2", "du.3";
3185
3186                         renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
3187                         vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
3188
3189                         status = "disabled";
3190
3191                         ports {
3192                                 #address-cells = <1>;
3193                                 #size-cells = <0>;
3194
3195                                 port@0 {
3196                                         reg = <0>;
3197                                         du_out_rgb: endpoint {
3198                                         };
3199                                 };
3200                                 port@1 {
3201                                         reg = <1>;
3202                                         du_out_hdmi0: endpoint {
3203                                                 remote-endpoint = <&dw_hdmi0_in>;
3204                                         };
3205                                 };
3206                                 port@2 {
3207                                         reg = <2>;
3208                                         du_out_hdmi1: endpoint {
3209                                                 remote-endpoint = <&dw_hdmi1_in>;
3210                                         };
3211                                 };
3212                                 port@3 {
3213                                         reg = <3>;
3214                                         du_out_lvds0: endpoint {
3215                                                 remote-endpoint = <&lvds0_in>;
3216                                         };
3217                                 };
3218                         };
3219                 };
3220
3221                 lvds0: lvds@feb90000 {
3222                         compatible = "renesas,r8a7795-lvds";
3223                         reg = <0 0xfeb90000 0 0x14>;
3224                         clocks = <&cpg CPG_MOD 727>;
3225                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3226                         resets = <&cpg 727>;
3227                         status = "disabled";
3228
3229                         ports {
3230                                 #address-cells = <1>;
3231                                 #size-cells = <0>;
3232
3233                                 port@0 {
3234                                         reg = <0>;
3235                                         lvds0_in: endpoint {
3236                                                 remote-endpoint = <&du_out_lvds0>;
3237                                         };
3238                                 };
3239                                 port@1 {
3240                                         reg = <1>;
3241                                         lvds0_out: endpoint {
3242                                         };
3243                                 };
3244                         };
3245                 };
3246
3247                 prr: chipid@fff00044 {
3248                         compatible = "renesas,prr";
3249                         reg = <0 0xfff00044 0 4>;
3250                 };
3251         };
3252
3253         thermal-zones {
3254                 sensor_thermal1: sensor-thermal1 {
3255                         polling-delay-passive = <250>;
3256                         polling-delay = <1000>;
3257                         thermal-sensors = <&tsc 0>;
3258                         sustainable-power = <6313>;
3259
3260                         trips {
3261                                 sensor1_crit: sensor1-crit {
3262                                         temperature = <120000>;
3263                                         hysteresis = <1000>;
3264                                         type = "critical";
3265                                 };
3266                         };
3267                 };
3268
3269                 sensor_thermal2: sensor-thermal2 {
3270                         polling-delay-passive = <250>;
3271                         polling-delay = <1000>;
3272                         thermal-sensors = <&tsc 1>;
3273                         sustainable-power = <6313>;
3274
3275                         trips {
3276                                 sensor2_crit: sensor2-crit {
3277                                         temperature = <120000>;
3278                                         hysteresis = <1000>;
3279                                         type = "critical";
3280                                 };
3281                         };
3282                 };
3283
3284                 sensor_thermal3: sensor-thermal3 {
3285                         polling-delay-passive = <250>;
3286                         polling-delay = <1000>;
3287                         thermal-sensors = <&tsc 2>;
3288
3289                         trips {
3290                                 target: trip-point1 {
3291                                         temperature = <100000>;
3292                                         hysteresis = <1000>;
3293                                         type = "passive";
3294                                 };
3295
3296                                 sensor3_crit: sensor3-crit {
3297                                         temperature = <120000>;
3298                                         hysteresis = <1000>;
3299                                         type = "critical";
3300                                 };
3301                         };
3302
3303                         cooling-maps {
3304                                 map0 {
3305                                         trip = <&target>;
3306                                         cooling-device = <&a57_0 2 4>;
3307                                         contribution = <1024>;
3308                                 };
3309
3310                                 map1 {
3311                                         trip = <&target>;
3312                                         cooling-device = <&a53_0 0 2>;
3313                                         contribution = <1024>;
3314                                 };
3315                         };
3316                 };
3317         };
3318
3319         timer {
3320                 compatible = "arm,armv8-timer";
3321                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3322                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3323                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3324                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
3325         };
3326
3327         /* External USB clocks - can be overridden by the board */
3328         usb3s0_clk: usb3s0 {
3329                 compatible = "fixed-clock";
3330                 #clock-cells = <0>;
3331                 clock-frequency = <0>;
3332         };
3333
3334         usb_extal_clk: usb_extal {
3335                 compatible = "fixed-clock";
3336                 #clock-cells = <0>;
3337                 clock-frequency = <0>;
3338         };
3339 };