1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Alt board
5 * Copyright (C) 2014 Renesas Electronics Corporation
9 #include "r8a7794.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "renesas,alt", "renesas,r8a7794";
23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
24 stdout-path = "serial0:115200n8";
28 device_type = "memory";
29 reg = <0 0x40000000 0 0x40000000>;
32 d3_3v: regulator-d3-3v {
33 compatible = "regulator-fixed";
34 regulator-name = "D3.3V";
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
41 vcc_sdhi0: regulator-vcc-sdhi0 {
42 compatible = "regulator-fixed";
44 regulator-name = "SDHI0 Vcc";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
48 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
52 vccq_sdhi0: regulator-vccq-sdhi0 {
53 compatible = "regulator-gpio";
55 regulator-name = "SDHI0 VccQ";
56 regulator-min-microvolt = <1800000>;
57 regulator-max-microvolt = <3300000>;
59 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
65 vcc_sdhi1: regulator-vcc-sdhi1 {
66 compatible = "regulator-fixed";
68 regulator-name = "SDHI1 Vcc";
69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <3300000>;
72 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
76 vccq_sdhi1: regulator-vccq-sdhi1 {
77 compatible = "regulator-gpio";
79 regulator-name = "SDHI1 VccQ";
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <3300000>;
83 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
95 compatible = "adi,adv7123";
103 adv7123_in: endpoint {
104 remote-endpoint = <&du_out_rgb1>;
109 adv7123_out: endpoint {
110 remote-endpoint = <&vga_in>;
117 compatible = "vga-connector";
121 remote-endpoint = <&adv7123_out>;
127 compatible = "fixed-clock";
129 clock-frequency = <74250000>;
133 compatible = "fixed-clock";
135 clock-frequency = <148500000>;
139 #address-cells = <1>;
141 compatible = "i2c-gpio";
143 gpios = <&gpio4 9 GPIO_ACTIVE_HIGH /* sda */
144 &gpio4 8 GPIO_ACTIVE_HIGH /* scl */
146 i2c-gpio,delay-us = <5>;
150 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
151 * A fallback to GPIO is provided.
154 compatible = "i2c-demux-pinctrl";
155 i2c-parent = <&i2c4>, <&gpioi2c4>;
156 i2c-bus-name = "i2c-exio4";
157 #address-cells = <1>;
163 pinctrl-0 = <&du_pins>;
164 pinctrl-names = "default";
167 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
168 <&x13_clk>, <&x2_clk>;
169 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
174 remote-endpoint = <&adv7123_in>;
181 clock-frequency = <20000000>;
185 pinctrl-0 = <&scif_clk_pins>;
186 pinctrl-names = "default";
189 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
194 groups = "scif2_data";
198 scif_clk_pins: scif_clk {
200 function = "scif_clk";
204 groups = "eth_link", "eth_mdio", "eth_rmii";
209 groups = "intc_irq8";
224 groups = "vin0_data8", "vin0_clk";
228 mmcif0_pins: mmcif0 {
229 groups = "mmc_data8", "mmc_ctrl";
234 groups = "sdhi0_data4", "sdhi0_ctrl";
236 power-source = <3300>;
239 sdhi0_pins_uhs: sd0_uhs {
240 groups = "sdhi0_data4", "sdhi0_ctrl";
242 power-source = <1800>;
246 groups = "sdhi1_data4", "sdhi1_ctrl";
248 power-source = <3300>;
251 sdhi1_pins_uhs: sd1_uhs {
252 groups = "sdhi1_data4", "sdhi1_ctrl";
254 power-source = <1800>;
264 groups = "qspi_ctrl", "qspi_data4";
270 pinctrl-0 = <ðer_pins &phy1_pins>;
271 pinctrl-names = "default";
273 phy-handle = <&phy1>;
274 renesas,ether-link-active-low;
277 phy1: ethernet-phy@1 {
279 interrupt-parent = <&irqc0>;
280 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
281 micrel,led-mode = <1>;
286 pinctrl-0 = <&mmcif0_pins>;
287 pinctrl-names = "default";
289 vmmc-supply = <&d3_3v>;
290 vqmmc-supply = <&d3_3v>;
297 pinctrl-0 = <&sdhi0_pins>;
298 pinctrl-1 = <&sdhi0_pins_uhs>;
299 pinctrl-names = "default", "state_uhs";
301 vmmc-supply = <&vcc_sdhi0>;
302 vqmmc-supply = <&vccq_sdhi0>;
303 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
304 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
311 pinctrl-0 = <&sdhi1_pins>;
312 pinctrl-1 = <&sdhi1_pins_uhs>;
313 pinctrl-names = "default", "state_uhs";
315 vmmc-supply = <&vcc_sdhi1>;
316 vqmmc-supply = <&vccq_sdhi1>;
317 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
318 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
324 pinctrl-0 = <&i2c1_pins>;
325 pinctrl-names = "default";
328 clock-frequency = <400000>;
331 compatible = "adi,adv7180";
338 remote-endpoint = <&vin0ep>;
345 pinctrl-0 = <&i2c4_pins>;
346 pinctrl-names = "i2c-exio4";
351 pinctrl-0 = <&vin0_pins>;
352 pinctrl-names = "default";
355 #address-cells = <1>;
359 remote-endpoint = <&adv7180>;
366 pinctrl-0 = <&scif2_pins>;
367 pinctrl-names = "default";
373 clock-frequency = <14745600>;
377 pinctrl-0 = <&qspi_pins>;
378 pinctrl-names = "default";
383 compatible = "spansion,s25fl512s", "jedec,spi-nor";
385 spi-max-frequency = <30000000>;
386 spi-tx-bus-width = <4>;
387 spi-rx-bus-width = <4>;
393 compatible = "fixed-partitions";
394 #address-cells = <1>;
399 reg = <0x00000000 0x00040000>;
404 reg = <0x00040000 0x00040000>;
409 reg = <0x00080000 0x03f80000>;