arch/arm/dts/r8a7794-alt.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Alt board
   4  *
   5  * Copyright (C) 2014 Renesas Electronics Corporation
   6  */
   7
   8 /dts-v1/;
   9 #include "r8a7794.dtsi"
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 / {
  13         model = "Alt";
  14         compatible = "renesas,alt", "renesas,r8a7794";
  15
  16         aliases {
  17                 serial0 = &scif2;
  18                 i2c9 = &gpioi2c1;
  19                 i2c10 = &gpioi2c4;
  20                 i2c11 = &i2chdmi;
  21                 i2c12 = &i2cexio4;
  22         };
  23
  24         chosen {
  25                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         memory@40000000 {
  30                 device_type = "memory";
  31                 reg = <0 0x40000000 0 0x40000000>;
  32         };
  33
  34         d3_3v: regulator-d3-3v {
  35                 compatible = "regulator-fixed";
  36                 regulator-name = "D3.3V";
  37                 regulator-min-microvolt = <3300000>;
  38                 regulator-max-microvolt = <3300000>;
  39                 regulator-boot-on;
  40                 regulator-always-on;
  41         };
  42
  43         vcc_sdhi0: regulator-vcc-sdhi0 {
  44                 compatible = "regulator-fixed";
  45
  46                 regulator-name = "SDHI0 Vcc";
  47                 regulator-min-microvolt = <3300000>;
  48                 regulator-max-microvolt = <3300000>;
  49
  50                 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
  51                 enable-active-high;
  52         };
  53
  54         vccq_sdhi0: regulator-vccq-sdhi0 {
  55                 compatible = "regulator-gpio";
  56
  57                 regulator-name = "SDHI0 VccQ";
  58                 regulator-min-microvolt = <1800000>;
  59                 regulator-max-microvolt = <3300000>;
  60
  61                 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
  62                 gpios-states = <1>;
  63                 states = <3300000 1
  64                           1800000 0>;
  65         };
  66
  67         vcc_sdhi1: regulator-vcc-sdhi1 {
  68                 compatible = "regulator-fixed";
  69
  70                 regulator-name = "SDHI1 Vcc";
  71                 regulator-min-microvolt = <3300000>;
  72                 regulator-max-microvolt = <3300000>;
  73
  74                 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
  75                 enable-active-high;
  76         };
  77
  78         vccq_sdhi1: regulator-vccq-sdhi1 {
  79                 compatible = "regulator-gpio";
  80
  81                 regulator-name = "SDHI1 VccQ";
  82                 regulator-min-microvolt = <1800000>;
  83                 regulator-max-microvolt = <3300000>;
  84
  85                 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  86                 gpios-states = <1>;
  87                 states = <3300000 1
  88                           1800000 0>;
  89         };
  90
  91         lbsc {
  92                 #address-cells = <1>;
  93                 #size-cells = <1>;
  94         };
  95
  96         vga-encoder {
  97                 compatible = "adi,adv7123";
  98
  99                 ports {
 100                         #address-cells = <1>;
 101                         #size-cells = <0>;
 102
 103                         port@0 {
 104                                 reg = <0>;
 105                                 adv7123_in: endpoint {
 106                                         remote-endpoint = <&du_out_rgb1>;
 107                                 };
 108                         };
 109                         port@1 {
 110                                 reg = <1>;
 111                                 adv7123_out: endpoint {
 112                                         remote-endpoint = <&vga_in>;
 113                                 };
 114                         };
 115                 };
 116         };
 117
 118         vga {
 119                 compatible = "vga-connector";
 120
 121                 port {
 122                         vga_in: endpoint {
 123                                 remote-endpoint = <&adv7123_out>;
 124                         };
 125                 };
 126         };
 127
 128         x2_clk: x2-clock {
 129                 compatible = "fixed-clock";
 130                 #clock-cells = <0>;
 131                 clock-frequency = <74250000>;
 132         };
 133
 134         x13_clk: x13-clock {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 clock-frequency = <148500000>;
 138         };
 139
 140         gpioi2c1: i2c-9 {
 141                 #address-cells = <1>;
 142                 #size-cells = <0>;
 143                 compatible = "i2c-gpio";
 144                 status = "disabled";
 145                 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 146                 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 147         };
 148
 149         gpioi2c4: i2c-10 {
 150                 #address-cells = <1>;
 151                 #size-cells = <0>;
 152                 compatible = "i2c-gpio";
 153                 status = "disabled";
 154                 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 155                 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 156                 i2c-gpio,delay-us = <5>;
 157         };
 158
 159         /*
 160          * A fallback to GPIO is provided for I2C1.
 161          */
 162         i2chdmi: i2c-11 {
 163                 compatible = "i2c-demux-pinctrl";
 164                 i2c-parent = <&i2c1>, <&gpioi2c1>;
 165                 i2c-bus-name = "i2c-hdmi";
 166                 #address-cells = <1>;
 167                 #size-cells = <0>;
 168
 169                 composite-in@20 {
 170                         compatible = "adi,adv7180";
 171                         reg = <0x20>;
 172                         remote = <&vin0>;
 173
 174                         port {
 175                                 adv7180: endpoint {
 176                                         bus-width = <8>;
 177                                         remote-endpoint = <&vin0ep>;
 178                                 };
 179                         };
 180                 };
 181         };
 182
 183         /*
 184          * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
 185          * A fallback to GPIO is provided.
 186          */
 187         i2cexio4: i2c-14 {
 188                 compatible = "i2c-demux-pinctrl";
 189                 i2c-parent = <&i2c4>, <&gpioi2c4>;
 190                 i2c-bus-name = "i2c-exio4";
 191                 #address-cells = <1>;
 192                 #size-cells = <0>;
 193         };
 194 };
 195
 196 &du {
 197         pinctrl-0 = <&du_pins>;
 198         pinctrl-names = "default";
 199         status = "okay";
 200
 201         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
 202                  <&x13_clk>, <&x2_clk>;
 203         clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
 204
 205         ports {
 206                 port@1 {
 207                         endpoint {
 208                                 remote-endpoint = <&adv7123_in>;
 209                         };
 210                 };
 211         };
 212 };
 213
 214 &extal_clk {
 215         clock-frequency = <20000000>;
 216 };
 217
 218 &pfc {
 219         pinctrl-0 = <&scif_clk_pins>;
 220         pinctrl-names = "default";
 221
 222         du_pins: du {
 223                 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
 224                 function = "du1";
 225         };
 226
 227         scif2_pins: scif2 {
 228                 groups = "scif2_data";
 229                 function = "scif2";
 230         };
 231
 232         scif_clk_pins: scif_clk {
 233                 groups = "scif_clk";
 234                 function = "scif_clk";
 235         };
 236
 237         ether_pins: ether {
 238                 groups = "eth_link", "eth_mdio", "eth_rmii";
 239                 function = "eth";
 240         };
 241
 242         phy1_pins: phy1 {
 243                 groups = "intc_irq8";
 244                 function = "intc";
 245         };
 246
 247         i2c1_pins: i2c1 {
 248                 groups = "i2c1";
 249                 function = "i2c1";
 250         };
 251
 252         i2c4_pins: i2c4 {
 253                 groups = "i2c4";
 254                 function = "i2c4";
 255         };
 256
 257         vin0_pins: vin0 {
 258                 groups = "vin0_data8", "vin0_clk";
 259                 function = "vin0";
 260         };
 261
 262         mmcif0_pins: mmcif0 {
 263                 groups = "mmc_data8", "mmc_ctrl";
 264                 function = "mmc";
 265         };
 266
 267         sdhi0_pins: sd0 {
 268                 groups = "sdhi0_data4", "sdhi0_ctrl";
 269                 function = "sdhi0";
 270                 power-source = <3300>;
 271         };
 272
 273         sdhi0_pins_uhs: sd0_uhs {
 274                 groups = "sdhi0_data4", "sdhi0_ctrl";
 275                 function = "sdhi0";
 276                 power-source = <1800>;
 277         };
 278
 279         sdhi1_pins: sd1 {
 280                 groups = "sdhi1_data4", "sdhi1_ctrl";
 281                 function = "sdhi1";
 282                 power-source = <3300>;
 283         };
 284
 285         sdhi1_pins_uhs: sd1_uhs {
 286                 groups = "sdhi1_data4", "sdhi1_ctrl";
 287                 function = "sdhi1";
 288                 power-source = <1800>;
 289         };
 290 };
 291
 292 &cmt0 {
 293         status = "okay";
 294 };
 295
 296 &pfc {
 297         qspi_pins: qspi {
 298                 groups = "qspi_ctrl", "qspi_data4";
 299                 function = "qspi";
 300         };
 301 };
 302
 303 &ether {
 304         pinctrl-0 = <&ether_pins &phy1_pins>;
 305         pinctrl-names = "default";
 306
 307         phy-handle = <&phy1>;
 308         renesas,ether-link-active-low;
 309         status = "okay";
 310
 311         phy1: ethernet-phy@1 {
 312                 reg = <1>;
 313                 interrupt-parent = <&irqc0>;
 314                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
 315                 micrel,led-mode = <1>;
 316         };
 317 };
 318
 319 &mmcif0 {
 320         pinctrl-0 = <&mmcif0_pins>;
 321         pinctrl-names = "default";
 322
 323         vmmc-supply = <&d3_3v>;
 324         vqmmc-supply = <&d3_3v>;
 325         bus-width = <8>;
 326         non-removable;
 327         status = "okay";
 328 };
 329
 330 &sdhi0 {
 331         pinctrl-0 = <&sdhi0_pins>;
 332         pinctrl-1 = <&sdhi0_pins_uhs>;
 333         pinctrl-names = "default", "state_uhs";
 334
 335         vmmc-supply = <&vcc_sdhi0>;
 336         vqmmc-supply = <&vccq_sdhi0>;
 337         cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
 338         wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
 339         sd-uhs-sdr50;
 340         sd-uhs-sdr104;
 341         status = "okay";
 342 };
 343
 344 &sdhi1 {
 345         pinctrl-0 = <&sdhi1_pins>;
 346         pinctrl-1 = <&sdhi1_pins_uhs>;
 347         pinctrl-names = "default", "state_uhs";
 348
 349         vmmc-supply = <&vcc_sdhi1>;
 350         vqmmc-supply = <&vccq_sdhi1>;
 351         cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
 352         wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
 353         sd-uhs-sdr50;
 354         status = "okay";
 355 };
 356
 357 &i2c1 {
 358         pinctrl-0 = <&i2c1_pins>;
 359         pinctrl-names = "i2c-hdmi";
 360
 361         clock-frequency = <400000>;
 362 };
 363
 364 &i2c4 {
 365         pinctrl-0 = <&i2c4_pins>;
 366         pinctrl-names = "i2c-exio4";
 367 };
 368
 369 &vin0 {
 370         status = "okay";
 371         pinctrl-0 = <&vin0_pins>;
 372         pinctrl-names = "default";
 373
 374         port {
 375                 #address-cells = <1>;
 376                 #size-cells = <0>;
 377
 378                 vin0ep: endpoint {
 379                         remote-endpoint = <&adv7180>;
 380                         bus-width = <8>;
 381                 };
 382         };
 383 };
 384
 385 &scif2 {
 386         pinctrl-0 = <&scif2_pins>;
 387         pinctrl-names = "default";
 388
 389         status = "okay";
 390 };
 391
 392 &scif_clk {
 393         clock-frequency = <14745600>;
 394 };
 395
 396 &qspi {
 397         pinctrl-0 = <&qspi_pins>;
 398         pinctrl-names = "default";
 399
 400         status = "okay";
 401
 402         flash@0 {
 403                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 404                 reg = <0>;
 405                 spi-max-frequency = <30000000>;
 406                 spi-tx-bus-width = <4>;
 407                 spi-rx-bus-width = <4>;
 408                 spi-cpol;
 409                 spi-cpha;
 410                 m25p,fast-read;
 411
 412                 partitions {
 413                         compatible = "fixed-partitions";
 414                         #address-cells = <1>;
 415                         #size-cells = <1>;
 416
 417                         partition@0 {
 418                                 label = "loader";
 419                                 reg = <0x00000000 0x00040000>;
 420                                 read-only;
 421                         };
 422                         partition@40000 {
 423                                 label = "system";
 424                                 reg = <0x00040000 0x00040000>;
 425                                 read-only;
 426                         };
 427                         partition@80000 {
 428                                 label = "user";
 429                                 reg = <0x00080000 0x03f80000>;
 430                         };
 431                 };
 432         };
 433 };